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* MdeModulePkg XhciDxe: Use common buffer for AsyncInterruptTransferStar Zeng2018-10-283-103/+63
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | V3: Call XhcFreeUrb after XhcCreateTransferTrb fails in XhcCreateTrb. REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1274 In current code, XhcMonitorAsyncRequests (timer handler) will do unmap and map operations for AsyncIntTransfers to "Flush data from PCI controller specific address to mapped system memory address". XhcMonitorAsyncRequests XhcFlushAsyncIntMap PciIo->Unmap IoMmu->SetAttribute PciIo->Map IoMmu->SetAttribute This may impact the boot performance. Since the data buffer for XhcMonitorAsyncRequests is internal buffer, we can allocate common buffer by PciIo->AllocateBuffer and map the buffer with EfiPciIoOperationBusMasterCommonBuffer, then the unmap and map operations can be removed. /// /// Provides both read and write access to system memory by /// both the processor and a bus master. The buffer is coherent /// from both the processor's and the bus master's point of view. /// EfiPciIoOperationBusMasterCommonBuffer, Test done: USB KB works normally. USB disk read/write works normally. Cc: Ruiyu Ni <ruiyu.ni@intel.com> Cc: Hao Wu <hao.a.wu@intel.com> Cc: Jian J Wang <jian.j.wang@intel.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Star Zeng <star.zeng@intel.com> Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com> Reviewed-by: Hao Wu <hao.a.wu@intel.com>
* MdeModulePkg EhciDxe: Extract new EhciInsertAsyncIntTransfer functionStar Zeng2018-10-283-25/+111
| | | | | | | | | | | | | | | | | | | | | | | | | V3: Match function parameter name and description between EhciSched.c and EhciSched.h. V2: Add the missing "gBS->FreePool (Data);". REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1274 Extract new EhciInsertAsyncIntTransfer function from EhcAsyncInterruptTransfer. It is code preparation for following patch, no essential functional change. Cc: Ruiyu Ni <ruiyu.ni@intel.com> Cc: Hao Wu <hao.a.wu@intel.com> Cc: Jian J Wang <jian.j.wang@intel.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Star Zeng <star.zeng@intel.com> Reviewed-by: Hao Wu <hao.a.wu@intel.com>
* MdeModulePkg XhciDxe: Extract new XhciInsertAsyncIntTransfer functionStar Zeng2018-10-283-17/+94
| | | | | | | | | | | | | | | | | | | | | | | | | | V3: Match function parameter name and description between XhciSched.c and XhciSched.h. V2: Add the missing "FreePool (Data);". Remove the unnecessary indentation change. REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1274 Extract new XhciInsertAsyncIntTransfer function from XhcAsyncInterruptTransfer. It is code preparation for following patch, no essential functional change. Cc: Ruiyu Ni <ruiyu.ni@intel.com> Cc: Hao Wu <hao.a.wu@intel.com> Cc: Jian J Wang <jian.j.wang@intel.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Star Zeng <star.zeng@intel.com> Reviewed-by: Hao Wu <hao.a.wu@intel.com>
* UefiCpuPkg/RegisterCpuFeaturesLib: Fix GCC build failure.Dong, Eric2018-10-272-2/+2
| | | | | | | Cc: Liming Gao <liming.gao@intel.com> Cc: Dandan Bi <dandan.bi@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Eric Dong <eric.dong@intel.com>
* MdeModulePkg/Core: correct one coding styleJian J Wang2018-10-271-1/+1
| | | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1284 Non-Boolean comparisons should use a compare operator (==, !=, >, < >=, <=) Cc: Dandan Bi <dandan.bi@intel.com> Cc: Star Zeng <star.zeng@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Jian J Wang <jian.j.wang@intel.com> Reviewed-by: Dandan Bi <dandan.bi@intel.com>
* BaseTools: Sync the DevicePath Function update from MdePkgFeng, YunhuaX2018-10-273-13/+50
| | | | | | | | | | Update the AcpiExp, USBxxx, Sata, VENDOR_DEVICE_PATH. Cc: Liming Gao <liming.gao@intel.com> Cc: Yonghong Zhu <yonghong.zhu@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Yunhua Feng <yunhuax.feng@intel.com> Reviewed-by: Yonghong Zhu <yonghong.zhu@intel.com>
* BaseTools: Rollback Filter out unused structure pcdsFeng, Bob C2018-10-271-19/+0
| | | | | | | | | | | | | This reverts commit 51d17bb7b0da0d9c9e91c226f1982d7020f43795. commit 51d17bb7b0da0d9c9e91c226f1982d7020f43795 adds new check of Pcds in the platform unused library INF files. It breaks the existing platform. To avoid the impact, roll back this change first. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Bob C Feng <bob.c.feng@intel.com> Cc: Liming Gao <liming.gao@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
* MdeModulePkg RegularExpressionDxe: Remove unknown build option for XCODELiming Gao2018-10-261-0/+4
| | | | | | | | | This patch makes RegularExpressionDxe pass XCODE5 build. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Liming Gao <liming.gao@intel.com> Cc: Star Zeng <star.zeng@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com>
* BaseTools: Allow multiple PciDeviceId in Fdf OptionROM overrideTomas Pilar2018-10-261-4/+6
| | | | | | Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Tomas Pilar <tpilar@solarflare.com> Reviewed-by: Yonghong Zhu <yonghong.zhu@intel.com>
* BaseTools: Fix BPDG tool print traceback info issueFeng, YunhuaX2018-10-262-4/+6
| | | | | | | | | | | Fix BPDG tool print traceback info issue and remove abundant code Cc: Liming Gao <liming.gao@intel.com> Cc: Yonghong Zhu <yonghong.zhu@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Yunhua Feng <yunhuax.feng@intel.com> Reviewed-by: Yonghong Zhu <yonghong.zhu@intel.com>
* MdeModulePkg/Core: fix an IA32 build failureJian J Wang2018-10-261-5/+5
| | | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1277 The failure is caused by data type conversion between UINTN and UINT64, which is checked in at 63ebde8ef6d4ff497d054ccc010904ecd4441198. Cc: Star Zeng <star.zeng@intel.com> Cc: Liming Gao <liming.gao@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Jian J Wang <jian.j.wang@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com>
* MdeModulePkg/HiiDB: Make sure database update behaviors are atomicDandan Bi2018-10-264-1/+75
| | | | | | | | | | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1235 When update contents in HiiDatabase, like: 1. Add/update/remove package list 2. Add/update string 3. Add/update image We should make these operations atomic to prevent the potential issue that the one update operation with higher TPL may interrupt another. This commit is to make the HiiDatabase update behaviors atomic by adding EfiAcquireLock/EfiReleaseLock function. Cc: Liming Gao <liming.gao@intel.com> Cc: Eric Dong <eric.dong@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Dandan Bi <dandan.bi@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
* MdeModulePkg/HiiDB: Reorganize codes of exporting HII settingsDandan Bi2018-10-263-47/+37
| | | | | | | | | | | | | | | | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1235 Function "HiiGetConfigurationSetting" may be called when HiiDatabase contents have been updated. And it is just to call function "HiiGetDatabaseInfo" to get the contents in HiiDatabase and call function "HiiGetConfigRespInfo" and get the configuration response string form HII drivers. So here we can remove function "HiiGetConfigurationSetting" and make caller to call "HiiGetDatabaseInfo" and "HiiGetConfigRespInfo" directly. And thus it also can distinguish which code blocks are to operate HiiDatabase contents and which code blocks are not. Then it's easy to know which code blocks should be atomic when updating HiiDatabase contents. Cc: Liming Gao <liming.gao@intel.com> Cc: Eric Dong <eric.dong@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Dandan Bi <dandan.bi@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
* BaseTools: Roll back code modify by commit 9e47e6f90880Feng, YunhuaX2018-10-261-2/+2
| | | | | | | | | | Roll back code modify by commit 9e47e6f90880, if ForceRebase not False or True, the GenFv command not need add parameter Cc: Liming Gao <liming.gao@intel.com> Cc: Yonghong Zhu <yonghong.zhu@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Yunhua Feng <yunhuax.feng@intel.com>
* UefiCpuPkg/RegisterCpuFeaturesLib: Support combo CPU feature style.Eric Dong2018-10-263-67/+45
| | | | | | | | | | | | Current code assume only one dependence (before or after) for one feature. Enhance code logic to support feature has two dependence (before and after) type. Cc: Ruiyu Ni <ruiyu.ni@intel.com> Cc: Laszlo Ersek <lersek@redhat.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Eric Dong <eric.dong@intel.com> Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
* IntelFsp2Pkg: Fix GCC49/XCODE build failureChasel, Chiu2018-10-261-3/+2
| | | | | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1276 Fixed potentially uninitialized variable build failure caused by commit: b1cc6f672f3b924cdb190e5b92db3b47f46a8911 Test: Verified on internal platform and boots successfully. Cc: Jiewen Yao <Jiewen.yao@intel.com> Cc: Desimone Nathaniel L <nathaniel.l.desimone@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Chasel Chiu <chasel.chiu@intel.com> Reviewed-by: Jiewen Yao <Jiewen.yao@intel.com>
* UefiCpuPkg/PiSmmCpuDxeSmm: Fix build failure for VS2012 and GCC49.Eric Dong2018-10-261-0/+1
| | | | | | | | | | | | Code initialized in function can't be correctly detected by build tool. Add code to clearly initialize the local variable before use it. Cc: Ruiyu Ni <ruiyu.ni@intel.com> Cc: Laszlo Ersek <lersek@redhat.com> Cc: Dandan Bi <dandan.bi@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Eric Dong <eric.dong@intel.com> Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
* UefiCpuPkg/PiSmmCpuDxeSmm: Clean up useless code.Eric Dong2018-10-262-25/+1
| | | | | | | | | | | Remove useless code after change 93324390. Cc: Ruiyu Ni <ruiyu.ni@intel.com> Cc: Laszlo Ersek <lersek@redhat.com> Cc: Dandan Bi <dandan.bi@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Eric Dong <eric.dong@intel.com> Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
* UefiCpuPkg/PiSmmCpuDxeSmm: Remove white space at line end.Eric Dong2018-10-261-2/+2
| | | | | | | | | | | Remove extra white space at the end of line. Cc: Ruiyu Ni <ruiyu.ni@intel.com> Cc: Laszlo Ersek <lersek@redhat.com> Cc: Dandan Bi <dandan.bi@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Eric Dong <eric.dong@intel.com> Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
* UefiCpuPkg/RegisterCpuFeaturesLib: Fix ECC issues.Eric Dong2018-10-262-12/+14
| | | | | | | | | | | | | | Changes include: 1. Remove extra white space at the end of line. 2. Add comments for the new add function parameter. 3. Update IN OUT tag for function parameter. Cc: Dandan Bi <dandan.bi@intel.com> Cc: Ruiyu Ni <ruiyu.ni@intel.com> Cc: Laszlo Ersek <lersek@redhat.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Eric Dong <eric.dong@intel.com> Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
* UefiCpuPkg/CpuCommonFeaturesLib: Remove white space at line end.Eric Dong2018-10-261-1/+1
| | | | | | | | | | | Remove extra white space at the end of line. Cc: Ruiyu Ni <ruiyu.ni@intel.com> Cc: Laszlo Ersek <lersek@redhat.com> Cc: Dandan Bi <dandan.bi@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Eric Dong <eric.dong@intel.com> Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
* UefiCpuPkg/RegisterCpuFeaturesLib: Fix build failure for VS2012 and GCC49.Eric Dong2018-10-261-0/+1
| | | | | | | | | | | | Code initialized in function can't be correctly detected by build tool. Add code to clearly initialize the local variable before use it. Cc: Ruiyu Ni <ruiyu.ni@intel.com> Cc: Laszlo Ersek <lersek@redhat.com> Cc: Dandan Bi <dandan.bi@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Eric Dong <eric.dong@intel.com> Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
* BaseTools:Not miss the full assign value of FixedAtBuild structure PCDZhaozh1x2018-10-261-12/+16
| | | | | | | | | | | | For structure PCD, if it is a FixedAtBuild PCD, the full assign value in dsc file should not be missed when updating the structure PCD value. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: ZhiqiangX Zhao <zhiqiangx.zhao@intel.com> Cc: Liming Gao <liming.gao@intel.com> Cc: Yonghong Zhu <yonghong.zhu@intel.com> Cc: Bob Feng <bob.c.feng@intel.com> Reviewed-by: Bob Feng <bob.c.feng@intel.com>
* MdeModulePkg/Core: add freed-memory guard featureJian J Wang2018-10-266-34/+525
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Freed-memory guard is used to detect UAF (Use-After-Free) memory issue which is illegal access to memory which has been freed. The principle behind is similar to pool guard feature, that is we'll turn all pool memory allocation to page allocation and mark them to be not-present once they are freed. This also implies that, once a page is allocated and freed, it cannot be re-allocated. This will bring another issue, which is that there's risk that memory space will be used out. To address it, the memory service add logic to put part (at most 64 pages a time) of freed pages back into page pool, so that the memory service can still have memory to allocate, when all memory space have been allocated once. This is called memory promotion. The promoted pages are always from the eldest pages which haven been freed. This feature brings another problem is that memory map descriptors will be increased enormously (200+ -> 2000+). One of change in this patch is to update MergeMemoryMap() in file PropertiesTable.c to allow merge freed pages back into the memory map. Now the number can stay at around 510. Cc: Star Zeng <star.zeng@intel.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Ruiyu Ni <ruiyu.ni@intel.com> Cc: Laszlo Ersek <lersek@redhat.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Jian J Wang <jian.j.wang@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com>
* MdeModulePkg/Core: prevent re-acquire GCD memory lockJian J Wang2018-10-261-25/+62
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This issue is hidden in current code but exposed by introduction of freed-memory guard feature due to the fact that the feature will turn all pool allocation to page allocation. The solution is moving the memory allocation in CoreGetMemorySpaceMap() to be out of the GCD memory map lock. CoreDumpGcdMemorySpaceMap() => CoreGetMemorySpaceMap() => CoreAcquireGcdMemoryLock () * AllocatePool() => InternalAllocatePool() => CoreAllocatePool() => CoreAllocatePoolI() => CoreAllocatePoolPagesI() => CoreAllocatePoolPages() => FindFreePages() => PromoteMemoryResource() => CoreAcquireGcdMemoryLock() ** Cc: Star Zeng <star.zeng@intel.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Ruiyu Ni <ruiyu.ni@intel.com> Cc: Laszlo Ersek <lersek@redhat.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Jian J Wang <jian.j.wang@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com>
* UefiCpuPkg/CpuDxe: prevent recursive calling of InitializePageTablePoolJian J Wang2018-10-261-2/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The freed-memory guard feature will cause a recursive calling of InitializePageTablePool(). This is due to a fact that AllocateAlignedPages() is used to allocate page table pool memory. This function will most likely call gBS->FreePages to free unaligned pages and then cause another round of page attributes change, like below (freed pages will be always marked not-present if freed-memory guard is enabled) FreePages() <===============| => CpuSetMemoryAttributes() | => <if out of page table> | => InitializePageTablePool() | => AllocateAlignedPages() | => FreePages() ================| The solution is add a global variable as a lock in page table pool allocation function and fail any other requests if it has not been done. Since this issue will only happen if free-memory guard is enabled, it won't affect CpuSetMemoryAttributes() in default build of a BIOS. If free-memory guard is enabled, it only affect the pages (failed to mark them as not-present) freed in AllocateAlignedPages(). Since those freed pages haven't been used yet (their addresses not yet exposed to code outside AllocateAlignedPages), it won't compromise the freed-memory guard feature. This change will just fail the CpuSetMemoryAttributes() called from FreePages() but it won't fail the FreePages(). So the error status won't be propagated upper layer of code. Cc: Laszlo Ersek <lersek@redhat.com> Cc: Star Zeng <star.zeng@intel.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Ruiyu Ni <ruiyu.ni@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Jian J Wang <jian.j.wang@intel.com> Reviewed-by: Eric Dong <eric.dong@intel.com>
* UefiCpuPkg/CpuDxe: consider freed-memory guard in non-stop modeJian J Wang2018-10-261-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | Non-stop mode was introduced / explained in commit 8f2613628acf ("MdeModulePkg/MdeModulePkg.dec: add new settings for PCDs", 2018-08-30). The macro HEAP_GUARD_NONSTOP_MODE was added to CpuDxe in commit dcc026217fdc ("UefiCpuPkg/CpuDxe: implement non-stop mode for uefi", 2018-08-30). Another instance of the macro HEAP_GUARD_NONSTOP_MODE was added to PiSmmCpuDxeSmm -- with BIT1|BIT0 replaced with BIT3|BIT2 -- in commit 09afd9a42a7f ("UefiCpuPkg/PiSmmCpuDxeSmm: implement non-stop mode for SMM", 2018-08-30) Since the freed-memory guard is for UEFI-only. This patch only updates HEAP_GUARD_NONSTOP_MODE in "UefiCpuPkg/CpuDxe/CpuDxe.h" (add BIT4). Cc: Laszlo Ersek <lersek@redhat.com> Cc: Star Zeng <star.zeng@intel.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Ruiyu Ni <ruiyu.ni@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Jian J Wang <jian.j.wang@intel.com> Reviewed-by: Eric Dong <eric.dong@intel.com>
* MdeModulePkg: introduce UEFI freed-memory guard bit in HeapGuard PCDJian J Wang2018-10-262-8/+22
| | | | | | | | | | | | | | | | | | | | | | | | UAF (Use-After-Free) memory issue is kind of illegal access to memory which has been freed. It can be detected by a new freed-memory guard enforced onto freed memory. BIT4 of following PCD is used to enable the freed-memory guard feature. gEfiMdeModulePkgTokenSpaceGuid.PcdHeapGuardPropertyMask Please note this feature is for debug purpose and should not be enabled in product BIOS, and cannot be enabled with pool/page heap guard at the same time. It's disabled by default. Cc: Star Zeng <star.zeng@intel.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Ruiyu Ni <ruiyu.ni@intel.com> Cc: Laszlo Ersek <lersek@redhat.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Jian J Wang <jian.j.wang@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com>
* MdeModulePkg: cleanup Heap Guard pool/page type PCD documentationJian J Wang2018-10-262-0/+6
| | | | | | | | | | | | | | | | | | This cleanup is meant for avoiding misuse of newly introduced BIT4 (UAF detection) of PCD PcdHeapGuardPropertyMask, because it applies to all types of physical memory. In another words, PcdHeapGuardPoolType and PcdHeapGuardPageType don't have effect to the BIT4 of PcdHeapGuardPropertyMask. Cc: Star Zeng <star.zeng@intel.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Ruiyu Ni <ruiyu.ni@intel.com> Cc: Laszlo Ersek <lersek@redhat.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Jian J Wang <jian.j.wang@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com>
* SecurityPkg/Include/Library/TcgStorageOpalLib.h: Update Pyrite spec revision.Eric Dong2018-10-261-2/+2
| | | | | | | | | Pyrite 2.0 spec has been published, update the spec link info for this file. Cc: Hao Wu <hao.a.wu@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Eric Dong <eric.dong@intel.com> Reviewed-by: Hao Wu <hao.a.wu@intel.com>
* BaseTools/GenFds: create and use new variable in FdfParserCarsey, Jaben2018-10-251-22/+23
| | | | | | | | | | | replace lots of '}' and "}" with a shared new consistent variable. Cc: Bob Feng <bob.c.feng@intel.com> Cc: Yonghong Zhu <yonghong.zhu@intel.com> Cc: Liming Gao <liming.gao@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Jaben Carsey <jaben.carsey@intel.com> Reviewed-by: Yonghong Zhu <yonghong.zhu@intel.com>
* BaseTools/GenFds: refactor FdfParser warningsCarsey, Jaben2018-10-251-300/+303
| | | | | | | | | | | make functions for common error messages refactor to use these functions Cc: Yonghong Zhu <yonghong.zhu@intel.com> Cc: Liming Gao <liming.gao@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Jaben Carsey <jaben.carsey@intel.com> Reviewed-by: Yonghong Zhu <yonghong.zhu@intel.com>
* BaseTools/GenFds: remove MacroDict parameterJaben Carsey2018-10-251-32/+16
| | | | | | | | | | | | | The MacroDict parameter goes around in circles through 4 functions without use. 1. GetSectionData calls into GetLeafSection, otherwise doesn?t use MacroDict 2. GetLeafSection calls into GetFileStatement, otherwise doesn?t use MacroDict 3. GetFileStatement calls into GetFilePart, otherwise doesn?t use MacroDict 4. GetFilePart calls into GetSectionData, otherwise doesn?t use MacroDict Go to 1 and repeat forever. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Jaben Carsey <jaben.carsey@intel.com> Reviewed-by: Yonghong Zhu <yonghong.zhu@intel.com>
* Basetools/GenFds: refactor class FVCarsey, Jaben2018-10-252-9/+6
| | | | | | | | | | | 1) initialize UiFvName via __init__ parameter. No change to default behavior. 2) initialize 3 empty lists in __init__. Curently not guarenteed initialized. Cc: Yonghong Zhu <yonghong.zhu@intel.com> Cc: Liming Gao <liming.gao@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Jaben Carsey <jaben.carsey@intel.com> Reviewed-by: Yonghong Zhu <yonghong.zhu@intel.com>
* BaseTools/GenFds: change objects to setsCarsey, Jaben2018-10-251-102/+126
| | | | | | | | | | | | Change lists and tuples used solely for "in" testing to sets. These operations are not order dependent. fixed some line length for PEP8 compliance on some. Cc: Liming Gao <liming.gao@intel.com> Cc: Yonghong Zhu <yonghong.zhu@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Jaben Carsey <jaben.carsey@intel.com> Reviewed-by: Yonghong Zhu <yonghong.zhu@intel.com>
* BaseTools/GenFds: cleanup GenFdsCarsey, Jaben2018-10-2524-2025/+2190
| | | | | | | | | | | | | | | | | | | 1) remove wildcard imports and use explicit imports 2) refactor to use shared variables from Common/DataType 3) rename to not shadow imports 4) don't assign a variable in a loop (just do final assignment) 5) remove spaces, parens, unused or commented out code, etc. 6) merge unnecessary parent classes into child 7) refactor to share DXE and PEI apriori GUIDs from one place this includes changes to Build and EOT files 8) for PEP8, dont use __ for custom methods. Cc: Yonghong Zhu <yonghong.zhu@intel.com> Cc: Liming Gao <liming.gao@intel.com> Cc: Bob C Feng <bob.c.feng@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Jaben Carsey <jaben.carsey@intel.com> Reviewed-by: Yonghong Zhu <yonghong.zhu@intel.com>
* Maintainers.txt: add DynamicTablesPkgLeif Lindholm2018-10-251-0/+5
| | | | | | | | | | | | | | | | DynamicTablesPkg has been in edk2-staging[1] for some time now, and it is time for it to move into the main tree. [1] https://github.com/tianocore/edk2-staging/tree/dynamictables Add Evan and Sami as maintainers of the new package, and let them bring it in themselves. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Leif Lindholm <leif.lindholm@linaro.org> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com> Reviewed-by: Evan Lloyd <evan.lloyd@arm.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
* IntelFsp2Pkg: FSP should not override IDTChasel, Chiu2018-10-254-9/+26
| | | | | | | | | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1265 FSP should not override IDT table when it is initialized by boot loader. IDT should be re-initialized in FSP only when it is invalid. To mitigate temporary memory usage a PCD PcdFspMaxInterruptSupported created for platform to decide how many interrupts the FSP IDT table can support. Test: Verified on internal platform and boots successfully. Cc: Jiewen Yao <Jiewen.yao@intel.com> Cc: Desimone Nathaniel L <nathaniel.l.desimone@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Chasel Chiu <chasel.chiu@intel.com> Reviewed-by: Jiewen Yao <Jiewen.yao@intel.com>
* BaseTools: list .nasm include inc files as its dependencyzhijufan2018-10-251-1/+1
| | | | | | | | | | | | | | .nasm source file may include some header files. header file should be listed in Makefile as .nasm source file dependency. But now, BaseTools doesn't find them and list them in Makefile. This is a missing, because original ASM file supports it. Cc: Liming Gao <liming.gao@intel.com> Cc: Yonghong Zhu <yonghong.zhu@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Zhiju.Fan <zhijux.fan@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
* BaseTools: Fix VPD PCD Sub-section display bugYonghong Zhu2018-10-251-29/+17
| | | | | | | | | | | | original we get the VPD PCD items from the VPDGuid.map file in the FV output folder. but this logic doesn't work when 1) there only have single non Default SKU, 2) there have multiple SKU with same value. Now we change it to get the really VPD Pcd items that already display in the PCD section of the report. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Yonghong Zhu <yonghong.zhu@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
* BaseTools: Fix the bug for Pcd used in command line's overrideYonghong Zhu2018-10-252-0/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | V2: remove the not used parameter i Fix the bug for Pcd used in command line not override the Pcd used in the [component] driver's sub-section. Case: DSC file: [PcdsFixedAtBuild] TokenSpaceGuid.PcdTest [Components] TestPkg/TestDriver.inf { <PcdsFixedAtBuild> TokenSpaceGuid.PcdTest|"b" } build command with --pcd TokenSpaceGuid.PcdTest="AAAABB" Then we found the Pcd value in the AutoGen.c file is incorrect, because of the incorrect logic that use the pcd in the [component] section to re-override it. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Yonghong Zhu <yonghong.zhu@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
* MdeModulePkg/NvmExpressDxe: Refine PassThru IO queue creation behaviorHao Wu2018-10-253-9/+29
| | | | | | | | | | | | | | | | | | | | | REF:https://bugzilla.tianocore.org/show_bug.cgi?id=1260 For the PassThru() service of NVM Express Pass Through Protocol, the current implementation (function NvmExpressPassThru()) will only use the IO Completion/Submission queues created internally by this driver during the controller initialization process. Any other IO queues created will not be consumed. So the value is little to accept external IO Completion/Submission queue creation request. This commit will refine the behavior of function NvmExpressPassThru(), it will only accept driver internal IO queue creation commands and will return "EFI_UNSUPPORTED" for external ones. Cc: Jiewen Yao <Jiewen.yao@intel.com> Cc: Star Zeng <star.zeng@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Hao Wu <hao.a.wu@intel.com> Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
* MdeModulePkg/NvmExpressDxe: Always copy CQ entry to PassThru packetHao Wu2018-10-251-5/+4
| | | | | | | | | | | | | | | | | | | | REF:https://bugzilla.tianocore.org/show_bug.cgi?id=1259 According to the the NVM Express spec Revision 1.1, for some commands, command-related information will be stored in the Dword 0 of the completion queue entry. One case is for the Get Features Command (Section 5.9.2 of the spec), Dword 0 of the completion queue entry may contain feature information. Hence, this commit will always copy the content of completion queue entry to the PassThru packet regardless of the execution result of the command. Cc: Liangcheng Tang <liangcheng.tang@intel.com> Cc: Star Zeng <star.zeng@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Hao Wu <hao.a.wu@intel.com> Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
* MdeModulePkg/NvmExpressDxe: Refine data buffer & len check in PassThruHao Wu2018-10-251-15/+18
| | | | | | | | | | | | | | | | | | | | REF:https://bugzilla.tianocore.org/show_bug.cgi?id=1142 According to the the NVM Express spec Revision 1.1, for some commands (like Get/Set Feature Command, Figure 89 & 90 of the spec), the Memory Buffer maybe optional although the command opcode indicates there is a data transfer between host & controller (Get/Set Feature Command, Figure 38 of the spec). Hence, this commit refine the checks for the 'TransferLength' and 'TransferBuffer' field of the EFI_NVM_EXPRESS_PASS_THRU_COMMAND_PACKET structure to address this issue. Cc: Liangcheng Tang <liangcheng.tang@intel.com> Cc: Star Zeng <star.zeng@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Hao Wu <hao.a.wu@intel.com> Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
* IntelSiliconPkg VTdDxe: Report status code for VTd errorStar Zeng2018-10-254-0/+10
| | | | | | | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1273 Current code only uses DEBUG() for VTd error. This patch updates to also report status code for VTd error. Test done: Created case that has VTd error and confirmed the error status code could be reported as expected. Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Rangasai V Chaganty <rangasai.v.chaganty@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Star Zeng <star.zeng@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
* IntelSiliconPkg VTdDxe: Option to force no early access attr requestStar Zeng2018-10-253-1/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1272 To have high confidence in usage for platform, add option (BIT2 of PcdVTdPolicyPropertyMask) to force no IOMMU access attribute request recording before DMAR table is installed. Check PcdVTdPolicyPropertyMask BIT2 before RequestAccessAttribute() and ProcessRequestedAccessAttribute(), then RequestAccessAttribute(), ProcessRequestedAccessAttribute() and mAccessRequestXXX variables could be optimized by compiler when PcdVTdPolicyPropertyMask BIT2 = 1. Test done: 1: Created case that has IOMMU access attribute request before DMAR table is installed, ASSERT was triggered after setting PcdVTdPolicyPropertyMask BIT2 to 1. 2. Confirmed RequestAccessAttribute(), ProcessRequestedAccessAttribute() and mAccessRequestXXX variables were optimized by compiler after setting PcdVTdPolicyPropertyMask BIT2 to 1. Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Rangasai V Chaganty <rangasai.v.chaganty@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Star Zeng <star.zeng@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
* MdeModulePkg/UsbBus: Removing trailing spacesRuiyu Ni2018-10-251-2/+2
| | | | | Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
* BaseTools: Move PcdValueInit to platform build folderBobCF2018-10-251-8/+17
| | | | | | | | | | PcdValueInit tool is platform scope. It should be generated into Platform output directory. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Bob C Feng <bob.c.feng@intel.com> Cc: Liming Gao <liming.gao@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
* BaseTool: Filter out unused structure pcdsBobCF2018-10-251-0/+19
| | | | | | | | | | | The current code handle all the structure pcds even if there is no module or library use them. This patch is going to filter out the unused structure pcds. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Bob Feng <bob.c.feng@intel.com> Cc: Liming Gao <liming.gao@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
* BaseTools: Remove Arch specific build options for PcdValueInit tool.BobCF2018-10-241-1/+1
| | | | | | | | | PcdValueInit tool is Arch independent, the Arch specific build options should be removed from PcdValueInit makefile. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Bob C Feng <bob.c.feng@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-17 23:38:08 +0000