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* NetworkPkg: Replace ASSERT with error return code in PXE and HTTP boot driver.Fu Siyuan2016-12-194-66/+184
| | | | | | | | | | This patch remove the ASSERT when receive a DHCP packet large than the maximum cache buffer size. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Fu Siyuan <siyuan.fu@intel.com> Reviewed-by: Ye Ting <ting.ye@intel.com> Reviewed-by: Wu Jiaxin <jiaxin.wu@intel.com>
* MdeModulePkg: Replace ASSERT with error return code in PXE driver.Fu Siyuan2016-12-192-36/+68
| | | | | | | | | | This patch remove the ASSERT when receive a DHCP packet large than the maximum cache buffer size. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Fu Siyuan <siyuan.fu@intel.com> Reviewed-by: Ye Ting <ting.ye@intel.com> Reviewed-by: Wu Jiaxin <jiaxin.wu@intel.com>
* Omap35xxPkg/PciEmulation: port to new non-discoverable device infrastructureArd Biesheuvel2016-12-187-1161/+38
| | | | | | | | | | Move to the new non-discoverable device protocols for wiring the PCI based EHCI controller driver to the non-discoverable EHCI controller found on the OMAP 3530. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
* SecurityPkg: Tcg2Dxe: Report correct FinalEventLog sizeZhang, Chao B2016-12-161-1/+1
| | | | | | | | | | | Update debug log to report correct FinalEventLog size. Cc: Yao Jiewen <jiewen.yao@intel.com> Cc: Star Zeng <star.zeng@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Chao Zhang <chao.b.zhang@intel.com> Reviewed-by: Yao Jiewen <jiewen.yao@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com>
* UefiCpuPkg/Cpuid.h: Update CPUID definitions with SDM (Sep.2016)Hao Wu2016-12-162-153/+325
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | https://bugzilla.tianocore.org/show_bug.cgi?id=176 Update CPUID leaf and sub-leaf indexes and structures as described by Intel(R) 64 and IA-32 Architectures Software Developer's Manual, Volume 2A, September 2016, CPUID instruction. Summary of incompatible changes: 1. Field name changes in CPUID_STRUCTURED_EXTENDED_FEATURE_FLAGS_EBX Bit 12 has been renamed from 'PQM' to 'RDT_M' and bit 15 has been renamed from 'PQE' to 'RDT_A'. 2. Stucture and filed name changes for 'CPUID Platform QoS Monitoring Information' related definitions Definition 'CPUID_PLATFORM_QOS_MONITORING' has been renamed to 'CPUID_INTEL_RDT_MONITORING'. Definition 'CPUID_PLATFORM_QOS_MONITORING_ENUMERATION_SUB_LEAF' has been renamed to 'CPUID_INTEL_RDT_MONITORING_ENUMERATION_SUB_LEAF'. Definition 'CPUID_PLATFORM_QOS_MONITORING_CAPABILITY_SUB_LEAF' has been renamed to 'CPUID_INTEL_RDT_MONITORING_L3_CACHE_SUB_LEAF'. 3. Stucture and filed name changes for 'CPUID Platform QoS Enforcement Information' related definitions Definition 'CPUID_PLATFORM_QOS_ENFORCEMENT' has been renamed to 'CPUID_INTEL_RDT_ALLOCATION'. Definition 'CPUID_PLATFORM_QOS_ENFORCEMENT_MAIN_LEAF' has been renamed to 'CPUID_INTEL_RDT_ALLOCATION_ENUMERATION_SUB_LEAF'. Definition 'CPUID_PLATFORM_QOS_ENFORCEMENT_RESID_SUB_LEAF' has been renamed to 'CPUID_INTEL_RDT_ALLOCATION_L3_CACHE_SUB_LEAF'. This commit also updates the relating codes in UefiCpuPkg/Application/Cpuid to reflect the changes. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Hao Wu <hao.a.wu@intel.com> Reviewed-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Michael Kinney <michael.d.kinney@intel.com>
* UefiCpuPkg/Include: Add Goldmont MSR header file with SDM (Sep.2016)Hao Wu2016-12-162-1/+2517
| | | | | | | | | | | | | https://bugzilla.tianocore.org/show_bug.cgi?id=176 Add the MSR header file of Goldmont processor according to Intel(R) 64 and IA-32 Architectures Software Developer's Manual, Volume 3, September 2016, Chapter 35 Model-Specific-Registers (MSR), Section 35.5. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Hao Wu <hao.a.wu@intel.com> Reviewed-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Michael Kinney <michael.d.kinney@intel.com>
* UefiCpuPkg/Include: Update Skylake MSR header file with SDM (Sep.2016)Hao Wu2016-12-161-20/+1169
| | | | | | | | | | | | | | | | | | https://bugzilla.tianocore.org/show_bug.cgi?id=176 Update the MSR header file of Skylake processor according to Intel(R) 64 and IA-32 Architectures Software Developer's Manual, Volume 3, September 2016, Chapter 35 Model-Specific-Registers (MSR), Section 35.15. Summary of incompatible changes: 1. MSR (address 38EH) IA32_PERF_GLOBAL_STAUS has been renamed to IA32_PERF_GLOBAL_STATUS Typo 'STAUS' has been fixed in SDM. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Hao Wu <hao.a.wu@intel.com> Reviewed-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Michael Kinney <michael.d.kinney@intel.com>
* UefiCpuPkg/Include: Update MSR header files with SDM (Sep.2016)Hao Wu2016-12-1619-2656/+1312
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | https://bugzilla.tianocore.org/show_bug.cgi?id=176 Update MSR header files of processors (excluding Goldmont and Skylake processors) according to Intel(R) 64 and IA-32 Architectures Software Developer's Manual, Volume 3, September 2016, Chapter 35 Model-Specific-Registers (MSR). Summary of incompatible changes: General: 1. MSR (address 38EH) IA32_PERF_GLOBAL_STAUS in processor-specific header files has been removed or renamed to IA32_PERF_GLOBAL_STATUS Typo 'STAUS' has been fixed in SDM. If the MSR definition is the same with architectural MSR, we remove it. Otherwise, we rename the MSR. 2. MSRs (address starting from 400H) MSR_MC{X}_{XXX} (like MSR_MC4_STATUS) in processor-specific header files have been removed or renamed to IA32_MC{X}_{XXX} (like IA32_MC4_STATUS) Register name change from 'MSR_MC{X}_{XXX}' to 'IA32_MC{X}_{XXX}' in SDM. If the MSR definition is the same with architectural MSR, we remove it. Otherwise, we rename the MSR. Please note that for those MSRs still have name like 'MSR_MC{X}_{XXX}' in SDM are still kept in processor-specific header files. HaswellMsr.h: 1. MSR (address C80H) IA32_DEBUG_FEATURE has been removed Register name change from 'IA32_DEBUG_FEATURE' to 'IA32_DEBUG_INTERFACE' in SDM. Since the MSR definition is the same with architectural MSR, we remove it. SandyBridgeMsr.h: 1. MSR (address 391H) MSR_UNC_PERF_GLOBAL_CTRL, name change for bit fields 0:3 Bit description change from 'Core {X} select' to 'Slice {X} select' for bit 0:3 in SDM. SilvermontMsr.h: 1. MSR (address 2AH) MSR_EBL_CR_POWERON, structure definition changed Bit description for this MSR is totally changed in SDM, we modify the structure definition to align with it. XeonDMsr.h: 1. MSRs (address 630H to 632H) MSR_PKG_C8_RESIDENCY, MSR_PKG_C9_RESIDENCY and MSR_PKG_C10_RESIDENCY have been removed Those 3 MSRs are not defined for this processor in SDM, we remove them. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Hao Wu <hao.a.wu@intel.com> Reviewed-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Michael Kinney <michael.d.kinney@intel.com>
* ShellPkg/setvar: Correct typo in setvar help messageRuiyu Ni2016-12-161-3/+3
| | | | | | Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com> Reviewed-by: Jaben Carsey <jaben.carsey@intel.com>
* UefiCpuPkg/PiSmmCpuDxeSmm: Fix .S & .asm build failureFeng Tian2016-12-164-3/+4
| | | | | | | | | Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Jeff Fan <jeff.fan@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Feng Tian <feng.tian@intel.com> Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com> Reviewed-by: Jeff Fan <jeff.fan@intel.com>
* MdeModulePkg/NonDiscoverablePciDeviceDxe: add support for non-coherent DMAArd Biesheuvel2016-12-154-7/+367
| | | | | | | | | | | Add support for non-coherent DMA, either by performing explicit cache maintenance when DMA mappings are aligned to the CPU's DMA buffer alignment, or by bounce buffering via uncached mappings otherwise. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Tested-by: Marcin Wojtas <mw@semihalf.com> Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
* MdeModulePkg/CapsuleApp: Fix GUID/protocol format issuesDandan Bi2016-12-141-14/+14
| | | | | | | Cc: Jiewen Yao <jiewen.yao@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Dandan Bi <dandan.bi@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
* MdeModulePkg: Add missing info string for PCDsDandan Bi2016-12-142-0/+70
| | | | | | | | | | Some Pcds are added to the dec file, but miss to add the prompt&&help info to the uni file, now add them. Cc: Jiewen Yao <jiewen.yao@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Dandan Bi <dandan.bi@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
* MdeModulePkg: Make the comments align with the functionDandan Bi2016-12-144-14/+14
| | | | | | | Cc: Jiewen Yao <jiewen.yao@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Dandan Bi <dandan.bi@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
* UefiCpuPkg/Capsule: Fix coding style issuesDandan Bi2016-12-142-0/+2
| | | | | | | | Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Jeff Fan <jeff.fan@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Dandan Bi <dandan.bi@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
* UefiCpuPkg/MicrocodeUpdateDxe: Fix coding style issues in INF fileDandan Bi2016-12-141-2/+3
| | | | | | | | | | | 1. Add MicrocodeUpdate.h to the [Sources] section. 2. Fix the incorrect Guid/Protocol format issues. Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Jeff Fan <jeff.fan@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Dandan Bi <dandan.bi@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
* UefiCpuPkg: Add info string to UNI file for PcdCpuSmmStaticPageTableDandan Bi2016-12-141-0/+8
| | | | | | | | Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Jeff Fan <jeff.fan@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Dandan Bi <dandan.bi@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
* UefiCpuPkg: Make the comments align with the functionsDandan Bi2016-12-148-23/+24
| | | | | | | Cc: Jeff Fan <jeff.fan@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Dandan Bi <dandan.bi@intel.com> Reviewed-by: Jeff Fan <jeff.fan@intel.com>
* SignedCapsulePkg/IniParsingLib: Update struct nameDandan Bi2016-12-141-4/+4
| | | | | | | | | | | | | 1. Change _SECTION_ITEM to _INI_SECTION_ITEM 2. Change _COMMENT_LINE to _INI_COMMENT_LINE Because _SECTION_ITEM and _COMMENT_LINE are duplicated with the one defined in IntelFrameworkModulePkg\Universal\ FirmwareVolume\UpdateDriverDxe\UpdateDriver.h Cc: Jiewen Yao <jiewen.yao@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Dandan Bi <dandan.bi@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
* SignedCapsulePkg/SystemFirmwareUpdate: Add source file to INF fileDandan Bi2016-12-142-0/+2
| | | | | | | | | Add SystemFirmwareDxe.h to [Sources] section of INF file. Cc: Jiewen Yao <jiewen.yao@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Dandan Bi <dandan.bi@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
* SignedCapsulePkg/RecoveryModuleLoadPei: Add source file to INF fileDandan Bi2016-12-141-0/+1
| | | | | | | | | Add RecoveryModuleLoadPei.h to [Sources] section of INF file. Cc: Jiewen Yao <jiewen.yao@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Dandan Bi <dandan.bi@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
* SignedCapsulePkg/EdkiiSystemCapsuleLib: Fix coding style issues in INF fileDandan Bi2016-12-141-9/+9
| | | | | | | | | Fix incorrect Guid/Pcd format issues in INF file. Cc: Jiewen Yao <jiewen.yao@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Dandan Bi <dandan.bi@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
* SecurityPkg/OpalPasswordDxe: Make comments align with the functionDandan Bi2016-12-141-2/+2
| | | | | | | | Cc: Eric Dong <eric.dong@intel.com> Cc: Chao Zhang <chao.b.zhang@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Dandan Bi <dandan.bi@intel.com> Reviewed-by: Eric Dong <eric.dong@intel.com>
* SecurityPkg/FmpAuthenticationLibRsa2048Sha256: Fix Guid/pcd format issuesDandan Bi2016-12-141-3/+3
| | | | | | | | Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Chao Zhang <chao.b.zhang@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Dandan Bi <dandan.bi@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
* SecurityPkg/FmpAuthenticationLibPkcs7: Fix incorrect Guid formatDandan Bi2016-12-141-1/+1
| | | | | | | | Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Chao Zhang <chao.b.zhang@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Dandan Bi <dandan.bi@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
* Security:Add info string to UNI file for PcdPkcs7CertBufferDandan Bi2016-12-141-0/+7
| | | | | | | | Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Chao Zhang <chao.b.zhang@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Dandan Bi <dandan.bi@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
* ShellPkg/UefiShellNetwork2CommandsLib: Fix incorrect Protocol formatDandan Bi2016-12-141-1/+1
| | | | | | | | Cc: Fu Siyuan <siyuan.fu@intel.com> Cc: Ruiyu Ni <ruiyu.ni@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Dandan Bi <dandan.bi@intel.com> Reviewed-by: Jaben Carsey <jaben.carsey@intel.com>
* ShellPkg/UefiShellNetwork1CommandsLib: Fix incorrect Protocol formatDandan Bi2016-12-141-1/+1
| | | | | | | | Cc: Fu Siyuan <siyuan.fu@intel.com> Cc: Ruiyu Ni <ruiyu.ni@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Dandan Bi <dandan.bi@intel.com> Reviewed-by: Jaben Carsey <jaben.carsey@intel.com>
* ShellPkg/UefiShellDebug1CommandsLib: Fix coding style issuesDandan Bi2016-12-141-2/+3
| | | | | | | Cc: Ruiyu Ni <ruiyu.ni@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Dandan Bi <dandan.bi@intel.com> Reviewed-by: Jaben Carsey <jaben.carsey@intel.com>
* FatPkg/EnhancedFatDxe: Remove the file which is not usedDandan Bi2016-12-141-62/+0
| | | | | | Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Dandan Bi <dandan.bi@intel.com> Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
* MdeModulePkg EbcDxe: Fix CLANG38 build failureLiming Gao2016-12-141-2/+5
| | | | | | | | | Change structure value assignment with CopyMem() API. Cc: Jiewen Yao <jiewen.yao@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
* SecurityPkg:/Tcg2Dxe: remove 4G limitationJiewen Yao2016-12-131-4/+2
| | | | | | | | | | | Tcg2Dxe allocates event log below 4G. It is unnecessary. Cc: Chao Zhang <chao.b.zhang@intel.com> Cc: Star Zeng <star.zeng@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jiewen Yao <jiewen.yao@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com> Reviewed-by: Chao Zhang <chao.b.zhang@intel.com>
* MdeModulePkg/NonDiscoverablePciDev: Fix type mismatch in switch/caseHao Wu2016-12-131-24/+24
| | | | | | | | | | | | | | | Fix switch/case statement type mismatch in functions PciIoMemRead & PciIoMemWrite. Parameter 'Width' is of enum type EFI_PCI_IO_PROTOCOL_WIDTH, but the enum type provided in 'switch (Width)' block is of type EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH. Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org> Cc: Ruiyu Ni <ruiyu.ni@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Hao Wu <hao.a.wu@intel.com> Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
* MdeModulePkg/CapsuleLib: Correct debug message.Jiewen Yao2016-12-131-1/+1
| | | | | | | | Cc: Feng Tian <feng.tian@intel.com> Cc: Star Zeng <star.zeng@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jiewen Yao <jiewen.yao@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com>
* MdeModulePkg PiSmmCore: Retrieve Smram base address from system tableLiming Gao2016-12-123-41/+13
| | | | | | | | | | | PiSmmIpl records LoadModuleAtFixAddressSmramBase in LMFAConfigurationTable. Update PiSmmCore to directly get the address from this system table. Cc: Star Zeng <star.zeng@intel.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com>
* MdeModulePkg SmmIpl: Fill Smram range for SMM driver when LMFA enableLiming Gao2016-12-121-6/+34
| | | | | | | | | | | Allocate the additional Smram range to describe the reserved smram for SMM core and driver when LMFA feature is enabled. Cc: Star Zeng <star.zeng@intel.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com>
* MdeModulePkg PiSmmCore: Update FreePages to handle zero address and pagesLiming Gao2016-12-122-6/+6
| | | | | | | | | | | | https://bugzilla.tianocore.org/show_bug.cgi?id=278 Zero memory address or zero number pages are invalid to SmmFreePages(). Cc: Star Zeng <star.zeng@intel.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com>
* MdeModulePkg VariableSmm: Check InfoSize correctlyStar Zeng2016-12-121-8/+17
| | | | | | | | | | | | | | | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=290 Current SmmVariableGetStatistics() in VariableSmm.c is always checking input InfoSize against the first variable info, it is incorrect. For instance, there are three variables. BootOrder Boot0000 Boot0001 If the input InfoEntry is holding the second variable info (Boot0000) and InfoSize is sizeof (VARIABLE_INFO_ENTRY) + StrSize (L"Boot0000"), current code will return EFI_BUFFER_TOO_SMALL, but it should return the third variable info (Boot0001). This patch is to refine the code logic. Cc: Jiewen Yao <jiewen.yao@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Star Zeng <star.zeng@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
* MdeModulePkg VariableSmm: Do not need check CommBufferSize bufferStar Zeng2016-12-121-5/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Current code in SmmVariableHandler() checks CommBufferSize buffer to make sure it points to outside SMRAM in "case SMM_VARIABLE_FUNCTION_GET_STATISTICS". But after eaae7b33b1cf6b9f21db1636f219c2b6a8d88afd, CommBufferSize buffer points to SMRAM that was used by SMM core to cache CommSize from SmmCommunication protocol, then the check will fail definitely and GET_STATISTICS feature breaks. In fact, do not need check CommBufferSize buffer at all even before eaae7b33b1cf6b9f21db1636f219c2b6a8d88afd. Before eaae7b33b1cf6b9f21db1636f219c2b6a8d88afd, CommBufferSize buffer pointed to gSmmCorePrivate->BufferSize that is outside SMRAM, the check will success definitely; after eaae7b33b1cf6b9f21db1636f219c2b6a8d88afd, CommBufferSize buffer points to local variable BufferSize (in SMRAM) in SmmEntryPoint(), the check is not needed definitely. The patch is to remove the check. Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Jeff Fan <jeff.fan@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Star Zeng <star.zeng@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
* MdeModulePkg/NonDiscoverablePciDevice: add missing cast and EFIAPI modifiersArd Biesheuvel2016-12-091-1/+20
| | | | | | | | | | | | Add missing EFIAPI modifiers to the functions that are exposed via the PCI I/O protocol. At the same time, add a missing UINT8 cast which breaks the build on Visual Studio. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Dandan Bi <dandan.bi@intel.com>
* FatPkg: Fix format issues in dec/inf/dsc filesDandan Bi2016-12-094-7/+5
| | | | | | | Cc: Ruiyu Ni <ruiyu.ni@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Dandan Bi <dandan.bi@intel.com> Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
* FatPkg/EnhancedFatDxe: Add comments for functionsDandan Bi2016-12-093-0/+908
| | | | | | | Cc: Ruiyu Ni <ruiyu.ni@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Dandan Bi <dandan.bi@intel.com> Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
* FatPkg/EnhancedFatDxe: Make the comments align with EDKIIcoding styleDandan Bi2016-12-0921-2649/+1566
| | | | | | | Cc: Ruiyu Ni <ruiyu.ni@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Dandan Bi <dandan.bi@intel.com> Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
* FatPkg/EnhancedFatDxe: Use typedef for complex typeDandan Bi2016-12-092-19/+27
| | | | | | | Cc: Ruiyu Ni <ruiyu.ni@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Dandan Bi <dandan.bi@intel.com> Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
* FatPkg/EnhancedFatDxe: Make the variable name follow ruleDandan Bi2016-12-098-100/+100
| | | | | | | Cc: Ruiyu Ni <ruiyu.ni@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Dandan Bi <dandan.bi@intel.com> Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
* FatPkg/EnhancedFatDxe: Make function prototype align with definitionDandan Bi2016-12-091-2/+2
| | | | | | | Cc: Ruiyu Ni <ruiyu.ni@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Dandan Bi <dandan.bi@intel.com> Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
* FatPkg/EnhancedFatDxe: Use global variable replace static local variableDandan Bi2016-12-091-2/+2
| | | | | | | | | | Create global variable "mMonthDays" to replace static local variable "MonthDays" in FatIsValidTime() function in Misc.c. Cc: Ruiyu Ni <ruiyu.ni@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Dandan Bi <dandan.bi@intel.com> Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
* FatPkg/EnhancedFatDxe: Avoid Non-Boolean type uses as BooleanDandan Bi2016-12-091-2/+2
| | | | | | | Cc: Ruiyu Ni <ruiyu.ni@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Dandan Bi <dandan.bi@intel.com> Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
* MdeModulePkg/EbcDxe: Fix incorrect Copyright formatDandan Bi2016-12-0910-10/+10
| | | | | Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Dandan Bi <dandan.bi@intel.com>
* ShellPkg: Assign the correct value to ShellStatusGary Lin2016-12-091-3/+3
| | | | | | | | | | | | | | | | | Since the type of ShellStatus is SHELL_STATUS, we should use SHELL_INVALID_PARAMETER instead of EFI_INVALID_PARAMETER. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Gary Lin <glin@suse.com> Cc: Zhang Lubo <lubo.zhang@intel.com> Cc: Ye Ting <ting.ye@intel.com> Cc: Fu Siyuan <siyuan.fu@intel.com> Cc: Wu Jiaxin <jiaxin.wu@intel.com> Reviewed-by: Jaben Carsey <jaben.carsey@intel.com> Reviewed-by: Ye Ting <ting.ye@intel.com> Reviewed-by: Fu Siyuan <siyuan.fu@intel.com> Reviewed-by: Zhang Lubo <lubo.zhang@intel.com> Reviewed-by: Wu Jiaxin <jiaxin.wu@intel.com>
generated by cgit v1.2.3 (git 2.25.1) at 2024-08-22 11:00:44 +0000