summaryrefslogtreecommitdiffstats
path: root/ArmPkg/Drivers
Commit message (Collapse)AuthorAgeFilesLines
* ArmPkg: Fix Ecc error 8005 for SCMI_MESSAGE_ID_CLOCKPierre Gondois2021-04-151-5/+5
| | | | | | | | | | | | This patch fixes the following Ecc reported error: Variable name does not follow the rules: 1. First character should be upper case 2. Must contain lower case characters 3. No white space characters 4. Global variable name must start with a 'g' Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
* ArmPkg: Fix Ecc error 8005 for SCMI_MESSAGE_ID_BASEPierre Gondois2021-04-151-6/+6
| | | | | | | | | | | | This patch fixes the following Ecc reported error: Variable name does not follow the rules: 1. First character should be upper case 2. Must contain lower case characters 3. No white space characters 4. Global variable name must start with a 'g' Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
* ArmPkg: Fix Ecc error 8005 for SCMI_MESSAGE_IDPierre Gondois2021-04-152-6/+6
| | | | | | | | | | | | This patch fixes the following Ecc reported error: Variable name does not follow the rules: 1. First character should be upper case 2. Must contain lower case characters 3. No white space characters 4. Global variable name must start with a 'g' Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
* ArmPkg: Fix Ecc error 8005 for SCMI_STATUSPierre Gondois2021-04-152-12/+12
| | | | | | | | | | | | This patch fixes the following Ecc reported error: Variable name does not follow the rules: 1. First character should be upper case 2. Must contain lower case characters 3. No white space characters 4. Global variable name must start with a 'g' Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
* ArmPkg: Fix Ecc error 8005 for SCMI_MESSAGE_TYPEPierre Gondois2021-04-152-4/+4
| | | | | | | | | | | | This patch fixes the following Ecc reported error: Variable name does not follow the rules: 1. First character should be upper case 2. Must contain lower case characters 3. No white space characters 4. Global variable name must start with a 'g' Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
* ArmPkg: Fix Ecc error 8005 for SCMI_PROTOCOL_IDPierre Gondois2021-04-155-34/+34
| | | | | | | | | | | | This patch fixes the following Ecc reported error: Variable name does not follow the rules: 1. First character should be upper case 2. Must contain lower case characters 3. No white space characters 4. Global variable name must start with a 'g' Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
* ArmPkg: Fix Ecc error 7008 for SCMI_CLOCK_RATEPierre Gondois2021-04-151-4/+8
| | | | | | | | | | This patch fixes the following Ecc reported error: Complex types should be typedef-ed The error is due to the a nested structure declaration. Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
* ArmPkg: Fix Ecc error 6001 in MmCommunicationDxePierre Gondois2021-04-151-4/+4
| | | | | | | | | | | | | | | | | | | | | | | This patch fixes the following Ecc reported error: All include file contents should be guarded by a #ifndef statement. This patch replaces a "#if !defined [...]" statement by a "#ifndef [...]" statement, preventing Ecc to throw an error. Edk2 coding standard stating that: "Names starting with one or two underscores, such as _MACRO_GUARD_FILE_NAME_H_, must not be used." the include guard is also updated. Ref: https://edk2-docs.gitbook.io/edk-ii-c-coding-standards-specification/ 5_source_files/53_include_files# 5-3-5-all-include-file-contents-must-be-protected-by-a-include-guard Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
* ArmPkg: Remove ArmGic/ArmGicSecLib.cPierre Gondois2021-04-151-58/+0
| | | | | | | | | | Commit: 142fa386eb907df55c239311cd5fa2d40f5007dd removes the ArmGicSecLib. The file ArmGic/ArmGicSecLib.c was exclusively used by this library. Thus, this file should also be removed. Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
* ArmPkg: Fix Ecc error 10014 in MmCommunicationDxePierre Gondois2021-04-151-1/+2
| | | | | | | | | | | | | | This patch fixes the following Ecc reported error: No used module files found The source files [ArmPkg/Drivers/MmCommunicationDxe/MmCommunicate.h] is existing in module ArmPkg/Drivers/MmCommunicationDxe/MmCommunication.inf but is not described in the INF file. Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
* ArmPkg: Fix Ecc error 10014 in GenericWatchdogDxePierre Gondois2021-04-151-1/+2
| | | | | | | | | | | | | | This patch fixes the following Ecc reported error: No used module files found The source files [ArmPkg/Drivers/GenericWatchdogDxe/GenericWatchdog.h] is existing in module ArmPkg/Drivers/GenericWatchdogDxe/GenericWatchdogDxe.inf but is not described in the INF file. Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
* ArmPkg: Fix Ecc error 10014 in ArmScmiDxePierre Gondois2021-04-151-2/+7
| | | | | | | | | | | | | | | | | | | | | This patch fixes the following Ecc reported error: No used module files found The source files [ArmPkg/Drivers/ArmScmiDxe/ArmScmiPerformanceProtocolPrivate.h] [ArmPkg/Drivers/ArmScmiDxe/ScmiPrivate.h] [ArmPkg/Drivers/ArmScmiDxe/ScmiDxe.h] [ArmPkg/Drivers/ArmScmiDxe/ArmScmiBaseProtocolPrivate.h] [ArmPkg/Drivers/ArmScmiDxe/ArmScmiClockProtocolPrivate.h] are existing in module ArmPkg/Drivers/ArmScmiDxe/ArmScmiDxe.inf but are not described in INF the file. The patch also re-orders the files in the [Sources.common] section. Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
* ArmPkg: Fix Ecc error 9005 in CpuDxePierre Gondois2021-04-151-2/+2
| | | | | | | | | | | | | | This patch fixes the following Ecc reported error: Only Doxygen commands '@bug', '@todo', '@example', '@file', '@attention', '@param', '@post', '@pre', '@retval', '@return', '@sa', '@since', '@test', '@note', '@par', '@endcode', '@code', '@{', '@}' are allowed to mark the code This patch removes the ":" character following the "@param" doxygen command. Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
* ArmPkg/ArmGicLib: Fix GICR_IPRIORITYR address wrong issueMing Huang2021-03-011-1/+4
| | | | | | | | | | | | | The register address of GICR_IPRIORITYR is in SGI_base frame. Add IPRIORITY_ADDRESS macro for getting GICR_IPRIORITYR address. Otherwise GIC RAS error(Uncorrected software error) may report in ArmGicDxe. This resolves BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3236 Signed-off-by: Ming Huang <huangming@linux.alibaba.com> Reviewed-by: Leif Lindholm <leif@nuviainc.com> Tested-by: Ard Biesheuvel <ardb@kernel.org> # QEMU/kvm guest on ThunderX2 Tested-by: Quan Nguyen <quan@os.amperecomputing.com>
* ArmPkg/ArmGicLib: Fix two macros issue for offset parameterMing Huang2021-03-011-2/+2
| | | | | | | | Modify two macros to put "offset" in parentheses and remove parentheses from "4 * offset". Signed-off-by: Ming Huang <huangming@linux.alibaba.com> Reviewed-by: Leif Lindholm <leif@nuviainc.com>
* ArmPkg: Fix Ecc error 5007 in TimerDxePierre Gondois2021-01-061-1/+2
| | | | | | | | | This patch fixes the following Ecc reported error: There should be no initialization of a variable as part of its declaration Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com> Reviewed-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
* ArmPkg: Fix Ecc error 5007 in CpuDxePierre Gondois2021-01-062-5/+5
| | | | | | | | | This patch fixes the following Ecc reported error: There should be no initialization of a variable as part of its declaration Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com> Reviewed-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
* ArmPkg: Fix Ecc error 5007 in ArmScmiDxePierre Gondois2021-01-062-5/+8
| | | | | | | | | This patch fixes the following Ecc reported error: There should be no initialization of a variable as part of its declaration Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com> Reviewed-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
* ArmPkg: Fix Ecc error 5005 in CpuDxePierre Gondois2021-01-061-3/+5
| | | | | | | | | This patch fixes the following Ecc reported error: The body of a function should be contained by open and close braces that must be in the first column Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com> Reviewed-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
* ArmPkg: Fix Ecc error 3002 in CpuDxePierre Gondois2021-01-062-6/+6
| | | | | | | | | This patch fixes the following Ecc reported error: Non-Boolean comparisons should use a compare operator (==, !=, >, < >=, <=) Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com> Reviewed-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
* ArmPkg: Fix Ecc error 3002 in MmCommunicationDxePierre Gondois2021-01-061-2/+2
| | | | | | | | | This patch fixes the following Ecc reported error: Non-Boolean comparisons should use a compare operator (==, !=, >, < >=, <=) Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com> Reviewed-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
* ArmPkg: Fix Ecc error 3002 in TimerDxePierre Gondois2021-01-061-2/+2
| | | | | | | | | This patch fixes the following Ecc reported error: Non-Boolean comparisons should use a compare operator (==, !=, >, < >=, <=) Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com> Reviewed-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
* ArmPkg/ArmGicV3Dxe: Use ArmGicSetInterruptPriority() to set priorityQuan Nguyen2020-12-181-8/+5
| | | | | | | | | | | When Affinity Routing enabled, the GICR_IPRIORITYR<n> is used to set priority for SGIs and PPIs instead of GICD_IPRIORITYR<n>. This patch calls ArmGicSetInterruptPriority() helper function when setting priority to handle the difference. Cc: Leif Lindholm <leif@nuviainc.com> Signed-off-by: Quan Nguyen <quan@os.amperecomputing.com> Reviewed-off-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
* ArmPkg/ArmGicLib: Add ArmGicSetInterruptPriority() helper functionQuan Nguyen2020-12-181-0/+44
| | | | | | | | | | | | | | | | According to ARM IHI 0069F, section 11.9.18 GICD_IPRIORITYR<n>, Interrupt Priority Registers, n = 0 - 254, when affinity routing is enabled for the Security state of an interrupt, GICR_IPRIORITYR<n> is used instead of GICD_IPRIORITYR<n> where n = 0 to 7 (that is, for SGIs and PPIs). As setting interrupt priority for SGIs and PPIs are handled using difference registers depends on the mode, this patch instroduces ArmGicSetInterruptPriority() helper function to handle the discrepancy. Cc: Leif Lindholm <leif@nuviainc.com> Signed-off-by: Quan Nguyen <quan@os.amperecomputing.com> Reviewed-off-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
* ArmPkg/MmCommunicationDxe: expose MM Communicate 2 protocolArd Biesheuvel2020-05-122-48/+43
| | | | | | | | | | | | | Implement the new MmCommunication2 protocol which supports the use of standalone MM at runtime inside an address space that has been virtually remapped by the OS. Note that the implementation of the old MM Communicate protocol is removed: it never worked correctly so there is no point in keeping it. Signed-off-by: Ard Biesheuvel <ard.biesheuvel@arm.com> Reviewed-by: Leif Lindholm <leif@nuviainc.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
* ArmPkg: rename misleading local #define in CpuDxeLeif Lindholm2020-04-061-7/+7
| | | | | | | | | | | The local #define TT_ATTR_INDX_INVALID is used as a local error code in the AArch64 implementation, but is misleadingly named to match the definitions in ArmPkg/Include/Chipset/AArch64Mmu.h. Rename it INVALID_ENTRY to reduce confusion and improve readability. Signed-off-by: Leif Lindholm <leif@nuviainc.com> Reviewed-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
* ArmPkg/CpuDxe: move PageAttributeToGcdAttribute() out of ArmMmuLibArd Biesheuvel2020-04-021-0/+46
| | | | | | | | | The routine PageAttributeToGcdAttribute() is exported by ArmMmuLib but only ever used in the implementation of CpuDxe. So let's move the function there and make it STATIC. Signed-off-by: Ard Biesheuvel <ard.biesheuvel@arm.com> Reviewed-by: Leif Lindholm <leif@nuviainc.com>
* ArmPkg/CpuDxe: use private copy of GetRootTranslationTableInfo()Ard Biesheuvel2020-04-022-7/+15
| | | | | | | | | | | | | | | | | Before getting rid of GetRootTranslationTableInfo() and the related LookupAddresstoRootTable() in AARCH64's version of ArmMmuLib, add a version of the former to CpuDxe, which will be its only remaining user. While at it, simplify it a bit, since in the CpuDxe cases, both OUT arguments are always provided. Note that this removes the declaration of GetRootTranslationTableInfo() as well, but this is a declaration that is private to CpuDxe, and it really doesn't belong here in the first place. Since ArmMmuLib's version of GetRootTranslationTableInfo() is going to be replaced shortly anyway, don't bother moving this .h declaration elsewhere. Signed-off-by: Ard Biesheuvel <ard.biesheuvel@arm.com> Reviewed-by: Leif Lindholm <leif@nuviainc.com>
* ArmPkg/MmCommunicationDxe: fix logic bug in DXE driver entrypointArd Biesheuvel2020-03-041-0/+8
| | | | | | | | | | | | | | | Commit 2fe25a74d6fee3c2 ("ArmPkg/MmCommunicationDxe: relay architected PI events to MM context") update the ARM specific standalone MM client driver to register for certain events in the entrypoint code, but did so in a way that makes the entrypoint always return with an error. Instead, return EFI_SUCCESS if registering for those events succeeds, and back out the registrations that did succeed if one fails, and return an error. Fixes: 2fe25a74d6fee3c2 ("ArmPkg/MmCommunicationDxe: relay architected PI events to MM context") Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Leif Lindholm <leif@nuviainc.com>
* ArmPkg/MmCommunicationDxe: relay architected PI events to MM contextArd Biesheuvel2019-12-112-2/+50
| | | | | | | | | | PI defines a few architected events that have significance in the MM context as well as in the non-secure DXE context. So register notify handlers for these events, and relay them into the standalone MM world. Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com> Reviewed-by: Achin Gupta <achin.gupta@arm.com>
* ArmPkg: ArmScmiDxe - convert .h to from 8859-x to 7-bitLeif Lindholm2019-10-041-1/+1
| | | | | | | | | | | | A paragraph sign in a comment came from some ISO8859 encoding, convert it to the word "section" to remain 7-bit safe, since we're not actually doing anything special. Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org> Cc: "Kinney, Michael D" <michael.d.kinney@intel.com> Signed-off-by: Leif Lindholm <leif.lindholm@linaro.org> Acked-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Philippe Mathieu-Daude <philmd@redhat.com>
* ArmPkg: list module-internal header files in INF [Sources]Laszlo Ersek2019-07-231-0/+1
| | | | | | | | | | | | | | | | | The BaseTools build feature introduced for TianoCore#1804 / in commit 1fa6699e6cd4 ("BaseTools: Add a checking for Sources section in INF file", 2019-06-10) logs some (non-fatal) warnings about unlisted internal header files. List those files explicitly. Note: header files are added in lexicographical order only if the underlying INF file already keeps the [Sources] and [LibraryClasses] sections in lexicographical order. Otherwise, header files are added in rough "logical" order. Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org> Cc: Leif Lindholm <leif.lindholm@linaro.org> Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
* ArmPkg: Fix various typosAntoine Cœur2019-07-048-9/+9
| | | | | | | Fix various typos in ArmPkg. Signed-off-by: Coeur <coeur@gmx.fr> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
* ArmPkg: Replace BSD License with BSD+Patent LicenseMichael D Kinney2019-04-0949-342/+49
| | | | | | | | | | | | | | | | | | | | https://bugzilla.tianocore.org/show_bug.cgi?id=1373 Replace BSD 2-Clause License with BSD+Patent License. This change is based on the following emails: https://lists.01.org/pipermail/edk2-devel/2019-February/036260.html https://lists.01.org/pipermail/edk2-devel/2018-October/030385.html RFCs with detailed process for the license change: V3: https://lists.01.org/pipermail/edk2-devel/2019-March/038116.html V2: https://lists.01.org/pipermail/edk2-devel/2019-March/037669.html V1: https://lists.01.org/pipermail/edk2-devel/2019-March/037500.html Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
* ArmPkg: Fix writes to GICv3 GICD_IROUTER<n> regSami Mujawar2019-02-261-2/+2
| | | | | | | | | | | | | | According to ARM Generic Interrupt Controller Architecture Specification, GIC architecture version 3.0 and version 4.0, GICD_IROUTER<n> is a 64-bit register. Fixed code to use 64 bit MMIO write operations so that the Aff3 value (bits [39:32]) is written to GICD_IROUTER<n>. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Sami Mujawar <sami.mujawar@arm.com> Reported-by: Carl van Schaik <carl@cog.systems> Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
* ArmPkg/ArmScmiDxe: Add clock enable functionJeff Brasen2018-12-213-0/+70
| | | | | | | | | | | | | | | | Add function to allow enabling and disabling of the clock using the SCMI interface. Add gArmScmiClock2ProtocolGuid to distinguish platforms that support new API from those that just have the older protocol. SCMI_CLOCK2_PROTOCOL also adds a version parameter to allow for future changes. It is placed after the functions that are present in the existing protocol to allow SCMI_CLOCK2_PROTOCOL to be cast to SCMI_CLOCK_PROTOCOL so that only a single implementation of those function are needed. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Jeff Brasen <jbrasen@nvidia.com> Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
* ArmPkg/GenericWatchdogDxe: implement RegisterHandler() methodArd Biesheuvel2018-12-201-9/+25
| | | | | | | | | | | Even though UEFI does not appear to use it, let's implement the complete PI watchdog protocol, including handler registration, which will be invoked before the ResetSystem() runtime service when the watchdog timer expires. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
* ArmPkg/GenericWatchdogDxe: clean up the codeArd Biesheuvel2018-12-202-55/+61
| | | | | | | | | | Clean up the code, by adding missing STATIC modifiers, drop redundant casts, and get rid of the 'success handling' anti pattern in the entry point code. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
* ArmPkg/ArmMmuLib ARM: handle unmapped section in GetMemoryRegion()Ard Biesheuvel2018-12-031-0/+3
| | | | | | | | | | | | | | | | GetMemoryRegion() is used to obtain the attributes of an existing mapping, to permit permission attribute changes to be optimized away if the attributes don't actually change. The current ARM code assumes that a section mapping or a page mapping exists for any region passed into GetMemoryRegion(), but the region may be unmapped entirely, in which case the code will crash. So check if a section mapping exists before dereferencing it. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
* ArmPkg/CpuPei: base GCD memory space size on CPU's PA rangeArd Biesheuvel2018-11-292-2/+1
| | | | | | | | | | | | Derive the size of the GCD memory space map directly from the CPU's information registers rather than from the PcdPrePiCpuMemorySize PCD, which will be removed. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
* ArmPkg/Drivers: Add EFI_MM_COMMUNICATION_PROTOCOL DXE driver.Achin Gupta2018-11-273-0/+456
| | | | | | | | | | | | | | | | | | | | PI v1.5 Specification Volume 4 defines Management Mode Core Interface and defines EFI_MM_COMMUNICATION_PROTOCOL. This protocol provides a means of communicating between drivers outside of MM and MMI handlers inside of MM. This patch implements the EFI_MM_COMMUNICATION_PROTOCOL DXE runtime driver for AARCH64 platforms. It uses SMCs allocated from the standard SMC range defined in DEN0060A_ARM_MM_Interface_Specification.pdf to communicate with the standalone MM environment in the secure world. This patch also adds the MM Communication driver (.inf) file to define entry point for this driver and other compile related information the driver needs. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Sughosh Ganu <sughosh.ganu@arm.com> Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
* ArmPkg/ArmGicDxe ARM: fix encoding for GICv3 interrupt acknowledgeArd Biesheuvel2018-11-152-2/+2
| | | | | | | | | | | Fix a typo in the 32-bit ARM version of the GICv3 driver, which uses the wrong system register encoding to access ICC_IAR1, and attempted to access ICC_IAR0 instead. This results in boot time hangs both under QEMU emulation and on real hardware. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
* ArmPkg/ArmGicDxe: Fix GICv3 interrupt routing mode bugMing Huang2018-11-071-1/+1
| | | | | | | | | | | | | | | | Setting GICD_IROUTERn.IRM and GICD_IROUTERn.{Aff3,Aff2,Aff1,Aff0} at the same time is nonsensical (see 8.9.13 in the GICv3 spec, which says of GICD_IROUTERn.IRM that "When this bit is set to 1, GICD_IROUTER<n>.{Aff3,Aff2,Aff1,Aff0} are UNKNOWN"). There is also no guarantee that IRM is implemented (see GICD_TYPER.No1N which indicates whether the implementation supports this or not). Let's thus not set this bit, as we want all SPIs to be delivered to the same CPU, and not be broadcast to all of them. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ming Huang <ming.huang@linaro.org> Acked-by: Marc Zyngier <marc.zyngier@arm.com>
* ArmPkg: Add support for GICv4Sami Mujawar2018-10-122-18/+27
| | | | | | | | | | | | | | | | | | | | Updated Redistributor base calculation to allow for the fact that GICv4 has 2 additional 64KB frames (for VLPI and a reserved frame). The code now tests the VLPIS bit in the GIC Redistributor Type Register (GICR_TYPER) and calculates the Redistributor granularity accordingly. The code changes are: GICR_TYPER register fields, etc, added to the header. Loop updated to pay attention to GICR_TYPER.Last. Derive frame "stride" size from GICR_TYPER.VLPIS. Note: The assumption is that the redistributors are adjacent for all CPUs. However this may not be the case for NUMA systems. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Sami Mujawar <sami.mujawar@arm.com> Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
* ArmPkg/GenericWatchdogDxe: Split 64bit register write to 2x32bitMarcin Wojtas2018-08-032-2/+4
| | | | | | | | | | | | | | | | According to the SBSA specification the Watchdog Compare Register is split into two separate 32bit registers. EDK2 code uses a single 64bit transaction to update them, which can be problematic, depending on the SoC implementation and could result in unpredictable behavior. Fix this by modifying WatchdogWriteCompareRegister routine to use two consecutive 32bit writes to the Watchdog Compare Register Low and High, using new dedicated macros. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Marcin Wojtas <mw@semihalf.com> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
* ArmPkg/ArmScmiDxe: Dynamically allocate buffer for protocol idsGirish Pathak2018-06-223-12/+21
| | | | | | | | | | | | Dynamically allocate the buffer to receive the SCMI protocol list. This makes MAX_PROTOCOLS redundant, so it is removed. It also fixes one minor code alignment issue and removes an unused macro PROTOCOL_MASK. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Girish Pathak <girish.pathak@arm.com> Tested-by: Sudeep Holla <sudeep.holla@arm.com> Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
* ArmPkg/ArmScmiDxe: Fix ASSERT error in SCMI DXEGirish Pathak2018-06-222-21/+23
| | | | | | | | | | | | | | | | | | | | | This change fixes a bug in the SCMI DXE which is observed with the upcoming release of the SCP firmware. The PROTOCOL_ID_MASK (0xF) which is used to generate an index in the ProtocolInitFxns is wrong because protocol ids can be anywhere in 0x10 - 15 or 0x80 - FF range. This mask generates the same index for two different protocols e.g. for protocol ids 0x10 and 0x90, which causes duplicate initialization of a protocol resulting in a failure. This change removes the use of PROTOCOL_ID_MASK and instead uses a list of protocol ids and their initialization functions to identify a supported protocol and initialize it. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Girish Pathak <girish.pathak@arm.com> Tested-by: Sudeep Holla <sudeep.holla@arm.com> Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
* ArmPkg: Fix bug in Generic Watchdog driverAlexeiFedorov2018-04-301-21/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In ArmPkg/Drivers/GenericWatchdogDxe/GenericWatchdogDxe.c, the following functions: WatchdogWriteOffsetRegister() WatchdogWriteCompareRegister() WatchdogEnable() WatchdogDisable() provide write access to ARM Generic Watchdog registers and use the values returned by MmioWrite32() and MmioWrite64() as EFI_STATUS return codes. Because MmioWriteXY() return the value passed as its write parameter, Generic Watchdog access functions can spuriously return error codes which are different from EFI_SUCCESS, e.g. the following call Status = WatchdogWriteOffsetRegister (MAX_UINT32); if (EFI_ERROR (Status)) { return Status; } will return MAX_UINT32 defined in MdePkg/Include/Base.h as #define MAX_UINT32 ((UINT32)0xFFFFFFFF) This commit declares all the functions listed above as VOID and removes the code for checking their return values. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Alexei Fedorov <alexei.fedorov@arm.com> Reviewed-by: Evan Lloyd <evan.lloyd@arm.com> Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
* ArmPkg: add reenable hook to ArmGenericTimerCounterLibArd Biesheuvel2018-04-261-0/+1
| | | | | | | | | | | | | | In preparation of selectively reinstating the timer enable quirk for Xen that we removed in commit 411a373ed642 ("ArmPkg/TimerDxe: remove workaround for KVM timer handling"), add a ArmGenericTimerReenableTimer() library function to ArmGenericTimerCounterLib that we will populate for Xen only. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Tested-by: Julien Grall <julien.grall@arm.com> Acked-by: Julien Grall <julien.grall@arm.com>
* ArmPkg: Introduce SCMI protocolGirish Pathak2018-04-2311-0/+2046
| | | | | | | | | | | | | | | | | | | This change introduces a new SCMI protocol driver for Arm systems. The driver currently supports only clock and performance management protocols. Other protocols will be added as and when needed. Clock management protocol is used to configure various clocks available on the platform e.g. HDLCD clock on the Juno platforms. Whereas performance management protocol allows adjustment of various performance domains. Currently this is used to evaluate performance of the Juno platform. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Girish Pathak <girish.pathak@arm.com> Signed-off-by: Evan Lloyd <evan.lloyd@arm.com> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>