summaryrefslogtreecommitdiffstats
path: root/ArmPkg/Include
Commit message (Collapse)AuthorAgeFilesLines
* ArmPkg/CpuDxe: drop ARM_PROCESSOR_TABLE pseudo-ACPI tableArd Biesheuvel2022-07-221-27/+0
| | | | | | | | | | | The ARM_PROCESSOR_TABLE pseudo-ACPI table (which carries a ACPI-table like header but is published as a EFI config table) is not described in any relevant spec, and is not known to be relied upon by any OS. Let's just get rid of it. Signed-off-by: Ard Biesheuvel <ardb@kernel.org> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com> Tested-by: Sami Mujawar <sami.mujawar@arm.com>
* ArmPkg: Remove RVCT supportRebecca Cran2022-05-131-23/+0
| | | | | | | | RVCT is obsolete and no longer used. Remove support for it. Signed-off-by: Rebecca Cran <quic_rcran@quicinc.com> Reviewed-by: Ard Biesheuvel <ardb@kernel.org>
* ArmPkg: Replace CoreId and ClusterId with Mpidr in ARM_CORE_INFO structRebecca Cran2022-01-302-2/+5
| | | | | | | | | | | Remove the ClusterId and CoreId fields in the ARM_CORE_INFO structure in favor of a new Mpidr field. Update code in ArmPlatformPkg/PrePeiCore/MainMPCore and ArmPlatformPkg/PrePi/MainMPCore.c to use the new field and call new macros GET_MPIDR_AFF0 and GET_MPIDR_AFF1 instead. Signed-off-by: Rebecca Cran <rebecca@nuviainc.com> Reviewed-by: Ard Biesheuvel <ardb@kernel.org>
* ArmPkg/ProcessorSubClassDxe: Get serial and part number from OemMiscLibNhi Pham2021-12-161-0/+2
| | | | | | | | | | | Currently, the serial and part number of a processor are filled with fixed PCDs. However, they may be updated dynamically according to the information being passed from a the pre-UEFI firmware during booting. So, this patch is to support updating these string fields from OemMiscLib if the PCDs are empty. Signed-off-by: Nhi Pham <nhi@os.amperecomputing.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
* ArmPkg/SmbiosMiscDxe: Get full SMBIOS strings from OemMiscLibNhi Pham2021-12-161-0/+3
| | | | | | | | | | | Typically, the information of the SMBIOS type 1/2/3 is fetched from an FRU device during UEFI booting intead of fixed PCDs. Therefore, this patch is to add more HII string fields in the OemMiscLib and support updating these SMBIOS types with the strings provided by the OemMiscLib if the PCDs are empty. Signed-off-by: Nhi Pham <nhi@os.amperecomputing.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
* ArmPkg: Add SMC helper functionsRebecca Cran2021-12-141-0/+73
| | | | | | | | | Add functions ArmCallSmc0/1/2/3 to do SMC calls with 0, 1, 2 or 3 arguments. The functions return up to 3 values. Signed-off-by: Rebecca Cran <rebecca@nuviainc.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
* ArmPkg: Apply uncrustify changesMichael Kubacki2021-12-0734-1085/+1066
| | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3737 Apply uncrustify changes to .c/.h files in the ArmPkg package Cc: Andrew Fish <afish@apple.com> Cc: Leif Lindholm <leif@nuviainc.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com> Reviewed-by: Andrew Fish <afish@apple.com>
* ArmPkg/IndustryStandard: 32b/64b agnostic FF-A, Mm SVC and Std SMC IDsEtienne Carriere2021-08-113-0/+35
| | | | | | | | | | Defines ARM_SVC_ID_FFA_* and ARM_SVC_ID_SP_* identifiers for 32bit function IDs as per SMCCC specification. Defines also generic ARM SVC identifier macros to wrap 32bit or 64bit identifiers upon target built architecture. Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
* ArmPkg: Move cache defs used in Universal/Smbios into ArmCache.hRebecca Cran2021-06-182-4/+144
| | | | | | | | | | | Many of the cache definitions in ArmLibPrivate.h are being used outside of ArmLib, in Universal/Smbios. Move them into ArmCache.h to make them public, and remove the include of ArmLibPrivate.h from files in Universal/Smbios. Signed-off-by: Rebecca Cran <rebecca@nuviainc.com> Acked-by: Ard Biesheuvel <ardb@kernel.org> Reviewed-by: Leif Lindholm <leif@nuviainc.com>
* ArmPkg: Update SCMI Base Protocol version to 0x20000Nicola Mazzucato2021-05-101-5/+5
| | | | | | | | | | | | | The SCP-firmware has moved to full support for SCMIv2 which means that the base protocol can be either compliant with SCMI v1 or v2. Allow any version between SCMI v1.0 and SCMI v2.0 to be compatible with the current implementation. Signed-off-by: Nicola Mazzucato <nicola.mazzucato@arm.com> Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com> Tested-by: Sami Mujawar <sami.mujawar@arm.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
* ArmPkg: Fix Ecc error 8003Pierre Gondois2021-04-2823-69/+69
| | | | | | | | | | | | | | | | | | This patch fixes the following Ecc reported error: The #ifndef at the start of an include file should have one postfix underscore, and no prefix underscore character Some include guards have been modified to match the name of the header file. Some comments have also been added on the closing '#endif'. Cc: Bret Barkelew <bret.barkelew@microsoft.com> Cc: Sean Brogan <sean.brogan@microsoft.com> Cc: Leif Lindholm <leif@nuviainc.com> Cc: Ard Biesheuvel <ardb+tianocore@kernel.org> Cc: Sami Mujawar <sami.mujawar@arm.com> Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
* ArmPkg: Allow platforms to report their boot status via OemMiscLib callRebecca Cran2021-04-271-0/+10
| | | | | | | | Add a new function to OemMiscLib to allow platforms to report their boot status into the Type32 SMBIOS table. Signed-off-by: Rebecca Cran <rebecca@nuviainc.com> Reviewed-by: Leif Lindholm <leif@nuviainc.com>
* ArmPkg: Allow platforms to supply more data for SMBIOS Type3 recordRebecca Cran2021-04-271-0/+60
| | | | | | | | | | | | | | | Add OemMiscLib calls to allow platforms to provide the following information about the chassis: o Bootup state o Power supply/supplies state o Thermal state o Security state o Chassis height (in RMU) o Number of power cords Signed-off-by: Rebecca Cran <rebecca@nuviainc.com> Reviewed-by: Leif Lindholm <leif@nuviainc.com>
* ArmPkg: Fix Ecc error 8005 for SCMI_MESSAGE_ID_PERFORMANCEPierre Gondois2021-04-151-7/+7
| | | | | | | | | | | | This patch fixes the following Ecc reported error: Variable name does not follow the rules: 1. First character should be upper case 2. Must contain lower case characters 3. No white space characters 4. Global variable name must start with a 'g' Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
* ArmPkg: Fix Ecc error 8005 for SCMI_CLOCK_RATE_FORMATPierre Gondois2021-04-152-7/+7
| | | | | | | | | | | | This patch fixes the following Ecc reported error: Variable name does not follow the rules: 1. First character should be upper case 2. Must contain lower case characters 3. No white space characters 4. Global variable name must start with a 'g' Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
* ArmPkg: Fix Ecc error 8005 for SCMI_MESSAGE_ID_CLOCKPierre Gondois2021-04-151-5/+5
| | | | | | | | | | | | This patch fixes the following Ecc reported error: Variable name does not follow the rules: 1. First character should be upper case 2. Must contain lower case characters 3. No white space characters 4. Global variable name must start with a 'g' Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
* ArmPkg: Fix Ecc error 8005 for SCMI_MESSAGE_ID_BASEPierre Gondois2021-04-151-5/+5
| | | | | | | | | | | | This patch fixes the following Ecc reported error: Variable name does not follow the rules: 1. First character should be upper case 2. Must contain lower case characters 3. No white space characters 4. Global variable name must start with a 'g' Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
* ArmPkg: Fix Ecc error 7008 for OPTEE_MESSAGE_PARAMPierre Gondois2021-04-151-4/+7
| | | | | | | | | | This patch fixes the following Ecc reported error: Complex types should be typedef-ed The error is due to the a nested structure declaration. Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
* ArmPkg: Fix Ecc error 7008 for SCMI_CLOCK_RATEPierre Gondois2021-04-151-4/+10
| | | | | | | | | | This patch fixes the following Ecc reported error: Complex types should be typedef-ed The error is due to the a nested structure declaration. Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
* ArmPkg: Rename include guard in ArmGicLib.hPierre Gondois2021-04-151-4/+4
| | | | | | | | | | | | | | Edk2 coding standard states that: "Names starting with one or two underscores, such as _MACRO_GUARD_FILE_NAME_H_, must not be used." Ref: https://edk2-docs.gitbook.io/edk-ii-c-coding-standards-specification/ 5_source_files/53_include_files# 5-3-5-all-include-file-contents-must-be-protected-by-a-include-guard Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
* ArmPkg: Fix Ecc error 8001 in ChipsetPierre Gondois2021-04-154-14/+14
| | | | | | | | | | | | | | | | | | | This patch fixes the following Ecc reported error: Only capital letters are allowed to be used for #define declarations Edk2 coding standard stating that: "Names starting with one or two underscores, such as _MACRO_GUARD_FILE_NAME_H_, must not be used." the include guard of ArmCortexA5x.h is also updated. Ref: https://edk2-docs.gitbook.io/edk-ii-c-coding-standards-specification/ 5_source_files/53_include_files# 5-3-5-all-include-file-contents-must-be-protected-by-a-include-guard Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
* ArmPkg: Allow FF-A calls to get memory region's attributesAchin Gupta2021-02-231-0/+18
| | | | | | | | | | Allow getting memory region's permissions using either of the Firmware Framework(FF-A) ABI transport or through the earlier used SVC calls. Signed-off-by: Achin Gupta <achin.gupta@arm.com> Co-developed-by: Sughosh Ganu <sughosh.ganu@linaro.org> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com> Acked-by: Ard Biesheuvel <ardb@kernel.org>
* ArmPkg: Add macros for SPM version with FF-A support enabledSughosh Ganu2021-02-231-0/+3
| | | | | | | | | | | Declare the values of SPM major and minor versions as macros with FF-A enabled, which can be used in the module for checking the SPM version compatibility. These SPM major and minor version numbers are mandated for having support for the Firmware Framework(FF-A) feature enabled. Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com> Acked-by: Ard Biesheuvel <ardb@kernel.org>
* ArmPkg: Add macros for SPM versionSughosh Ganu2021-02-231-0/+3
| | | | | | | | | Declare the values of SPM major and minor versions as macros which can be used in the module for checking the SPM version compatibility. Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com> Acked-by: Ard Biesheuvel <ardb@kernel.org>
* ArmPkg/ArmSvcLib: Return x4-x7 in output parametersAchin Gupta2021-02-231-2/+8
| | | | | | | | | | | The Arm SMC calling convention standard v1.2 allows 8 input and output parameter registers. The FF-A specification relies on this communication. This patch extends the number of output registers returned by ArmCallSvc() to match this convention. Signed-off-by: Achin Gupta <achin.gupta@arm.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com> Reviewed-by: Ard Biesheuvel <ardb@kernel.org>
* ArmPkg/IndustryStandard: Add barebones FF-A headerAchin Gupta2021-02-231-0/+23
| | | | | | | | | This patch adds a rudimentary header file with defines for FF-A ABIs that will be used as the transport between S-EL0 and the SPM Signed-off-by: Achin Gupta <achin.gupta@arm.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com> Reviewed-by: Ard Biesheuvel <ardb@kernel.org>
* ArmPkg: Update OemGetChassisType function to return MISC_CHASSIS_TYPERebecca Cran2021-02-231-5/+3
| | | | | | | | Update OemGetChassisType in OemMiscLib to return MISC_CHASSIS_TYPE instead of EFI_STATUS, which matches other OemMiscLib functions. Signed-off-by: Rebecca Cran <rebecca@nuviainc.com> Reviewed-by: Leif Lindholm <leif@nuviainc.com>
* ArmPkg: Rename some functions and parameters in OemMiscLibRebecca Cran2021-02-231-7/+7
| | | | | | | | | | | o Rename 'mHiiHandle' parameter in OemUpdateSmbiosInfo to 'HiiHandle'. o Rename 'Offset' parameter in OemUpdateSmbiosInfo to 'Field'. o Rename OemGetProcessorMaxSockets to OemGetMaxProcessors. o Rename OemIsSocketPresent to OemIsProcessorPresent. o Update Universal/Smbios to follow the changes to OemMiscLib. Signed-off-by: Rebecca Cran <rebecca@nuviainc.com> Reviewed-by: Leif Lindholm <leif@nuviainc.com>
* ArmPkg: Fix ordering of return type and EFIAPI specifier in OemMiscLibRebecca Cran2021-02-231-7/+7
| | | | | | | The return type should be on the line before any EFIAPI specifier. Signed-off-by: Rebecca Cran <rebecca@nuviainc.com> Reviewed-by: Leif Lindholm <leif@nuviainc.com>
* ArmPkg: Add Library/OemMiscLib.hRebecca Cran2021-02-081-0/+167
| | | | | | | | | OemMiscLib.h provides the interface which platforms should implement to interact with the SmbiosMiscDxe and ProcessorSubClassDxe drivers to update SMBIOS tables. Signed-off-by: Rebecca Cran <rebecca@nuviainc.com> Acked-by: Leif Lindholm <leif@nuviainc.com>
* ArmPkg: Add helper to read CCIDX statusRebecca Cran2021-02-081-0/+11
| | | | | | | | Add a helper function to determine CCIDX support. Signed-off-by: Rebecca Cran <rebecca@nuviainc.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com> Reviewed-by: Leif Lindholm <leif@nuviainc.com>
* ArmPkg: Add definition of the maximum cache level in ARMv8-ARebecca Cran2021-02-081-0/+4
| | | | | | | | | | The ARM Architecture Reference Manual for ARMv8-A defines up to seven levels of cache, L1 through L7. Define MAX_ARM_CACHE_LEVEL to be 7. Signed-off-by: Rebecca Cran <rebecca@nuviainc.com> Reviewed-by: Leif Lindholm <leif@nuviainc.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
* ArmPkg: Add register encoding definition for MMFR2Rebecca Cran2021-02-081-0/+4
| | | | | | | | | | Add register encoding definition for Memory Model Feature Register 2. We need to define it here because we build for ARMv8.0, which doesn't have it. Signed-off-by: Rebecca Cran <rebecca@nuviainc.com> Reviewed-by: Leif Lindholm <leif@nuviainc.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
* ArmPkg: Add ARM SMC Architecture functions to ArmStdSmc.hRebecca Cran2021-02-081-0/+16
| | | | | | | | | The ARM SMC Architecture functions were missing from ArmStdSmc.h. Add them, based on the SMC Calling Convention version 1.2 specification. Signed-off-by: Rebecca Cran <rebecca@nuviainc.com> Reviewed-by: Leif Lindholm <leif@nuviainc.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
* ArmPkg/ArmGicLib: Add ArmGicSetInterruptPriority() helper functionQuan Nguyen2020-12-181-0/+9
| | | | | | | | | | | | | | | | According to ARM IHI 0069F, section 11.9.18 GICD_IPRIORITYR<n>, Interrupt Priority Registers, n = 0 - 254, when affinity routing is enabled for the Security state of an interrupt, GICR_IPRIORITYR<n> is used instead of GICD_IPRIORITYR<n> where n = 0 to 7 (that is, for SGIs and PPIs). As setting interrupt priority for SGIs and PPIs are handled using difference registers depends on the mode, this patch instroduces ArmGicSetInterruptPriority() helper function to handle the discrepancy. Cc: Leif Lindholm <leif@nuviainc.com> Signed-off-by: Quan Nguyen <quan@os.amperecomputing.com> Reviewed-off-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
* ArmPkg/ArmLib: move ArmReadIdPfr0/1 into private header ArmV7Lib.hLeif Lindholm2020-12-181-12/+0
| | | | | | | | | | | ArmReadIdPfr0 () and ArmReadIdPfr1 () are now used only inside ArmLib. Remove the prototypes from the public header to discourage new id register accessor additions, and direct id register access in general. Move them into local header Arm/ArmV7Lib.h. Cc: Ard Biesheuvel <ard.biesheuvel@arm.com> Signed-off-by: Leif Lindholm <leif@nuviainc.com> Reviewed-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
* ArmPkg: add ArmHasSecurityExtensions () helper functionLeif Lindholm2020-12-181-0/+17
| | | | | | | | | | | | | Create a helper function to eliminate direct feature register reading. Returns BOOLEAN True if the CPU implements the Security extensions, otherwise returns BOOL False. This function is only implemented for ARM, not AArch64. Cc: Ard Biesheuvel <ard.biesheuvel@arm.com> Signed-off-by: Leif Lindholm <leif@nuviainc.com> Reviewed-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
* ArmPkg/ArmLib: add ArmHasGicSystemRegisters () helper functionLeif Lindholm2020-12-181-0/+18
| | | | | | | | | | | | Create a helper function to eliminate direct feature register reading, which gets messy in code shared between ARM/AArch64. Returns BOOLEAN True if the CPU implements the GIC System Register Interface (any version), otherwise returns BOOL False. Cc: Ard Biesheuvel <ard.biesheuvel@arm.com> Signed-off-by: Leif Lindholm <leif@nuviainc.com> Reviewed-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
* ArmPkg/CpuDxe: move PageAttributeToGcdAttribute() out of ArmMmuLibArd Biesheuvel2020-04-021-5/+0
| | | | | | | | | The routine PageAttributeToGcdAttribute() is exported by ArmMmuLib but only ever used in the implementation of CpuDxe. So let's move the function there and make it STATIC. Signed-off-by: Ard Biesheuvel <ard.biesheuvel@arm.com> Reviewed-by: Leif Lindholm <leif@nuviainc.com>
* ArmPkg/ArmLib: move set/way helper functions into private headerArd Biesheuvel2020-03-051-18/+0
| | | | | | | | | | | | | The clean/invalidate helper functions that operate on a single cache line identified by set, way and level in a special, architected format are only used by the implementations of the clean/invalidate routines that operate on the entire cache hierarchy, as exposed by ArmLib. The latter routines will be deprecated soon, so move the helpers out of ArmLib.h and into a private header so they are safe from abuse. Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Leif Lindholm <leif@nuviainc.com>
* ArmPkg: Fix various typosAntoine Cœur2019-07-041-2/+2
| | | | | | | Fix various typos in ArmPkg. Signed-off-by: Coeur <coeur@gmx.fr> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
* ArmPkg: Replace BSD License with BSD+Patent LicenseMichael D Kinney2019-04-0933-231/+33
| | | | | | | | | | | | | | | | | | | | https://bugzilla.tianocore.org/show_bug.cgi?id=1373 Replace BSD 2-Clause License with BSD+Patent License. This change is based on the following emails: https://lists.01.org/pipermail/edk2-devel/2019-February/036260.html https://lists.01.org/pipermail/edk2-devel/2018-October/030385.html RFCs with detailed process for the license change: V3: https://lists.01.org/pipermail/edk2-devel/2019-March/038116.html V2: https://lists.01.org/pipermail/edk2-devel/2019-March/037669.html V1: https://lists.01.org/pipermail/edk2-devel/2019-March/037500.html Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
* ArmPkg/ArmMmuLib AARCH64: get rid of needless TLB invalidationArd Biesheuvel2019-01-291-1/+2
| | | | | | | | | | | | | | | | | | | Currently, we always invalidate the TLBs entirely after making any modification to the page tables. Now that we have introduced strict memory permissions in quite a number of places, such modifications occur much more often, and it is better for performance to flush only those TLB entries that are actually affected by the changes. At the same time, relax some system wide data synchronization barriers to non-shared. When running in UEFI, we don't share virtual address translations with other masters, unless we are running under virt, but in that case, the host will upgrade them as appropriate (by setting an override at EL2) Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
* ArmPkg: delete unused ArmTrustZoneSmc.hLeif Lindholm2019-01-211-161/+0
| | | | | | | | | | | | | ArmPkg/Include/IndustryStandard/ArmTrustZoneSmc.h contains definitions contradicting the SMC Calling Convention (ARM DEN0028B). It also has no users in public trees. So delete before it can cause damage. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Leif Lindholm <leif.lindholm@linaro.org> Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
* ArmPkg/ArmScmiDxe: Add clock enable functionJeff Brasen2018-12-211-0/+197
| | | | | | | | | | | | | | | | Add function to allow enabling and disabling of the clock using the SCMI interface. Add gArmScmiClock2ProtocolGuid to distinguish platforms that support new API from those that just have the older protocol. SCMI_CLOCK2_PROTOCOL also adds a version parameter to allow for future changes. It is placed after the functions that are present in the existing protocol to allow SCMI_CLOCK2_PROTOCOL to be cast to SCMI_CLOCK_PROTOCOL so that only a single implementation of those function are needed. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Jeff Brasen <jbrasen@nvidia.com> Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
* ArmPkg/OpteeLib: Add OPTEE_SUCCESS return codeSumit Garg2018-12-111-0/+1
| | | | | | Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Sumit Garg <sumit.garg@linaro.org> Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
* ArmPkg/ArmLib: add support for reading the max physical address space sizeArd Biesheuvel2018-11-291-0/+6
| | | | | | | | | | | Add a helper function that returns the maximum physical address space size as supported by the current CPU. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Acked-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
* ArmPkg/ArmMmuLib: Add MMU Library suitable for use in S-EL0.Achin Gupta2018-11-271-0/+42
| | | | | | | | | | | | | | | | | | | | | | | The Standalone MM environment runs in S-EL0 in AArch64 on ARM Standard Platforms. Privileged firmware e.g. ARM Trusted Firmware sets up its architectural context including the initial translation tables for the S-EL1/EL0 translation regime. The MM environment will still request ARM TF to change the memory attributes of memory regions during initialization. The Standalone MM image is a FV that encapsulates the MM foundation and drivers. These are PE-COFF images with data and text segments. To initialise the MM environment, Arm Trusted Firmware has to create translation tables with sane default attributes for the memory occupied by the FV. This library sends SVCs to ARM Trusted Firmware to request memory permissions change for data and text segments. This patch adds a simple MMU library suitable for execution in S-EL0 and requesting memory permissions change operations from Arm Trusted Firmware. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Sughosh Ganu <sughosh.ganu@arm.com> Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
* ArmPkg/Include: Add MM interface SVC return codes.Achin Gupta2018-11-271-0/+7
| | | | | | | | | This patch adds the Management Mode(MM) - Secure Partition Manager(SPM) SVC return codes. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Sughosh Ganu <sughosh.ganu@arm.com> Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
* ArmPkg/Include: Fix the SPM version SVC IDSughosh Ganu2018-11-271-1/+1
| | | | | | | | | The MM_VERSION SMC call uses SMC32 calling convention. Fix the macro to reflect the correct value. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Sughosh Ganu <sughosh.ganu@arm.com> Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-20 14:47:32 +0000