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* ArmPkg/DebugPeCoffExtraActionLib: Drop RVCT and Cygwin supportArd Biesheuvel2023-12-141-69/+31
| | | | | | | | | | | | | | | | | The DebugPeCoffExtraActionLib implemention in ArmPkg contains some cruft that dates back to the original RVCT based ARM port, and support for RVCT was dropped a while ago. Also drop the handling of Cygwin specific paths, which is highly unlikely to be still depended upon by anyone. Tweak the logic so that only two versions of the DEBUG() invocations remain: one for __GNUC__ when PdbPointer is set, and the fallback that just prints the image address and the address of the entrypoint. Signed-off-by: Ard Biesheuvel <ardb@kernel.org> Reviewed-by: Leif Lindholm <quic_llindhol@quicinc.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
* ArmPkg/ArmMmuLib: Use function pointer typeMichael Kubacki2023-11-285-13/+33
| | | | | | | | | | | | | | | | | | | mReplaceLiveEntryFunc is a function pointer but assigned as a VOID* pointer: mReplaceLiveEntryFunc = *(VOID **)GET_GUID_HOB_DATA (Hob); This leads to the Visual Studio warning: nonstandard extension, function/data pointer conversion in expression This change updates the assignment to avoid using a data pointer and defines a type for the function pointer to succinctly and accurately refer to the type when it is used in the library code. Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com> Reviewed-by: Ard Biesheuvel <ardb@kernel.org>
* ArmPkg/ArmLib: Add ArmHasEte () helper functionSami Mujawar2023-10-301-0/+16
| | | | | | | | | | | | | Create a helper function to query whether ID_AA64MFR1_EL1 indicates presence of the Embedded Trace Extension (ETE). This feature is only visible in AARCH64 state. Cc: Ard Biesheuvel <ardb+tianocore@kernel.org> Cc: Leif Lindholm <quic_llindhol@quicinc.com> Cc: Pierre Gondois <pierre.gondois@arm.com> Signed-off-by: Sami Mujawar <sami.mujawar@arm.com> Reviewed-by: Leif Lindholm <quic_llindhol@quicinc.com> Reviewed-by: Pierre Gondois <pierre.gondois@arm.com>
* ArmPkg/ArmLib: Add ArmHasTrbe () helper functionSami Mujawar2023-10-301-0/+15
| | | | | | | | | | | | | Create a helper function to query whether ID_AA64MFR1_EL1 indicates presence of the Trace Buffer Extension (TRBE). This feature is only visible in AARCH64 state. Cc: Ard Biesheuvel <ardb+tianocore@kernel.org> Cc: Leif Lindholm <quic_llindhol@quicinc.com> Cc: Pierre Gondois <pierre.gondois@arm.com> Signed-off-by: Sami Mujawar <sami.mujawar@arm.com> Reviewed-by: Leif Lindholm <quic_llindhol@quicinc.com> Reviewed-by: Pierre Gondois <pierre.gondois@arm.com>
* ArmPkg/ArmLib: Add ArmHasVhe () helper functionLeif Lindholm2023-09-201-0/+15
| | | | | | | | | | | | | Create a helper function to query whether ID_AA64MFR1_EL1 indicates presence of the Virtualization Host Extensions. This feature is only visible in AARCH64 state. Signed-off-by: Leif Lindholm <quic_llindhol@quicinc.com> Cc: Ard Biesheuvel <ardb+tianocore@kernel.org> Cc: Sami Mujawar <sami.mujawar@arm.com> Cc: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com> Tested-by: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org>
* ArmPkg/ArmMmuLib: Drop buggy secure memory type checkArd Biesheuvel2023-09-121-2/+0
| | | | | | | | | | | | | | | Jake reports that the IS_ARM_MEMORY_REGION_ATTRIBUTES_SECURE() macro is no longer accurate since commit 852227a9d52e3cb9 ("ArmPkg/Mmu: Remove handling of NONSECURE memory regions"). Fortunately, it only affects the NS bit in level 1 short descriptors, which is ignored when executing in non-secure mode. And given that running UEFI in the secure world is not a use case we aim to support, let's just drop this logic altogether. Reported-by: Jake Garver <jake@nvidia.com> Signed-off-by: Ard Biesheuvel <ardb@kernel.org> Reviewed-by: Leif Lindholm <quic_llindhol@quicinc.com>
* ArmPkg: DefaultExceptionHandlerLib: Do Not Allocate MemoryOliver Smith-Denny2023-08-032-15/+41
| | | | | | | | | | | | | | | | | | | | | | | | | | | | If gST->ConOut is available when Arm's DefaultExceptionHandler is running, AsciiPrint will get called to attempt to print to ConOut, in addition to the serial output. AsciiPrint calls AsciiInternalPrint in UefiLibPrint.c which in turn calls AllocatePool to allocate a buffer to convert the Ascii input string to a Unicode string to pass to ConOut->OutputString. Per the comment on DefaultExceptionHandler, we should not be allocating memory in the exception handler, as this can cause the exception handler to fail if we had a memory exception or the system state is such that we cannot allocate memory. It has been observed on ArmVirtQemu that exceptions generated in the memory handling code will fail to output the stack dump and CPU state that is critical to debugging because the AllocatePool will fail. This patch fixes the Arm and AARCH64 DefaultExceptionHandlers to not allocate memory when ConOut is available and instead use stack memory to convert the Ascii string needed for SerialPortWrite to the Unicode string needed for ConOut->OutputString. Correspondingly, ArmVirtQemu can now output the stack dump and CPU state when hitting an exception in memory code. Signed-off-by: Oliver Smith-Denny <osde@linux.microsoft.com>
* ArmPkg/OpteeLib: Map shared communication buffer non-executableArd Biesheuvel2023-06-271-1/+6
| | | | | | | | | | The OP-TEE secure OS exposes a non-secure memory region for communication between the secure OS itself and any clients in the non-secure firmware. This memory is writable by non-secure and is not used for code only data, and so it should be mapped non-executable. Signed-off-by: Ard Biesheuvel <ardb@kernel.org> Reviewed-by: Leif Lindholm <quic_llindhol@quicinc.com>
* ArmPkg: Drop individual memory permission helpersArd Biesheuvel2023-06-272-240/+0
| | | | | | | | | | Now that we have a sane API to set and clear memory permissions that works the same on ARM and AArch64, we no longer have a need for the individual set/clear no-access/read-only/no-exec helpers so let's drop them. Signed-off-by: Ard Biesheuvel <ardb@kernel.org> Reviewed-by: Leif Lindholm <quic_llindhol@quicinc.com>
* ArmPkg/ArmMmuLib: Extend API to manage memory permissions betterArd Biesheuvel2023-06-263-15/+131
| | | | | | | | | | | | | | | | | | | | | | | | | | Currently, ArmSetMemoryAttributes () takes a combination of EFI_MEMORY_xx constants describing the memory type and permission attributes that should be set on a region of memory. In cases where the memory type is omitted, we assume that the memory permissions being set are final, and that existing memory permissions can be discarded. This is problematic, because we aim to map memory non-executable (EFI_MEMORY_XP) by default, and only relax this requirement for code regions that are mapped read-only (EFI_MEMORY_RO). Currently, setting one permission clears the other, and so code managing these permissions has to be aware of the existing permissions in order to be able to preserve them, and this is not always tractable (e.g., the UEFI memory attribute protocol implements an abstraction that promises to preserve memory permissions that it is not operating on explicitly). So let's add an AttributeMask parameter to ArmSetMemoryAttributes(), which is permitted to be non-zero if no memory type is being provided, in which case only memory permission attributes covered in the mask will be affected by the update. Signed-off-by: Ard Biesheuvel <ardb@kernel.org> Reviewed-by: Oliver Smith-Denny <osde@linux.microsoft.com> Reviewed-by: Michael Kubacki <michael.kubacki@microsoft.com>
* ArmPkg: Configure PcdEmuVariableNvModeEnable as a dynamic PCDSami Mujawar2023-05-291-1/+1
| | | | | | | | | | | | | | | | The PCD gEfiMdeModulePkgTokenSpaceGuid.PcdEmuVariableNvModeEnable indicates if a variable driver will emulate the variable NV mode. This PCD is defined as [PcdsFixedAtBuild, PcdsPatchableInModule, PcdsDynamic, PcdsDynamicEx]. Some firmware builds may define this PCD as a dynamic PCD and initialise the value at runtime. Therefore, move the PCD declaration from the [FixedPcd] section to the [Pcd] section in the platform boot manager library file PlatformBootManagerLib.inf. Without this change the build would not succeed. Signed-off-by: Sami Mujawar <sami.mujawar@arm.com> Reviewed-by: Ard Biesheuvel <ardb@kernel.org>
* ArmPkg/ArmMmuLib AARCH64: Add missing ISB after page table updateArd Biesheuvel2023-05-231-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | The helper that updates live page table entries writes a zero entry, invalidates the covered address range from the TLBs, and finally writes the actual entry. This ensures that no TLB conflicts can occur. Writing the final entry needs to complete before any translations can be performed, as otherwise, the zero entry, which describes an invalid translation, may be observed by the page table walker, resulting in a translation fault. For this reason, the final write is followed by a DSB barrier instruction. However, this barrier will not stall the pipeline, and instruction fetches may still hit this invalid translation, as has been observed and reported by Oliver. To ensure that the new translation is fully active before returning from this helper, we have to insert an ISB barrier as well. Reported-by: Oliver Steffen <osteffen@redhat.com> Tested-by: Oliver Steffen <osteffen@redhat.com> Reviewed-by: Leif Lindholm <quic_llindhol@quicinc.com> Acked-by: Michael D Kinney <michael.d.kinney@intel.com> Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
* ArmPkg/PlatformBootManagerLib: Add path to boot UEFI Shell over UiAppPierre Gondois2023-05-042-2/+74
| | | | | | | | | | | | | | | | | | The UEFI Shell is a non-active boot option, at the opposite of UiApp. If no valid boot option is found, UiApp is selected. UiApp requires a human interaction. When installing a new EDKII image in CIs or when scripting is required, this is problematic. If no valid boot option is discovered, add a path to directly go to the UEFI Shell where the startup.nsh script is automatically executed. The UEFI Shell is launched after connecting possible devices, but before the reset that is meant to automatically make them visible. The new PcdUefiShellDefaultBootEnable must be set to TRUE to enable this behaviour. The Pcd is set to false by default. Signed-off-by: Pierre Gondois <pierre.gondois@arm.com> Tested-by: Patrik Berglund <patrik.berglund@arm.com>
* ArmLib: add functions to read system registersMarcin Juszkiewicz2023-04-212-9/+99
| | | | | | | | ArmCpuInfo uses those to read system registers and other parts of EDK2 may find them useful. Signed-off-by: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org> Reviewed-by: Leif Lindholm <quic_llindhol@quicinc.com>
* ArmPkg/ArmMmuLib: Fix ArmReplaceLiveTranslationEntry() alignmentMarvin Häuser2023-04-201-6/+8
| | | | | | | | | | | | | | | | | | As the ASM_FUNC() macro performs a section switch, the preceding .balign directive applies the alignment constraint to the current location in the previous section. As the linker may not merge the sections in-order, ArmReplaceLiveTranslationEntry() may be left unaligned. Replace the explicit invocation of .balign with the ASM_FUNC_ALIGN() macro, which guarantees the alignment constraint is applied correctly. To make sure related issues are reliably caught in the future, align the end of the function before checking the total occupied size. This ensures crossing a 0x200 boundary will cause a compilation error. Signed-off-by: Marvin Häuser <mhaeuser@posteo.de> Reviewed-by: Leif Lindholm <quic_llindhol@quicinc.com> Reviewed-by: Ard Biesheuvel <ardb@kernel.org>
* ArmPkg: Update code to be more C11 compliant by using __func__Rebecca Cran2023-04-104-20/+20
| | | | | | | | | | | | __FUNCTION__ is a pre-standard extension that gcc and Visual C++ among others support, while __func__ was standardized in C99. Since it's more standard, replace __FUNCTION__ with __func__ throughout ArmPkg. Signed-off-by: Rebecca Cran <rebecca@bsdio.com> Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com> Reviewed-by: Ard Biesheuvel <ardb@kernel.org>
* ArmPkg, BaseTools AARCH64: Add BTI ELF note to .hii objectsArd Biesheuvel2023-03-301-0/+0
| | | | | | | | | | | | | | | | The ELF based toolchains use objcopy to create HII object files, which contain only a single .hii section. This means no GNU note is inserted that describes the object as compatible with BTI, even though the lack of executable code in such an object makes the distinction irrelevant. However, the linker will not add the note globally to the resulting ELF executable, and this breaks BTI compatibility. So let's insert a GNU BTI-compatible ELF note by hand when generating such object files. Signed-off-by: Ard Biesheuvel <ardb@kernel.org> Reviewed-by: Leif Lindholm <quic_llindhol@quicinc.com> Reviewed-by: Oliver Smith-Denny <osd@smith-denny.com>
* ArmPkg/GccLto AARCH64: Add BTI note to LTO helper libraryArd Biesheuvel2023-03-301-0/+0
| | | | | | | | | | | | | The GccLto helper library does not contain any code, as its only purpose is to pull in other libraries that implement intrinsics to which the linker's codegen pass may emit calls. So mark it as BTI compatible, so that the linker does not complain about unannotated objects. Signed-off-by: Ard Biesheuvel <ardb@kernel.org> Reviewed-by: Leif Lindholm <quic_llindhol@quicinc.com> Reviewed-by: Oliver Smith-Denny <osd@smith-denny.com>
* ArmPkg: Emit BTI opcodes when BTI codegen is enabledArd Biesheuvel2023-03-302-5/+4
| | | | | | | | | | | | | | | | When building with -mbranch-protection=bti, which affects the compiler codegen only, ensure that the assembler based codegen is aligned with this, by emitting the BTI C opcode at the start of each exported function. While most exported functions are not in fact ever called indirectly, whether or not this is the case is a property of the caller so annotating every exported function is a reasonable default. While at it, fix two occurrences in ArmPkg of exported functions that did not use the ASM_FUNC() macro. Signed-off-by: Ard Biesheuvel <ardb@kernel.org> Reviewed-by: Leif Lindholm <quic_llindhol@quicinc.com> Reviewed-by: Oliver Smith-Denny <osd@smith-denny.com>
* ArmPkg/ArmMmuLib: Introduce region types for RO/XP WB cached memoryArd Biesheuvel2023-03-162-6/+41
| | | | | | | | | | | | | | | | To prepare for the enablement of booting EFI with the SCTLR.WXN control enabled, which makes all writeable memory regions non-executable by default, introduce a memory type that we will use to describe the flash region that carries the SEC and PEIM modules that execute in place. Even if these are implicitly read-only due to the ROM nature, they need to be mapped with read-only attributes in the page tables to be able to execute from them. Also add the XP counterpart which will be used for all normal DRAM right at the outset. Signed-off-by: Ard Biesheuvel <ardb@kernel.org> Reviewed-by: Leif Lindholm <quic_llindhol@quicinc.com>
* ArmPkg/Mmu: Remove handling of NONSECURE memory regionsArd Biesheuvel2023-03-162-32/+6
| | | | | | | | | | | | Non-secure memory is a distinction that only matters when executing code in the secure world that reasons about the secure vs non-secure address spaces. EDK2 was not designed for that, and the AArch64 version of the MMU handling library already treats them as identical, so let's just drop the ARM memory region types that mark memory as 'non-secure' explicitly. Signed-off-by: Ard Biesheuvel <ardb@kernel.org> Reviewed-by: Leif Lindholm <quic_llindhol@quicinc.com>
* ArmPkg/ArmMmuLib: Avoid splitting block entries if possibleArd Biesheuvel2023-03-162-0/+21
| | | | | | | | | | | | | | | | | Currently, the ARM MMU page table logic will break down any block entry that overlaps with the region being mapped, even if the block entry in question is using the same attributes as the new region. This means that creating a non-executable mapping inside a region that is already mapped non-executable at a coarser granularity may trigger a call to AllocatePages (), which may recurse back into the page table code to update the attributes on the newly allocated page tables. Let's avoid this, by preserving the block entry if it already covers the region being mapped with the correct attributes. Signed-off-by: Ard Biesheuvel <ardb@kernel.org> Reviewed-by: Leif Lindholm <quic_llindhol@quicinc.com>
* ArmPkg/ArmMmuLib: Implement EFI_MEMORY_RP using access flagArd Biesheuvel2023-03-162-3/+103
| | | | | | | | | | | Implement support for read-protected memory by wiring it up to the access flag in the page table descriptor. The resulting mapping is implicitly non-writable and non-executable as well, but this is good enough for implementing this attribute, as we never rely on write or execute permissions without read permissions. Signed-off-by: Ard Biesheuvel <ardb@kernel.org> Reviewed-by: Leif Lindholm <quic_llindhol@quicinc.com>
* ArmPkg/ArmMmuLib ARM: Clear individual permission bitsArd Biesheuvel2023-03-161-13/+81
| | | | | | | | | | | | | | | | | Currently, the MMU code that is supposed to clear the RO or XP attributes from a region just clears both unconditionally. This approximates the desired behavior to some extent, but it does mean that setting the RO bit first on a code region, and then clearing the XP bit results both RO and XP being cleared, and we end up with writable code, and avoiding that is the point of all these protections. Once we introduce RP support, this will only get worse, so let's fix this up, by reshuffling the attribute update code to take the entry mask from the caller, and use the mask to preserve other attributes when clearing RO or XP. Signed-off-by: Ard Biesheuvel <ardb@kernel.org> Reviewed-by: Leif Lindholm <quic_llindhol@quicinc.com>
* ArmPkg/ArmMmuLib ARM: Isolate the access flag from AP maskArd Biesheuvel2023-03-163-2/+13
| | | | | | | | | | | Split the ARM permission fields in the short descriptors into an access flag and AP[2:1] as per the recommendation in the ARM ARM. This makes the access flag available separately, which allows us to implement EFI_MEMORY_RP memory analogous to how it will be implemented for AArch64. Signed-off-by: Ard Biesheuvel <ardb@kernel.org> Reviewed-by: Leif Lindholm <quic_llindhol@quicinc.com>
* ArmPkg/ArmMmuLib ARM: Split off XN page descriptor bit from type fieldArd Biesheuvel2023-03-161-6/+6
| | | | | | | | | | | With large page support out of the picture, we can treat bits 1 and 0 of the page descriptor as individual valid and XN bits, instead of treating XN as a page type. Doing so aligns the handling of the attribute with the section descriptor layout, as well as the XN handling on AArch64, and this is beneficial for maintainability. Signed-off-by: Ard Biesheuvel <ardb@kernel.org> Reviewed-by: Leif Lindholm <quic_llindhol@quicinc.com>
* ArmPkg/ArmMmuLib ARM: Remove half baked large page supportArd Biesheuvel2023-03-163-6/+5
| | | | | | | | | | | | | | | | | | Large page support on 32-bit ARM is essentially a glorified contiguous bit where 16 consecutive entries describing a contiguous range with the same attributes are presented in a way that permits the TLB to cache its translation with a single entry. This was never wired up completely, and does not add a lot of value in EFI, where the page granularity is 4k and we expect to be able to set RO and XP permissions on individual pages. Given that large page support complicates the handling of the XN bit at the page level (which is in a different place depending on whether the page is small or large), let's just rip it out. Signed-off-by: Ard Biesheuvel <ardb@kernel.org> Reviewed-by: Leif Lindholm <quic_llindhol@quicinc.com>
* ArmPkg: Remove RealView Debugger supportRebecca Cran2023-01-303-187/+0
| | | | | | | | | | | | The RealView Debugger is related to RVCT, which is no longer supported. Given that, remove RvdPeCoffExtraActionLib and code from RvdPeCoffExtraActionLib which prints lines for use with the RealView Debugger. Signed-off-by: Rebecca Cran <rebecca@bsdio.com> Acked-by: Ard Biesheuvel <ardb@kernel.org> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn> Acked-by: Bob Feng <bob.c.feng@intel.com>
* ArmPkg/ArmTrngLib: Remove ASSERTs in ArmTrngLibConstructor()Pierre Gondois2022-11-261-5/+0
| | | | | | | | Remove ASSERTs in ArmTrngLibConstructor() that prevent from booting on DEBUG builds. Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com> Reviewed-by: Ard Biesheuvel <ardb@kernel.org>
* ArmPkg/ArmTrngLib: Remove ASSERT in GetArmTrngVersion()Pierre Gondois2022-11-161-1/+0
| | | | | | | | | | | | | | BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4150 GetArmTrngVersion() is used to check the presence of an Arm Trng. If not found, an ASSERT prevents from booting in DEBUG builds. Remove this ASSERT. Reported-by: Sami Mujawar <sami.mujawar@arm.com> Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com> Acked-by: Ard Biesheuvel <ardb@kernel.org> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
* ArmPkg/ArmTrngLib: Fix incorrect GUID reference in DEBUG() outputArd Biesheuvel2022-11-111-1/+1
| | | | | | | | | ArmTrngLib crashes when run in DEBUG mode due to the fact that it passed the [truncated] GUID value to a DEBUG() print statement instead of a pointer to the GUID which is what the %g conversion expects. Signed-off-by: Ard Biesheuvel <ardb@kernel.org> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
* ArmPkg/ArmTrngLib: Add Arm TRNG librarySami Mujawar2022-11-063-0/+467
| | | | | | | | | | | | | | | | | | | | Bugzilla: 3668 (https://bugzilla.tianocore.org/show_bug.cgi?id=3668) The Arm True Random Number Generator Firmware, Interface 1.0, Platform Design Document (https://developer.arm.com/documentation/den0098/latest/) defines an interface between an Operating System (OS) executing at EL1 and Firmware (FW) exposing a conditioned entropy source that is provided by a TRNG back end. The conditioned entropy, that is provided by the Arm TRNG interface, is commonly used to seed deterministic random number generators. This patch adds an ArmTrngLib library that implements the Arm TRNG interface. Acked-by: Leif Lindholm <quic_llindhol@quicinc.com> Signed-off-by: Pierre Gondois <pierre.gondois@arm.com>
* ArmPkg/ArmHvcLibNull: Add NULL instance of ArmHvcLibPierre Gondois2022-11-062-0/+51
| | | | | | | Add a Null instance of ArmHvcLib in case of library dependencies. Reviewed-by: Leif Lindholm <quic_llindhol@quicinc.com> Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com>
* ArmPkg/ArmMonitorLib: Add ArmMonitorLibPierre Gondois2022-11-062-0/+63
| | | | | | | | | | The ArmMonitorLib provides an abstract interface to issue an HyperVisor Call (HVC) or System Monitor Call (SMC) depending on the default conduit. The PcdMonitorConduitHvc PCD allows to select the default conduit. Reviewed-by: Leif Lindholm <quic_llindhol@quicinc.com> Signed-off-by: Pierre Gondois <pierre.gondois@arm.com>
* ArmPkg/ArmMmuLib: Reuse XIP MMU routines when splitting entriesArd Biesheuvel2022-10-194-10/+42
| | | | | | | | | | | | | | In order to reduce the likelihood that we will need to rely on the logic that disables and re-enables the MMU for updating a page table entry safely, expose the XIP version of the helper routine via a HOB and use it instead of the one that is copied into DRAM. Since the XIP copy is already clean to the PoC, and will never end up getting unmapped during a block entry split, we can use it safely without any cache maintenance, and without running the risk of pulling the rug from under our feet when updating an entry by going through an invalid mapping. Signed-off-by: Ard Biesheuvel <ardb@kernel.org> Acked-by: Leif Lindholm <quic_llindhol@quicinc.com>
* ArmPkg/ArmMmuLib: permit initial configuration with MMU enabledArd Biesheuvel2022-10-191-22/+26
| | | | | | | | | | | | | | Permit the use of this library with the MMU and caches already enabled. This removes the need for any cache maintenance for coherency, and is generally better for robustness and performance, especially when running under virtualization. Note that this means we have to defer assignment of TTBR0 until the page tables are ready to be used, and so UpdateRegionMapping() can no longer read back TTBR0 directly to discover the root table address. Signed-off-by: Ard Biesheuvel <ardb@kernel.org> Acked-by: Leif Lindholm <quic_llindhol@quicinc.com>
* ArmPkg/ArmMmuLib: Disable and re-enable MMU only when neededArd Biesheuvel2022-10-192-26/+119
| | | | | | | | | | | | | When updating a page table descriptor in a way that requires break before make, we temporarily disable the MMU to ensure that we don't unmap the memory region that the code itself is executing from. However, this is a condition we can check in a straight-forward manner, and if the regions are disjoint, we don't have to bother with the MMU controls, and we can just perform an ordinary break before make. Signed-off-by: Ard Biesheuvel <ardb@kernel.org> Reviewed-by: Leif Lindholm <quic_llindhol@quicinc.com>
* ArmPkg/ArmMmuLib: don't replace table entries with block entriesArd Biesheuvel2022-10-191-18/+2
| | | | | | | | | | | | Drop the optimization that replaces table entries with block entries and frees the page tables in the subhierarchy that is being replaced. This rarely occurs in practice anyway, and will require more elaborate TLB maintenance once we switch to a different approach where we no longer disable the MMU and nuke the TLB entirely every time we update a descriptor in a way that requires break-before-make (BBM). Signed-off-by: Ard Biesheuvel <ardb@kernel.org> Reviewed-by: Leif Lindholm <quic_llindhol@quicinc.com>
* ArmPkg: Remove duplicated wordsPierre Gondois2022-09-051-1/+1
| | | | | | | | | In an effort to clean the documentation of the above package, remove duplicated words, and fix a typo while at it. Signed-off-by: Pierre Gondois <pierre.gondois@arm.com> Reviewed-by: Sami Mujawar <sami.muajwar@arm.com> Reviewed-by: Leif Lindholm <quic_llindhol@quicinc.com>
* ArmPkg: Handle warm reboot request correctlyPranav Madhu2022-09-051-2/+19
| | | | | | | | | | The warm reboot requests from OSPM are mapped to cold reboot. To handle the warm reboot separately from a cold reboot, update ArmSmcPsciResetSystemLib and to invoke the PSCI call with parameters for warm reboot. Signed-off-by: Pranav Madhu <pranav.madhu@arm.com> Reviewed-by: Ard Biesheuvel <ardb@kernel.org>
* UefiCpuPkg: Simplify InitializeSeparateExceptionStacksLiu, Zhiguang2022-08-091-6/+9
| | | | | | | | | | | | | | | | Hide the Exception implementation details in CpuExcetionHandlerLib and caller only need to provide buffer Cc: Eric Dong <eric.dong@intel.com> Reviewed-by: Ray Ni <ray.ni@intel.com> Cc: Rahul Kumar <rahul1.kumar@intel.com> Cc: Leif Lindholm <quic_llindhol@quicinc.com> Cc: Dandan Bi <dandan.bi@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Jian J Wang <jian.j.wang@intel.com> Cc: Ard Biesheuvel <ardb+tianocore@kernel.org> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com> Signed-off-by: Zhiguang Liu <zhiguang.liu@intel.com>
* ArmPkg/ArmExceptionLib: Follow new CpuExceptionHandlerLib APIsRay Ni2022-06-141-47/+11
| | | | | | | | | | | | | | | | | CpuExceptionHandlerLib has been refactored with following changes: 1. Removed InitializeCpuInterruptHandlers in 2a09527ebcb459b40 2. Removed InitializeCpuExceptionHandlersEx and added InitializeSeparateExceptionStacks in e7abb94d1fb8a0e7 The patch updates ARM version of CpuExceptionHandlerLib to follow the API changes. The functionality to ARM platforms should be none. Signed-off-by: Ray Ni <ray.ni@intel.com> Cc: Leif Lindholm <quic_llindhol@quicinc.com> Cc: Ard Biesheuvel <ardb+tianocore@kernel.org> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
* ArmPkg: Remove RVCT supportRebecca Cran2022-05-1324-1446/+0
| | | | | | | | RVCT is obsolete and no longer used. Remove support for it. Signed-off-by: Rebecca Cran <quic_rcran@quicinc.com> Reviewed-by: Ard Biesheuvel <ardb@kernel.org>
* ArmPkg/ArmMmuLib AARCH64: avoid EL0 accessible mappingsArd Biesheuvel2022-02-011-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | We never run any code at EL0, and so it would seem that any access permissions set for EL0 (via the AP[1] attribute in the page tables) are irrelevant. We currently set EL0 and EL1 permissions to the same value arbitrarily. However, this causes problems on hardware like the Apple M1 running the MacOS hypervisor framework, which enters EL1 with SCTLR_EL1.SPAN enabled, causing the Privileged Access Never (PAN) feature to be enabled on any exception taken to EL1, including the IRQ exceptions that handle our timer interrupt. When PAN is enabled, EL1 has no access to any mappings that are also accessible to EL0, causing the firmware to crash if it attempts to access such a mapping. Even though it is debatable whether or not SCTLR_EL1.SPAN should be disabled at entry or whether the firmware should put all UNKNOWN bits in all system registers in a consistent state (which it should), using EL0 permissions serves no purpose whatsoever so let's fix that regardless. Signed-off-by: Ard Biesheuvel <ardb@kernel.org> Tested-by: Alexander Graf <agraf@csgraf.de> Acked-by: Leif Lindholm <leif@nuviainc.com>
* ArmPkg: Update SMC calls to use the new ArmCallSmc0/1/2/3 functionsRebecca Cran2021-12-141-8/+2
| | | | | | | | | New SMC helper functions have been added to reduce the amount of template code. Update ArmSmcPsciResetSystemLib and Smbios/ProcessorSubClassDxe to use them. Signed-off-by: Rebecca Cran <rebecca@nuviainc.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
* ArmPkg: Add SMC helper functionsRebecca Cran2021-12-143-0/+217
| | | | | | | | | Add functions ArmCallSmc0/1/2/3 to do SMC calls with 0, 1, 2 or 3 arguments. The functions return up to 3 values. Signed-off-by: Rebecca Cran <rebecca@nuviainc.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
* ArmPkg: Apply uncrustify changesMichael Kubacki2021-12-0751-2550/+3110
| | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3737 Apply uncrustify changes to .c/.h files in the ArmPkg package Cc: Andrew Fish <afish@apple.com> Cc: Leif Lindholm <leif@nuviainc.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com> Reviewed-by: Andrew Fish <afish@apple.com>
* ArmPkg: Change OPTIONAL keyword usage styleMichael D Kinney2021-12-072-3/+2
| | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3760 Update all use of ', OPTIONAL' to ' OPTIONAL,' for function params. Cc: Andrew Fish <afish@apple.com> Cc: Leif Lindholm <leif@nuviainc.com> Cc: Michael Kubacki <michael.kubacki@microsoft.com> Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com> Reviewed-by: Andrew Fish <afish@apple.com>
* ArmPkg: Change use of EFI_D_* to DEBUG_*Michael D Kinney2021-12-078-68/+67
| | | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3739 Update all use of EFI_D_* defines in DEBUG() macros to DEBUG_* defines. Cc: Andrew Fish <afish@apple.com> Cc: Leif Lindholm <leif@nuviainc.com> Cc: Michael Kubacki <michael.kubacki@microsoft.com> Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com> Reviewed-by: Ard Biesheuvel <ardb@kernel.org>
* ArmPkg: Implement PlatformBootManagerLib for LinuxBootNhi Pham2021-10-232-0/+244
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | LinuxBoot is a firmware that replaces specific firmware functionality like the UEFI DXE phase with a Linux kernel and runtime. It is built-in UEFI image like an application, which is executed at the end of DXE phase. To achieve the LinuxBoot boot flow "SEC->PEI->DXE->BDS->LinuxBoot", today we use the common well-known GUID of UEFI Shell for LinuxBoot payload, so LinuxBoot developers can effortlessly find the UEFI Shell Application and replace it with the LinuxBoot payload without recompiling platform EDK2 (There might be an issue with a few systems that don't have a UEFI Shell). Also, we have a hard requirement to force the BDS to boot into the LinuxBoot as it is essentially required that only the LinuxBoot boot option is permissible and UEFI is an intermediate bootstrap phase. Considering all the above, it is reasonable to just have a new GUID for LinuxBoot and require a LinuxBoot specific BDS implementation. In addition, with making the BDS implementation simpler, we can reduce many DXE drivers which we think it is not necessary for LinuxBoot booting. This patch adds a new PlatformBootManagerLib implementation which registers only the gArmTokenSpaceGuid.PcdLinuxBootFileGuid for LinuxBoot payload as an active boot option. It allows BDS to jump to the LinuxBoot quickly by skipping the UiApp and UEFI Shell. The PlatformBootManagerLib library derived from ArmPkg/Library/PlatformBootManagerLib. Cc: Leif Lindholm <leif@nuviainc.com> Cc: Ard Biesheuvel <ardb+tianocore@kernel.org> Signed-off-by: Nhi Pham <nhi@os.amperecomputing.com> Acked-by: Ard Biesheuvel <ardb@kernel.org> Acked-by: Samer El-Haj-Mahmoud <Samer.El-Haj-Mahmoud@arm.com> Acked-by: Moritz Fischer <moritzf@google.com>
generated by cgit v1.2.3 (git 2.25.1) at 2024-06-27 14:35:02 +0000