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* UefiCpuPkg: Simplify InitializeSeparateExceptionStacksLiu, Zhiguang2022-08-091-6/+9
| | | | | | | | | | | | | | | | Hide the Exception implementation details in CpuExcetionHandlerLib and caller only need to provide buffer Cc: Eric Dong <eric.dong@intel.com> Reviewed-by: Ray Ni <ray.ni@intel.com> Cc: Rahul Kumar <rahul1.kumar@intel.com> Cc: Leif Lindholm <quic_llindhol@quicinc.com> Cc: Dandan Bi <dandan.bi@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Jian J Wang <jian.j.wang@intel.com> Cc: Ard Biesheuvel <ardb+tianocore@kernel.org> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com> Signed-off-by: Zhiguang Liu <zhiguang.liu@intel.com>
* ArmPkg/CpuDxe: drop ARM_PROCESSOR_TABLE pseudo-ACPI tableArd Biesheuvel2022-07-225-147/+0
| | | | | | | | | | | The ARM_PROCESSOR_TABLE pseudo-ACPI table (which carries a ACPI-table like header but is published as a EFI config table) is not described in any relevant spec, and is not known to be relied upon by any OS. Let's just get rid of it. Signed-off-by: Ard Biesheuvel <ardb@kernel.org> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com> Tested-by: Sami Mujawar <sami.mujawar@arm.com>
* ArmPkg/Drivers: ArmGicIsInterruptEnabled returns incorrect valueRobbie King2022-07-011-4/+3
| | | | | | | | | | | | | | | | The issue appears to have been introduced by: 41fb5d46 : ArmPkg/ArmGic: Use the GIC Redistributor instead of GIC Distributor for GICv3 The changes to ArmGicIsInterruptEnabled() introduced the error where the Boolean result is assigned to Interrupts, but then the bit position check is performed again (against the computed Boolean result instead of the interrupt mask) during the return statement. Fix removes erroneous test and relies on boolean test made at return. Signed-off-by: Robbie King <robbiek@xsightlabs.com> Reviewed-by: Ard Biesheuvel <ardb@kernel.org>
* ArmPkg/ArmExceptionLib: Follow new CpuExceptionHandlerLib APIsRay Ni2022-06-141-47/+11
| | | | | | | | | | | | | | | | | CpuExceptionHandlerLib has been refactored with following changes: 1. Removed InitializeCpuInterruptHandlers in 2a09527ebcb459b40 2. Removed InitializeCpuExceptionHandlersEx and added InitializeSeparateExceptionStacks in e7abb94d1fb8a0e7 The patch updates ARM version of CpuExceptionHandlerLib to follow the API changes. The functionality to ARM platforms should be none. Signed-off-by: Ray Ni <ray.ni@intel.com> Cc: Leif Lindholm <quic_llindhol@quicinc.com> Cc: Ard Biesheuvel <ardb+tianocore@kernel.org> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
* ArmPkg: Remove RVCT supportRebecca Cran2022-05-1327-1552/+0
| | | | | | | | RVCT is obsolete and no longer used. Remove support for it. Signed-off-by: Rebecca Cran <quic_rcran@quicinc.com> Reviewed-by: Ard Biesheuvel <ardb@kernel.org>
* ArmPkg/ArmMmuLib AARCH64: avoid EL0 accessible mappingsArd Biesheuvel2022-02-012-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | We never run any code at EL0, and so it would seem that any access permissions set for EL0 (via the AP[1] attribute in the page tables) are irrelevant. We currently set EL0 and EL1 permissions to the same value arbitrarily. However, this causes problems on hardware like the Apple M1 running the MacOS hypervisor framework, which enters EL1 with SCTLR_EL1.SPAN enabled, causing the Privileged Access Never (PAN) feature to be enabled on any exception taken to EL1, including the IRQ exceptions that handle our timer interrupt. When PAN is enabled, EL1 has no access to any mappings that are also accessible to EL0, causing the firmware to crash if it attempts to access such a mapping. Even though it is debatable whether or not SCTLR_EL1.SPAN should be disabled at entry or whether the firmware should put all UNKNOWN bits in all system registers in a consistent state (which it should), using EL0 permissions serves no purpose whatsoever so let's fix that regardless. Signed-off-by: Ard Biesheuvel <ardb@kernel.org> Tested-by: Alexander Graf <agraf@csgraf.de> Acked-by: Leif Lindholm <leif@nuviainc.com>
* ArmPkg: Replace CoreId and ClusterId with Mpidr in ARM_CORE_INFO structRebecca Cran2022-01-302-2/+5
| | | | | | | | | | | Remove the ClusterId and CoreId fields in the ARM_CORE_INFO structure in favor of a new Mpidr field. Update code in ArmPlatformPkg/PrePeiCore/MainMPCore and ArmPlatformPkg/PrePi/MainMPCore.c to use the new field and call new macros GET_MPIDR_AFF0 and GET_MPIDR_AFF1 instead. Signed-off-by: Rebecca Cran <rebecca@nuviainc.com> Reviewed-by: Ard Biesheuvel <ardb@kernel.org>
* ArmPkg: MmCommunicationDxe: Update MM communicate `MessageLength` checkKun Qin2022-01-271-5/+11
| | | | | | | | | | | | | | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3751 Current MM communicate routine from ArmPkg would conduct few checks prior to proceeding with SMC calls. However, the inspection step is different from PI specification. This patch updated MM communicate input argument inspection routine to assure that "if the `MessageLength` is zero, or too large for the MM implementation to manage, the MM implementation must update the `MessageLength` to reflect the size of the `Data` buffer that it can tolerate", as described by `EFI_MM_COMMUNICATION_PROTOCOL.Communicate()` section in PI specification. Cc: Leif Lindholm <leif@nuviainc.com> Cc: Ard Biesheuvel <ardb+tianocore@kernel.org> Cc: Bret Barkelew <Bret.Barkelew@microsoft.com> Cc: Michael Kubacki <michael.kubacki@microsoft.com> Cc: Sami Mujawar <sami.mujawar@arm.com> Signed-off-by: Kun Qin <kuqin12@gmail.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
* ArmPkg: MmCommunicationDxe: Update MM communicate `CommSize` checkKun Qin2022-01-271-7/+12
| | | | | | | | | | | | | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3751 Current MM communicate routine from ArmPkg would conduct few checks prior to proceeding with SMC calls. However, the inspection step is different from PI specification. This patch updated MM communicate input argument inspection routine to assure `CommSize` represents "the size of the data buffer being passed in" instead of the size of the data being used from data buffer, as described by section `EFI_MM_COMMUNICATION2_PROTOCOL.Communicate()` in PI specification. Cc: Leif Lindholm <leif@nuviainc.com> Cc: Ard Biesheuvel <ardb+tianocore@kernel.org> Cc: Bret Barkelew <Bret.Barkelew@microsoft.com> Cc: Michael Kubacki <michael.kubacki@microsoft.com> Cc: Sami Mujawar <sami.mujawar@arm.com> Signed-off-by: Kun Qin <kuqin12@gmail.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
* ArmPkg: MmCommunicationDxe: Update MM communicate `CommBuffer**` checksKun Qin2022-01-271-1/+1
| | | | | | | | | | | | | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3751 Current MM communicate routine from ArmPkg would conduct few checks prior to proceeding with SMC calls. However, the inspection step is different from PI specification. This patch updated MM communicate input argument inspection routine to assure that return code `EFI_INVALID_PARAMETER` represents "the `CommBuffer**` parameters do not refer to the same location in memory", as described by `EFI_MM_COMMUNICATION2_PROTOCOL.Communicate()` section in PI specification. Cc: Leif Lindholm <leif@nuviainc.com> Cc: Ard Biesheuvel <ardb+tianocore@kernel.org> Cc: Bret Barkelew <Bret.Barkelew@microsoft.com> Cc: Michael Kubacki <michael.kubacki@microsoft.com> Cc: Sami Mujawar <sami.mujawar@arm.com> Signed-off-by: Kun Qin <kuqin12@gmail.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
* ArmPkg: MmCommunicationDxe: MM communicate function argument attributesKun Qin2022-01-271-6/+7
| | | | | | | | | | | | | | | | | | Current MM communicate2 function from ArmPkg described input arguments `CommBufferPhysical`, `CommBufferVirtual` and `CommSize` as input only, which mismatches with the "input and output type" as in PI specification. This change updated function descriptions of MM communite2 to match input argument types. Cc: Leif Lindholm <leif@nuviainc.com> Cc: Ard Biesheuvel <ardb+tianocore@kernel.org> Cc: Bret Barkelew <Bret.Barkelew@microsoft.com> Cc: Michael Kubacki <michael.kubacki@microsoft.com> Cc: Sami Mujawar <sami.mujawar@arm.com> Signed-off-by: Kun Qin <kuqin12@gmail.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
* ArmPkg/ProcessorSubClassDxe: Get serial and part number from OemMiscLibNhi Pham2021-12-162-2/+14
| | | | | | | | | | | Currently, the serial and part number of a processor are filled with fixed PCDs. However, they may be updated dynamically according to the information being passed from a the pre-UEFI firmware during booting. So, this patch is to support updating these string fields from OemMiscLib if the PCDs are empty. Signed-off-by: Nhi Pham <nhi@os.amperecomputing.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
* ArmPkg/SmbiosMiscDxe: Get full SMBIOS strings from OemMiscLibNhi Pham2021-12-163-0/+33
| | | | | | | | | | | Typically, the information of the SMBIOS type 1/2/3 is fetched from an FRU device during UEFI booting intead of fixed PCDs. Therefore, this patch is to add more HII string fields in the OemMiscLib and support updating these SMBIOS types with the strings provided by the OemMiscLib if the PCDs are empty. Signed-off-by: Nhi Pham <nhi@os.amperecomputing.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
* ArmPkg/SmbiosMiscDxe: Remove duplicate HII string definitionNhi Pham via groups.io2021-12-161-1/+0
| | | | | | | | This patch removes duplicate HII string definition in the MiscSystemManufacturer.uni. Signed-off-by: Nhi Pham <nhi@os.amperecomputing.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
* ArmPkg: Update SMC calls to use the new ArmCallSmc0/1/2/3 functionsRebecca Cran2021-12-142-32/+18
| | | | | | | | | New SMC helper functions have been added to reduce the amount of template code. Update ArmSmcPsciResetSystemLib and Smbios/ProcessorSubClassDxe to use them. Signed-off-by: Rebecca Cran <rebecca@nuviainc.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
* ArmPkg: Add SMC helper functionsRebecca Cran2021-12-144-0/+290
| | | | | | | | | Add functions ArmCallSmc0/1/2/3 to do SMC calls with 0, 1, 2 or 3 arguments. The functions return up to 3 values. Signed-off-by: Rebecca Cran <rebecca@nuviainc.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
* ArmPkg: Apply uncrustify changesMichael Kubacki2021-12-07142-5391/+6195
| | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3737 Apply uncrustify changes to .c/.h files in the ArmPkg package Cc: Andrew Fish <afish@apple.com> Cc: Leif Lindholm <leif@nuviainc.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com> Reviewed-by: Andrew Fish <afish@apple.com>
* ArmPkg: Change OPTIONAL keyword usage styleMichael D Kinney2021-12-072-3/+2
| | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3760 Update all use of ', OPTIONAL' to ' OPTIONAL,' for function params. Cc: Andrew Fish <afish@apple.com> Cc: Leif Lindholm <leif@nuviainc.com> Cc: Michael Kubacki <michael.kubacki@microsoft.com> Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com> Reviewed-by: Andrew Fish <afish@apple.com>
* ArmPkg: Change use of EFI_D_* to DEBUG_*Michael D Kinney2021-12-078-68/+67
| | | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3739 Update all use of EFI_D_* defines in DEBUG() macros to DEBUG_* defines. Cc: Andrew Fish <afish@apple.com> Cc: Leif Lindholm <leif@nuviainc.com> Cc: Michael Kubacki <michael.kubacki@microsoft.com> Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com> Reviewed-by: Ard Biesheuvel <ardb@kernel.org>
* ArmPkg: Update YAML to ignore specific ECC files/errorsMichael D Kinney2021-11-301-1/+4
| | | | | | | | | | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3749 Update package YAML files to ignore ECC errors that are already present. These issues must be fixed in the future, but should not block source code changes for these known issues. Cc: Leif Lindholm <leif@nuviainc.com> Cc: Ard Biesheuvel <ardb+tianocore@kernel.org> Cc: Sean Brogan <sean.brogan@microsoft.com> Cc: Bret Barkelew <Bret.Barkelew@microsoft.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Michael Kubacki <michael.kubacki@microsoft.com> Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com> Acked-by: Ard Biesheuvel <ardb@kernel.org> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com> Reviewed-by: Leif Lindholm <leif@nuviainc.com>
* ArmPkg: Reproduce builds across source format changesMichael D Kinney2021-11-087-7/+7
| | | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3688 Use DEBUG_LINE_NUMBER instead of __LINE__. Cc: Leif Lindholm <leif@nuviainc.com> Cc: Ard Biesheuvel <ardb+tianocore@kernel.org> Cc: Michael Kubacki <michael.kubacki@microsoft.com> Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com> Reviewed-by: Leif Lindholm <leif@nuviainc.com> Tested-by: Michael Kubacki <michael.kubacki@microsoft.com>
* ArmPkg: Implement PlatformBootManagerLib for LinuxBootNhi Pham2021-10-234-0/+254
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | LinuxBoot is a firmware that replaces specific firmware functionality like the UEFI DXE phase with a Linux kernel and runtime. It is built-in UEFI image like an application, which is executed at the end of DXE phase. To achieve the LinuxBoot boot flow "SEC->PEI->DXE->BDS->LinuxBoot", today we use the common well-known GUID of UEFI Shell for LinuxBoot payload, so LinuxBoot developers can effortlessly find the UEFI Shell Application and replace it with the LinuxBoot payload without recompiling platform EDK2 (There might be an issue with a few systems that don't have a UEFI Shell). Also, we have a hard requirement to force the BDS to boot into the LinuxBoot as it is essentially required that only the LinuxBoot boot option is permissible and UEFI is an intermediate bootstrap phase. Considering all the above, it is reasonable to just have a new GUID for LinuxBoot and require a LinuxBoot specific BDS implementation. In addition, with making the BDS implementation simpler, we can reduce many DXE drivers which we think it is not necessary for LinuxBoot booting. This patch adds a new PlatformBootManagerLib implementation which registers only the gArmTokenSpaceGuid.PcdLinuxBootFileGuid for LinuxBoot payload as an active boot option. It allows BDS to jump to the LinuxBoot quickly by skipping the UiApp and UEFI Shell. The PlatformBootManagerLib library derived from ArmPkg/Library/PlatformBootManagerLib. Cc: Leif Lindholm <leif@nuviainc.com> Cc: Ard Biesheuvel <ardb+tianocore@kernel.org> Signed-off-by: Nhi Pham <nhi@os.amperecomputing.com> Acked-by: Ard Biesheuvel <ardb@kernel.org> Acked-by: Samer El-Haj-Mahmoud <Samer.El-Haj-Mahmoud@arm.com> Acked-by: Moritz Fischer <moritzf@google.com>
* ArmPkg/Smbios: Fix max cache size 2 wrong issueMing Huang2021-10-151-1/+1
| | | | | | | | | As SMBIOS spec, bit-31 of maximum cache size 2 should be 1 for 64K granularity. Signed-off-by: Ming Huang <huangming@linux.alibaba.com> Reviewed-by: Rebecca Cran <rebecca@nuviainc.com> Acked-by: Leif Lindholm <leif@nuviainc.com>
* ArmVirtPkg/FdtPciHostBridgeLib: Relocate FdtPciHostBridgeLib to OvmfPkg/FdtAbner Chang2021-10-141-6/+4
| | | | | | | | | | | | | | | | | | | | | Relocate FdtPciHostBridgeLib to OvmfPkg/Fdt, this library is leverage by both ARM and RISC-V archs. Also use PcdPciMmio32Translation and PcdPciMmio64Translation PCDs provided by MdePkg instead of ArmPkg. Signed-off-by: Abner Chang <abner.chang@hpe.com> Cc: Ard Biesheuvel <ardb+tianocore@kernel.org> Cc: Leif Lindholm <leif@nuviainc.com> Cc: Sami Mujawar <sami.mujawar@arm.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Jordan Justen <jordan.l.justen@intel.com> Cc: Gerd Hoffmann <kraxel@redhat.com> Cc: Daniel Schaefer <daniel.schaefer@hpe.com> Cc: Sunil V L <sunilvl@ventanamicro.com> Reviewed-by: Daniel Schaefer <daniel.schaefer@hpe.com> Reviewed-by: Sunil V L <sunilvl@ventanamicro.com> Acked-by: Gerd Hoffmann <kraxel@redhat.com> Acked-by: Jiewen Yao <jiewen.yao@intel.com>
* ArmPkg: Use PcdPciIoTranslation PCD from MdePkgAbner Chang2021-10-142-4/+3
| | | | | | | | | | | | | | | | | | PcdPciIoTranslation PCD is relocated to MdePkg and leveraged by both ARM and RISC-V arch. This patch removes the one from ArmPkg and address the corresponding changes required for other modules under ArmVirtPkg. Signed-off-by: Abner Chang <abner.chang@hpe.com> Cc: Ard Biesheuvel <ardb+tianocore@kernel.org> Cc: Leif Lindholm <leif@nuviainc.com> Cc: Sami Mujawar <sami.mujawar@arm.com> Cc: Gerd Hoffmann <kraxel@redhat.com> Cc: Daniel Schaefer <daniel.schaefer@hpe.com> Cc: Sunil V L <sunilvl@ventanamicro.com> Reviewed-by: Daniel Schaefer <daniel.schaefer@hpe.com> Reviewed-by: Sunil V L <sunilvl@ventanamicro.com> Acked-by: Gerd Hoffmann <kraxel@redhat.com>
* ArmPkg: SmbiosMiscDxe: Don't populate ExtendedBiosSize when size < 16MBRebecca Cran2021-10-051-3/+4
| | | | | | | | | | | | | | | | | | | | | According to the SMBIOS specification, the ExtendedBiosSize field should be zero when the BIOS size is less than 16MB: "Size (n) where 64K * (n+1) is the size of the physical device containing the BIOS, in bytes. FFh - size is 16MB or greater, see Extended BIOS ROM Size for actual size." Fix the code in MiscBiosVendorFunction.c to only populate the ExtendedBiosSize field if the BIOS size is greater than 16MB. Fix the code to correctly populate the ExtendedBiosSize field with the unit bits set to MB if the size is between 16MB and 16GB. Signed-off-by: Rebecca Cran <rebecca@nuviainc.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com> Acked-by: Nhi Pham <nhi@os.amperecomputing.com>
* ArmPkg/ProcessorSubClassDxe: Fix the format of ProcessorIdNhi Pham2021-09-161-1/+2
| | | | | | | | | | | | | | According to SMBIOS 3.4, section 7.5.3.3 ARM64-class CPUs, if SMCCC_ARCH_SOC_ID is supported, the first DWORD is the JEP-106 code and the second DWORD is the SoC revision value. But in the current implementation, they are set in reverse. This patch is to correct it. Cc: Leif Lindholm <leif@nuviainc.com> Cc: Ard Biesheuvel <ardb+tianocore@kernel.org> Cc: Rebecca Cran <rebecca@nuviainc.com> Signed-off-by: Nhi Pham <nhi@os.amperecomputing.com> Reviewed-by: Rebecca Cran <rebecca@nuviainc.com> Acked-by: Leif Lindholm <leif@nuviainc.com>
* ArmPkg: Enable boot discovery policy for ARM package.Grzegorz Bernacki2021-08-302-1/+122
| | | | | | | | | | | | | This commit adds code which check BootDiscoveryPolicy variable and calls Boot Policy Manager Protocol to connect device specified by the variable. To enable that mechanism for platform EfiMdeModulePkgTokenSpaceGuid.PcdBootDiscoveryPolicy PCD must be added to DSC file and BootDiscoveryPolicyUiLib should be added to UiApp libraries. Signed-off-by: Grzegorz Bernacki <gjb@semihalf.com> Reviewed-by: Sunny Wang <sunny.wang@arm.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
* ArmPkg/GicV3Dxe: Don't signal EOI on arbitrary interruptsArd Biesheuvel2021-08-271-4/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently, at ExitBootServices() time, the GICv3 driver signals End-Of-Interrupt (EOI) on all interrupt lines that are supported by the interrupt controller. This appears to have been carried over from the GICv2 version, but has been turned into something that violates the GIC spec, and may trigger SError exceptions on some implementations. Marc puts it as follows: The GIC interrupt state machine is pretty strict. An interrupt can only be deactivated (with or without prior priority drop) if it has been acknowledged first. In GIC speak, this means that only the following sequences are valid: With EOImode==0: x = ICC_IAR{0,1}_EL1; ICC_EOIR{0,1}_EL1 = x; With EOImode==1: x = ICC_IAR{0,1}_EL1; ICC_EOIR{0,1}_EL1 = x; ICC_DIR_EL1 = x; Any write to ICC_EOIR{0,1}_EL1 that isn't the direct consequence of the same value being read from ICC_IAR{0,1}_EL1, and with the correct nesting, breaks the state machine and leads to unpredictable results that affects *all* interrupts in the system (most likely, the priority system is dead). See Figure 4-3 ("Interrupt handling state machine") in Arm IHI 0069F for a description of the acceptable transitions. Additionally, on implementations that have ICC_CTLR_EL1.SEIS==1, a SError may be generated to signal the error. See the various <quote> IMPLEMENTATION_DEFINED "SError ...."; </quote> that are all over the pseudocode contained in the same architecture spec. Needless to say, this is pretty final for any SW that would do silly things on such implementations (which do exist). Given that in our implementation, every signalled interrupt is acked, handled and EOId in sequence, there is no reason to EOI all interrupts at ExitBootServices() time in the first place, so let's just drop this code. This fixes an issue reported by Marc where an SError is triggered by this code, bringing down the system. Reported-by: Marc Zyngier <maz@kernel.org> Signed-off-by: Ard Biesheuvel <ardb@kernel.org> Acked-by: Marc Zyngier <maz@kernel.org> Tested-by: Marc Zyngier <maz@kernel.org> Reviewed-by: Leif Lindholm <leif@nuviainc.com>
* ArmPkg: prepare 32bit ARM build of StandaloneMmPkgEtienne Carriere2021-08-114-11/+14
| | | | | | | | | | | | | | Changes in ArmPkg to prepare building StandaloneMm firmware for 32bit Arm architectures. Adds ArmmmuStandaloneMmLib library to the list of the standard components build for ArmPkg on when ARM architectures. Changes path of source file AArch64/ArmMmuStandaloneMmLib.c and compile it for both 32bit and 64bit architectures. Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> Reviewed-by: Ard Biesheuvel <ardb@kernel.org>
* ArmPkg/IndustryStandard: 32b/64b agnostic FF-A, Mm SVC and Std SMC IDsEtienne Carriere2021-08-113-0/+35
| | | | | | | | | | Defines ARM_SVC_ID_FFA_* and ARM_SVC_ID_SP_* identifiers for 32bit function IDs as per SMCCC specification. Defines also generic ARM SVC identifier macros to wrap 32bit or 64bit identifiers upon target built architecture. Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
* ArmPkg: Move cache defs used in Universal/Smbios into ArmCache.hRebecca Cran2021-06-187-131/+148
| | | | | | | | | | | Many of the cache definitions in ArmLibPrivate.h are being used outside of ArmLib, in Universal/Smbios. Move them into ArmCache.h to make them public, and remove the include of ArmLibPrivate.h from files in Universal/Smbios. Signed-off-by: Rebecca Cran <rebecca@nuviainc.com> Acked-by: Ard Biesheuvel <ardb@kernel.org> Reviewed-by: Leif Lindholm <leif@nuviainc.com>
* ArmPkg: SpellCheck: Update valid acronyms in ExtendedWordsSean Brogan2021-06-161-0/+19
| | | | | | | | | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3445 Spellcheck was not covering all specified files due to CSpell v5 and Node v10 incompatibility of current CI pipeline configuration. This change updates ExtendedWords for ArmPkg with valid acronyms to avoid potential spell errors. Cc: Laszlo Ersek <lersek@redhat.com> Cc: Ard Biesheuvel <ardb+tianocore@kernel.org> Cc: Leif Lindholm <leif@nuviainc.com> Cc: Sami Mujawar <sami.mujawar@arm.com> Signed-off-by: Sean Brogan <sean.brogan@microsoft.com> Signed-off-by: Kun Qin <kuqin12@gmail.com> Reviewed-by: Ard Biesheuvel <ardb@kernel.org>
* ArmPkg/ArmGic: Fix maximum number of interrupts in GICv3edk2-stable202105Andreas Sandberg2021-05-271-2/+9
| | | | | | | | | | | | | | | | | | | Bugzilla: 3415 (https://bugzilla.tianocore.org/show_bug.cgi?id=3415) The GICv3 architecture supports up to 1020 ordinary interrupt lines. The actual number of interrupts supported is described by the ITLinesNumber field in the GICD_TYPER register. The total number of implemented registers is normally calculated as 32*(ITLinesNumber+1). However, maximum value (0x1f) is a special case since that would indicate that 1024 interrupts are implemented. Add handling for this special case in ArmGicGetMaxNumInterrupts. Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com> Signed-off-by: Joey Gouly <joey.gouly@arm.com> Signed-off-by: Sami Mujawar <sami.mujawar@arm.com> Reviewed-by: Ard Biesheuvel <ardb@kernel.org> Reviewed-by: Philippe Mathieu-Daude <philmd@redhat.com>
* ArmPkg: Update SCMI Base Protocol version to 0x20000Nicola Mazzucato2021-05-102-9/+11
| | | | | | | | | | | | | The SCP-firmware has moved to full support for SCMIv2 which means that the base protocol can be either compliant with SCMI v1 or v2. Allow any version between SCMI v1.0 and SCMI v2.0 to be compatible with the current implementation. Signed-off-by: Nicola Mazzucato <nicola.mazzucato@arm.com> Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com> Tested-by: Sami Mujawar <sami.mujawar@arm.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
* ArmPkg: Add ArmPkg.ci.yamlPierre Gondois2021-04-281-0/+221
| | | | | | | | | | | | | Add ArmPkg.ci.yaml to configure the CI for the ArmPkg. Cc: Bret Barkelew <bret.barkelew@microsoft.com> Cc: Sean Brogan <sean.brogan@microsoft.com> Cc: Leif Lindholm <leif@nuviainc.com> Cc: Ard Biesheuvel <ardb+tianocore@kernel.org> Cc: Sami Mujawar <sami.mujawar@arm.com> Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
* ArmPkg: Correct small typosPierre Gondois2021-04-288-13/+13
| | | | | | | | | | | | | The 'cspell' CI test detected some small typos in ArmPkg. Correct them. Cc: Bret Barkelew <bret.barkelew@microsoft.com> Cc: Sean Brogan <sean.brogan@microsoft.com> Cc: Leif Lindholm <leif@nuviainc.com> Cc: Ard Biesheuvel <ardb+tianocore@kernel.org> Cc: Sami Mujawar <sami.mujawar@arm.com> Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
* ArmPkg: Add OemMiscLibNull library to ArmPkg.dscPierre Gondois2021-04-281-0/+1
| | | | | | | | | | | | | | | | | | Add the OemMiscLibNull library to the [Components] section of ArmPkg.dsc, allowing to complete the 'DscCompleteCheck' CI test. According to .pytool/Readme about the 'DscCompleteCheck' test: The test considers it an error if any INF does not appear in the `Components` section of the package-level DSC. Cc: Bret Barkelew <bret.barkelew@microsoft.com> Cc: Sean Brogan <sean.brogan@microsoft.com> Cc: Leif Lindholm <leif@nuviainc.com> Cc: Ard Biesheuvel <ardb+tianocore@kernel.org> Cc: Sami Mujawar <sami.mujawar@arm.com> Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com> Reviewed-by: Bret Barkelew <bret.barkelew@microsoft.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
* ArmPkg: Re-order libraries in ArmPkg.decPierre Gondois2021-04-281-33/+33
| | | | | | | | | | | | | This patch alphabetically orders libraries advertised in ArmPkg.dec. Cc: Bret Barkelew <bret.barkelew@microsoft.com> Cc: Sean Brogan <sean.brogan@microsoft.com> Cc: Leif Lindholm <leif@nuviainc.com> Cc: Ard Biesheuvel <ardb+tianocore@kernel.org> Cc: Sami Mujawar <sami.mujawar@arm.com> Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com> Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com>
* ArmPkg: Document libraries in ArmPkg.decPierre Gondois2021-04-281-0/+47
| | | | | | | | | | | | | This patch documents the libraries advertised in ArmPkg.dec. Cc: Bret Barkelew <bret.barkelew@microsoft.com> Cc: Sean Brogan <sean.brogan@microsoft.com> Cc: Leif Lindholm <leif@nuviainc.com> Cc: Ard Biesheuvel <ardb+tianocore@kernel.org> Cc: Sami Mujawar <sami.mujawar@arm.com> Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com> Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com>
* ArmPkg: Add missing library headers to ArmPkg.decPierre Gondois2021-04-281-3/+9
| | | | | | | | | | | | | | | | | | | | | | | Some library headers are missing/incorrect in ArmPkg.dec. This makes the 'LibraryClassCheck' CI test fail. This patch adds/corrects them. According to .pytool/Readme about the 'LibraryClassCheck' test: This test scans at all library header files found in the `Library` folders in all of the package's declared include directories and ensures that all files have a matching LibraryClass declaration in the DEC file for the package. Fixes: https://bugzilla.tianocore.org/show_bug.cgi?id=3254 Fixes: https://bugzilla.tianocore.org/show_bug.cgi?id=3258 Cc: Bret Barkelew <bret.barkelew@microsoft.com> Cc: Sean Brogan <sean.brogan@microsoft.com> Cc: Leif Lindholm <leif@nuviainc.com> Cc: Ard Biesheuvel <ardb+tianocore@kernel.org> Cc: Sami Mujawar <sami.mujawar@arm.com> Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com> Reviewed-by: Bret Barkelew <bret.barkelew@microsoft.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
* ArmPkg: Fix Ecc error 3002 in StandaloneMmMmuLibPierre Gondois2021-04-281-1/+1
| | | | | | | | | | | | | | This patch fixes the following Ecc reported error: Non-Boolean comparisons should use a compare operator (==, !=, >, < >=, <=) Cc: Bret Barkelew <bret.barkelew@microsoft.com> Cc: Sean Brogan <sean.brogan@microsoft.com> Cc: Leif Lindholm <leif@nuviainc.com> Cc: Ard Biesheuvel <ardb+tianocore@kernel.org> Cc: Sami Mujawar <sami.mujawar@arm.com> Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
* ArmPkg: Fix Ecc error 8003Pierre Gondois2021-04-2833-99/+99
| | | | | | | | | | | | | | | | | | This patch fixes the following Ecc reported error: The #ifndef at the start of an include file should have one postfix underscore, and no prefix underscore character Some include guards have been modified to match the name of the header file. Some comments have also been added on the closing '#endif'. Cc: Bret Barkelew <bret.barkelew@microsoft.com> Cc: Sean Brogan <sean.brogan@microsoft.com> Cc: Leif Lindholm <leif@nuviainc.com> Cc: Ard Biesheuvel <ardb+tianocore@kernel.org> Cc: Sami Mujawar <sami.mujawar@arm.com> Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
* ArmPkg: Fix typo of Manufacturer in comment in SmbiosMiscDxeRebecca Cran2021-04-271-1/+1
| | | | | | | | 'Manufacturer' was spelled wrongly in a comment in MiscChassisManufacturerData.c. Signed-off-by: Rebecca Cran <rebecca@nuviainc.com> Reviewed-by: Leif Lindholm <leif@nuviainc.com>
* ArmPkg: Fix calculation of offset of chassis SKU Number in SmbiosMiscDxeRebecca Cran2021-04-271-5/+7
| | | | | | | | | | | The calculation of the chassis SKU number field was being calculated incorrectly, forgetting that there's one element already present in the structure. Fix the calculation and improve code readability by introducing a SkuNumberField variable. Signed-off-by: Rebecca Cran <rebecca@nuviainc.com> Reviewed-by: Leif Lindholm <leif@nuviainc.com>
* ArmPkg: Allow platforms to report their boot status via OemMiscLib callRebecca Cran2021-04-273-0/+27
| | | | | | | | Add a new function to OemMiscLib to allow platforms to report their boot status into the Type32 SMBIOS table. Signed-off-by: Rebecca Cran <rebecca@nuviainc.com> Reviewed-by: Leif Lindholm <leif@nuviainc.com>
* ArmPkg: Allow platforms to supply more data for SMBIOS Type3 recordRebecca Cran2021-04-273-0/+152
| | | | | | | | | | | | | | | Add OemMiscLib calls to allow platforms to provide the following information about the chassis: o Bootup state o Power supply/supplies state o Thermal state o Security state o Chassis height (in RMU) o Number of power cords Signed-off-by: Rebecca Cran <rebecca@nuviainc.com> Reviewed-by: Leif Lindholm <leif@nuviainc.com>
* ArmPkg: Fix Ecc error 8005 for SCMI_MESSAGE_ID_PERFORMANCEPierre Gondois2021-04-153-15/+15
| | | | | | | | | | | | This patch fixes the following Ecc reported error: Variable name does not follow the rules: 1. First character should be upper case 2. Must contain lower case characters 3. No white space characters 4. Global variable name must start with a 'g' Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
* ArmPkg: Fix Ecc error 8005 for SCMI_CLOCK_RATE_FORMATPierre Gondois2021-04-153-11/+11
| | | | | | | | | | | | This patch fixes the following Ecc reported error: Variable name does not follow the rules: 1. First character should be upper case 2. Must contain lower case characters 3. No white space characters 4. Global variable name must start with a 'g' Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
* ArmPkg: Fix Ecc error 8005 for SCMI_MESSAGE_ID_CLOCKPierre Gondois2021-04-152-10/+10
| | | | | | | | | | | | This patch fixes the following Ecc reported error: Variable name does not follow the rules: 1. First character should be upper case 2. Must contain lower case characters 3. No white space characters 4. Global variable name must start with a 'g' Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-18 14:36:34 +0000