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* ArmPlatformPkg: list module-internal header files in INF [Sources]Laszlo Ersek2019-07-231-0/+1
| | | | | | | | | | | | | | | | | | The BaseTools build feature introduced for TianoCore#1804 / in commit 1fa6699e6cd4 ("BaseTools: Add a checking for Sources section in INF file", 2019-06-10) logs some (non-fatal) warnings about unlisted internal header files. List those files explicitly. Note: header files are added in lexicographical order only if the underlying INF file already keeps the [Sources] and [LibraryClasses] sections in lexicographical order. Otherwise, header files are added in rough "logical" order. Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org> Cc: Leif Lindholm <leif.lindholm@linaro.org> Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Philippe Mathieu-Daude <philmd@redhat.com> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
* ArmPlatformPkg: Fix various typosAntoine Cœur2019-07-041-2/+2
| | | | | | | Fix various typos in ArmPlatformPkg. Signed-off-by: Coeur <coeur@gmx.fr> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
* ArmPlatformPkg: Replace BSD License with BSD+Patent LicenseMichael D Kinney2019-04-0918-126/+18
| | | | | | | | | | | | | | | | | | | | https://bugzilla.tianocore.org/show_bug.cgi?id=1373 Replace BSD 2-Clause License with BSD+Patent License. This change is based on the following emails: https://lists.01.org/pipermail/edk2-devel/2019-February/036260.html https://lists.01.org/pipermail/edk2-devel/2018-October/030385.html RFCs with detailed process for the license change: V3: https://lists.01.org/pipermail/edk2-devel/2019-March/038116.html V2: https://lists.01.org/pipermail/edk2-devel/2019-March/037669.html V1: https://lists.01.org/pipermail/edk2-devel/2019-March/037500.html Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
* ArmPlatformPkg/SP805WatchdogDxe: switch to interrupt modeArd Biesheuvel2018-12-202-27/+79
| | | | | | | | | | | | | | | | | The SP805 watchdog driver doesn't implement the PI watchdog protocol fully, but always simply resets the system if the watchdog time runs out. However, the hardware does support the intended usage model, as long as the SP805 is wired up correctly. So let's implement interrupt based mode involving a handler that is registered by the DXE core and invoked when the watchdog runs out. In the interrupt handler, we invoke the notify function if one was registered, before calling the ResetSystem() runtime service (as per the UEFI spec) Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
* ArmPlatformPkg/SP805WatchdogDxe: cosmetic cleanupArd Biesheuvel2018-12-202-56/+52
| | | | | | | | | Before fixing the SP805 driver, let's clean it up a bit. No functional changes. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
* ArmPlatformPkg/NorFlashDxe: use one GUID plus index to identify flash banksArd Biesheuvel2018-11-262-3/+4
| | | | | | | | | | | | | | | | | | | | | | Currently, each flash bank controlled by ArmPlatformPkg/NorFlashDxe has its own VendorHw GUID, and instances of NorFlashPlatformLib describe each bank to the driver, along with the GUID for each. This works ok for bare metal platforms, but it would be useful for virtual platforms if we could obtain this information from a device tree, which would require us to invent GUIDs on the fly, given that the 'cfi-flash' binding does not include a GUID. So instead, let's switch to a single GUID for all flash banks, and update the driver's device path handling to include an index to identify each bank uniquely. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Tested-by: Thomas Abraham <thomas.abraham@arm.com>
* ArmPlatformPkg/NorFlashDxe: prepare for devicepath format changeArd Biesheuvel2018-11-262-3/+8
| | | | | | | | | | | | | | | A subsequent patch will change the layout of devicepath nodes produced by this driver. In preparation, make some tweaks to the code to use a packed struct for the devicepath and to pass the device index to NorFlashCreateInstance(). These are cosmetic changes only, the resulting binaries should be identical. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Tested-by: Thomas Abraham <thomas.abraham@arm.com>
* ArmPlatformPkg: Tidy Lcd code: Updated commentsGirish Pathak2018-04-231-12/+8
| | | | | | | | | | | | There is no functional modification in this change some comments are modified and a few new comments are added. This is to prevent mixing formatting changes with functional changes. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Girish Pathak <girish.pathak@arm.com> Signed-off-by: Evan Lloyd <evan.lloyd@arm.com> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
* ArmPlatformPkg: Tidy Lcd code: Coding standardGirish Pathak2018-04-232-96/+105
| | | | | | | | | | | | There is no functional modification in this change As preparation for further work, the formatting is corrected to meet the EDKII coding standard. Of specific note, some invalid include guards were fixed. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Girish Pathak <girish.pathak@arm.com> Signed-off-by: Evan Lloyd <evan.lloyd@arm.com> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
* ArmPlatformPkg/NorFlashDxe: depend on gEfiCpuArchProtocolGuidLaszlo Ersek2018-04-121-1/+1
| | | | | | | | | | | | | | | | | | NorFlashFvbInitialize() calls gDS->SetMemorySpaceAttributes() to mark the varstore flash region as uncached. This DXE service depends on the CPU Architectural protocol, and the DXE core is allowed to return EFI_NOT_AVAILABLE_YET if it hasn't dispatched ArmPkg/Drivers/CpuDxe earlier. Make the dependency explicit. Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org> Cc: Leif Lindholm <leif.lindholm@linaro.org> Cc: Steve Capper <steve.capper@linaro.org> Cc: Supreeth Venkatesh <Supreeth.Venkatesh@arm.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Tested-by: Steve Capper <steve.capper@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
* ArmPlatformPkg/NorFlashDxe: cue the variable driver with NvVarStoreFormattedLaszlo Ersek2018-04-122-4/+16
| | | | | | | | | | | | | | | | | | | | | | The BEFORE depex opcode that we currently use to force ourselves in front of the variable driver cannot be combined with other depex opcodes. Replace the depex with TRUE, and signal NvVarStoreFormattedLib through the installation of "gEdkiiNvVarStoreFormattedGuid". Platforms that rely on NorFlashDxe to format the variable store (as opposed to formatting a variable store template through an FDF file, as part of the build) should hook NvVarStoreFormattedLib into the variable drivers they use, so that the latter await our cue. Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org> Cc: Leif Lindholm <leif.lindholm@linaro.org> Cc: Steve Capper <steve.capper@linaro.org> Cc: Supreeth Venkatesh <Supreeth.Venkatesh@arm.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Tested-by: Steve Capper <steve.capper@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
* ArmPlatformPkg/NorFlashDxe: initialize varstore headers eagerlyLaszlo Ersek2018-04-123-27/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The lazy initialization of the varstore FVB makes no longer sense at this point: - "mNorFlashInstanceTemplate.Initialize" is NULL; - in NorFlashCreateInstance(), we only set Instance->Initialize to non-NULL -- namely NorFlashFvbInitialize() -- if the FVB stands for the variable store (see "ContainVariableStorage" / "SupportFvb"); - we call Instance->Initialize() from three places: - from NorFlashWriteSingleBlock(), which is too late for the variable read service ("variable write" depends on "variable read"); - from InitializeFvAndVariableStoreHeaders(), but that is only reachable from NorFlashFvbInitialize(), i.e. recursively from Instance->Initialize() itself; - and from FvbRead(), which is never called by the variable driver, only by the FTW driver. However, the variable driver may read (not write) the memory-mapped varstore flash chip before the FTW driver is dispatched. Therefore the lazy initialization is both superfluous and insufficient. Initialize the varstore headers eagerly, before we install the FVB protocol interface. Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org> Cc: Leif Lindholm <leif.lindholm@linaro.org> Cc: Steve Capper <steve.capper@linaro.org> Cc: Supreeth Venkatesh <Supreeth.Venkatesh@arm.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Tested-by: Steve Capper <steve.capper@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
* ArmPlatformPkg: remove old PL111/HdLcd driver codeArd Biesheuvel2017-12-126-615/+0
| | | | | | | | | Now that LcdGraphicsOutputDxe has been refactored, remove the old code that is no longer used. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
* ArmPlatformPkg: create hw-agnostic LcdGraphicsOutputDxe driverArd Biesheuvel2017-12-122-20/+55
| | | | | | | | | | | | | | | Create a new LcdGraphicsOutputDxe driver from the existing sources that takes its hardware abstractions from a LcdHwLib library instance rather than from a .c file linked directly. All we need is a new .inf file, and a minimal tweak to LcdGraphicsOutputDxe.h to reuse the LcdHwlib prototypes rather than open code them. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Girish Pathak <girish.pathak@arm.com> Signed-off-by: Evan Lloyd <evan.lloyd@arm.com> [ardb: add it to ArmPlatformPkg.dsc so we can build test it standalone] Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
* ArmPlatformPkg: remove unused SP804 driver and TimerLib implementationArd Biesheuvel2017-12-082-454/+0
| | | | | | | | None of the platforms we support use these so remove them. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
* ArmPlatformPkg: remove unused ArmTrustZone driverArd Biesheuvel2017-12-082-146/+0
| | | | | | | | This driver is no longer used anywhere so remove it. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
* ArmPlatformPkg: remove unused PL310 driverArd Biesheuvel2017-12-082-157/+0
| | | | | | | | This driver is not used by any platforms so remove it. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
* ArmPlatformPkg: remove PL34xDmc driverArd Biesheuvel2017-12-082-256/+0
| | | | | | | | Remove PL34xDmc driver which is not used by any platforms Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
* ArmPlatformPkg: remove unused PL35x driverArd Biesheuvel2017-12-083-151/+0
| | | | | | | | No platform uses this so remove it. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
* ArmPlatformPkg: remove unused PL301Axi driverArd Biesheuvel2017-12-082-135/+0
| | | | | | | | No platforms use this driver so remove it. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
* ArmPlatformPkg/LcdGraphicsOutputDxe: move headers into driver directoryArd Biesheuvel2017-12-084-4/+240
| | | | | | | | | | The HdLcd.h and PL111Lcd.h header files are internal headers that should not be used by other drivers. So move them from Include/Drivers into the driver directory instead. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
* ArmPlatformPkg: remove old PL011UartLib implementationArd Biesheuvel2017-12-082-512/+0
| | | | | | | | | Remove the PL011UartLib implementation that has been superseded by the one under Library/ Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
* ArmPlatformPkg/LcdGraphicsOutputDxe: remove VExpressPkg dependencyArd Biesheuvel2017-12-042-2/+0
| | | | | | | | | | | The two instantiations of LcdGraphicsOutputDxe reference VExpressPkg.dec without actually relying on anything it defines. In preparation of moving out VExpressPkg into edk2-platforms, drop these references so we can keep LcdGraphicsOutputDxe in EDK2. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
* ArmPlatformPkg: move internal SP805 header into driver directoryArd Biesheuvel2017-11-302-1/+50
| | | | | | | | | Move the internal SP805 watchdog header file into the driver directory. It shouldn't be referenced directly by other modules anyway. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
* ArmPlatformPkg: move internal PL061 header into driver directoryArd Biesheuvel2017-11-302-1/+51
| | | | | | | | | Move the internal PL061 GPIO header file into the driver directory. It shouldn't be referenced directly by other modules anyway. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
* ArmPlatformPkg: Support different PL011 reg offsetJun Nie2017-07-171-0/+1
| | | | | | | | | ZTE/SanChip version pl011 has different reg offset and bit offset for some registers. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jun Nie <jun.nie@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
* ArmPlatformPkg/NorFlashDxe: correct NumOfLba vararg type in EraseBlocks()Laszlo Ersek2017-05-181-3/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | According to the PI spec, Volume 3, EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL.EraseBlocks(): > The variable argument list is a list of tuples. Each tuple describes a > range of LBAs to erase and consists of the following: > * An EFI_LBA that indicates the starting LBA > * A UINTN that indicates the number of blocks to erase (NB, in edk2, EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL is a typedef to EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL.) In this driver, the NumOfLba local variable is defined with type UINTN, but the TYPE argument passed to VA_ARG() is UINT32. Fix the mismatch. In addition, update the DEBUG macro invocation where NumOfLba is formatted with the %d conversion specifier: UINTN values should be converted to UINT64 and printed with %Lu or %Lx for portability between 32-bit and 64-bit. Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org> Cc: Jordan Justen <jordan.l.justen@intel.com> Cc: Leif Lindholm <leif.lindholm@linaro.org> Reported-by: Jordan Justen <jordan.l.justen@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
* ArmPlatformPkg/PL061Gpio: fix the offset value in Get functionHaojian Zhuang2017-02-161-1/+1
| | | | | | | | | When call PL061GetPins() or PL061SetPins(), should use GPIO_PIN_MASK(offset) as parameter, not offset. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org> Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
* ArmPlatformPkg/PL061: remove duplicated PL061_GPIO_DATA_REGHaojian Zhuang2017-02-161-4/+4
| | | | | | | | | | PL061_GPIO_DATA_REG offset is referenced in PL061EffectiveAddress () already. So remove the duplicated reference when invoke PL061GetPins () or PL061SetPins (). Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org> Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
* ArmPlatformPkg/TZASC: Allow specifying subregions to be disabledBhupesh Sharma2017-01-261-3/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | ARM TZASC-380 IP provides a mechanism to split memory regions being protected via it into eight equal-sized sub-regions. A bit-setting allows the corresponding subregion to be disabled. Several NXP/FSL SoCs support the TZASC-380 IP block and allow the DDR connected via the TZASC to be partitioned into regions having different security settings and also allow subregions to be disabled. This patch enables this support and can be used for SoCs which support such a partition of DDR regions. Details of the 'subregion_disable' register can be viewed here: http://infocenter.arm.com/help/topic/com.arm.doc.ddi0431c/CHDIGDCI.html Cc: Leif Lindholm <leif.lindholm@linaro.org> Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Bhupesh Sharma <bhupesh.sharma@nxp.com> [bhupesh.linux@gmail.com : Added gmail ID as NXP one is no longer valid] Signed-off-by: Bhupesh Sharma <bhupesh.linux@gmail.com> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
* ArmPlatformPkg/NorFlashDxe: Change Flash memory attributes before writesAchin Gupta2017-01-201-22/+23
| | | | | | | | | | | | | | | In NorFlashFvbInitialize() if a valid Firmware Volume header is not found at the start of NOR Flash, the Flash memory is written before it has been remapped with EFI_MEMORY_UC attributes to allow write commands. Since the flash memory was previously mapped with Normal and possibly cacheable memory attributes, the Flash commands might never reach the device. This patch fixes this issue by remapping the Flash memory region with correct memory attributes before writing to it. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Achin Gupta <achin.gupta@arm.com> Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
* ArmPlatformPkg/PL180MciDxe: update for identifying SDHaojian Zhuang2016-11-241-7/+22
| | | | | | | | | | | When CMD6 & ACMD51 are added into identifying SD process, PL180 should also support CMD6 & ACMD51. Otherwise, it will hang when system tries to read expected data. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org> Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Tested-by: Ryan Harkin <ryan.harkin@linaro.org>
* ArmPlatformPkg/NorFlashDxe: eliminate void pointer arithmeticArd Biesheuvel2016-10-241-1/+1
| | | | | | | | | | | | | | | | | | While most compilers happily allow arithmetic on void pointer, the RVCT compiler does not, and throws the following warning for NorFlashDxe: ArmPlatformPkg/Drivers/NorFlashDxe/NorFlashDxe.c(894,48) : error #1254-D: arithmetic on pointer to void or function type Since the expression in question involves a cast from UINTN to VOID*, simply add some parentheses to eliminate this warning. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Ryan Harkin <ryan.harkin@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
* ArmPlatformPkg: Correct mendacious comments.Alexei2016-10-111-3/+2
| | | | | | | | | | | Correct some obviously incorrect comments that have invalid details for the returned values. (Copy /Paste problem?) There are no functional changes in this commit. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Alexei Fedorov <alexei.fedorov@arm.com> Signed-off-by: Evan Lloyd <evan.lloyd@arm.com> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
* ArmPlatformPkg: Fix PL011 FIFO size testEvan Lloyd2016-10-111-5/+6
| | | | | | | | | | | | | This change updates PL011UartInitializePort to compare ReceiveFifoDepth with the correct hardware FIFO size instead of the constant 32 used previously. This corrects a minor bug where a request for a fifo size > 15 and < 32 would not have been honoured on a system with a 16 byte FIFO. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Sami Mujawar <sami.mujawar@arm.com> Signed-off-by: Evan Lloyd <evan.lloyd@arm.com> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
* ArmPlatformPkg/NorFlashDxe: use strictly aligned CopyMem()Ard Biesheuvel2016-09-091-2/+61
| | | | | | | | | | | | | | | | | | | The UEFI spec stipulates that unaligned accesses should be enabled on CPUs that support them, which means all of them, given that we no longer support pre-v7 ARM cores, and the AARCH64 bindings mandate support for unaligned accesses unconditionally. This means that one should not assume that CopyMem () is safe to call on regions that may be mapped using device attributes, which is the case for the NOR flash. Since we have no control over the mappings when running under the OS, and given that write accesses require device mappings, we should not call CopyMem () in the read path either, but use our own implementation that is guaranteed to take alignment into account. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
* ArmPlatformPkg/NorFlashAuthenticatedDxe: remove this obsolete moduleArd Biesheuvel2016-06-221-77/+0
| | | | | | | | | | This module is now identical in functionality to NorFlashDxe, and is no longer used, so remove it altogether. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
* ArmPlatformPkg/NorFlashDxe: accept both non-secure and secure varstore GUIDsArd Biesheuvel2016-06-226-44/+5
| | | | | | | | | | | | | | | | | | | Now that the generic Variable Runtime DXE code no longer distinguishes between gEfiVariableGuid and gEfiAuthenticatedVariableGuid in the varstore FV header, we can relax the check in the NOR flash driver to accept either GUID regardless of whether we are running a secure boot capable build or not. This also means we can always use gEfiAuthenticatedVariableGuid when we encounter an empty NOR flash that needs to be initialized before use. So remove the mNorFlashVariableGuid global from the shared code and from both versions of NorFlashDxe.inf. This essentially collapses the two drivers into a single one, which means we can remove NorFlashAuthenticatedDxe entirely in a subsequent patch. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
* ArmPlatformPkg: Fix PL011 Glitches.Evan Lloyd2016-06-151-0/+22
| | | | | | | | | | | | | | | | | | | | | | This change corrects 3 problems in the PL011 driver. 1. The TRM states "The UARTLCR_H, UARTIBRD, and UARTFBRD registers must not be changed:...when the UART is enabled" 2. The TRM (3.3.8) describes logic requiring the UART to be disabled and flushed before adjusting UARTCR. 3. Several redundant calls get made to PL011UartInitializePort, where the characteristics do not change, but updating the registers can cause glitches in the output stream. The parameters are compared to the current state and no action taken if no change of state is required. Where an update is required, the specified logic is followed, and the register updates only made when the UART is disabled. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Sami Mujawar <sami.mujawar@arm.com> Signed-off-by: Evan Lloyd <evan.lloyd@arm.com> Tested-by: Ryan Harkin <ryan.harkin@linaro.org> Reviewed-by: Ryan Harkin <ryan.harkin@linaro.org>
* ArmPlatformPkg: Add support to configure PL011 UART clockEvan Lloyd2016-06-152-7/+19
| | | | | | | | | | | | | | | | | | | | | | | On some platforms the UART clock is not the same for all the serial ports. The PL011 driver must be capable of handling serial ports with different clock rates, so must not rely on a PCD for the clock rate. This patch allows the UART clock rate to be passed as a parameter to PL011UartInitializePort(), which is called from the serial port library. This patch also contains the corresponding changes in the serial port library. The PCD in Drivers/PL011Uart is replaced by an extra parameter for PL011UartInitializePort. The PCD is moved to Library/PL011SerialPortLib to supply the value to pass. A corresponding patch to ArmVirtPkg is included in the same bundle to align that with these changes. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Sami Mujawar <sami.mujawar@arm.com> Signed-off-by: Evan Lloyd <evan.lloyd@arm.com> Tested-by: Ryan Harkin <ryan.harkin@linaro.org>
* ArmPlatformPkg: Remove double write in PL011Evan Lloyd2016-06-151-4/+3
| | | | | | | | | | | | The variable LineControl was initialised to zero, then updated in a condition. This change converts that to a write in each branch of the condition, removing the Write/Read/Modify/Write sequence. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Sami Mujawar <sami.mujawar@arm.com> Signed-off-by: Evan Lloyd <evan.lloyd@arm.com> Tested-by: Ryan Harkin <ryan.harkin@linaro.org> Reviewed-by: Ryan Harkin <ryan.harkin@linaro.org>
* ArmPlatformPkg: Update PL011 Serial PCDs to Fixed PCDsEvan Lloyd2016-06-152-7/+7
| | | | | | | | | | | | The PCDs used in the PL011 UART Driver and Serial Port Library are inherently "fixed at build". This change updates the source to use Fixed PCDs for these values. This improves clarity and efficiency. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Sami Mujawar <sami.mujawar@arm.com> Signed-off-by: Evan Lloyd <evan.lloyd@arm.com> Tested-by: Ryan Harkin <ryan.harkin@linaro.org> Reviewed-by: Ryan Harkin <ryan.harkin@linaro.org>
* ArmPlatformPkg: Tidy PL011 UART driverEvan Lloyd2016-06-151-34/+67
| | | | | | | | | | | | | | | | | This cosmetic change only tidies things up in preparation for actual updates. (This reflects responses to a previously submitted patch, which has been split into several discrete changes.) There are no functional changes in this commit. Changes comprise: Minor corrections to comment typos. Minor formatting mods. Expansion of function comments. Remove OUT from UartBase parameter. Addition of #define for "magic mumbers". Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Evan Lloyd <evan.lloyd@arm.com> Reviewed-by: Ryan Harkin <ryan.harkin@linaro.org>
* ArmPlatformPkg: PL061: support multiple controllerHaojian Zhuang2016-03-142-35/+107
| | | | | | | | | | | | Support multiple PL061 controllers. If platform gpio driver couldn't be found, PL061 gpio driver will continue to load PcdPL061GpioBase as the register base. It could be compatible with the use case of current PL061 gpio driver. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
* ArmPlatformPkg/PL180MciDxe: don't check ID_REG3Ryan Harkin2016-03-011-1/+0
| | | | | | | | | | | | | | | | | | TC2 reads 0x02 for the PL180 ID3 register instead of 0x00 as defined in the spec. However, the spec [1] states that the contents of ID3 register represent the "configuration option of the peripheral" and thus not part of the Prime Cell identification. For this patch, we drop checking the value in MCI_PERIPH_ID_REG3. [1] http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0172a/index.html Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ryan Harkin <ryan.harkin@linaro.org> Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
* ArmPlatformPkg/PL180MciDxe: warn on probe failRyan Harkin2016-03-011-0/+2
| | | | | | | | | If the PL180 fails to probe, issue a warning on debug builds. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ryan Harkin <ryan.harkin@linaro.org> Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
* ArmPlatformPkg/PL180MciDxe: fix Depex for TC2Ryan Harkin2016-03-011-1/+1
| | | | | | | | | | | | | | | | | | | | | | PL180 on TC2 has a dependency on gEfiCpuArchProtocolGuid. Without adding the dependency, TC2 will crash in the PL180 driver. This problem has been present since d340ef7 when TC2 stopped booting. However, it was masked by 300fc77 which prevented PL180 from running on TC2 due to TC2 using a version on PL180 newer than that documented publicly. [1] https://github.com/tianocore/edk2/commit/d340ef7 2014-08-26 ArmPkg/ArmArchTimerLib: Remove non required [depex] and IoLib [2] https://github.com/tianocore/edk2/commit/300fc77 2015-08-25 ArmPlatformPkg/PL180MciDxe: check PrimeCell ID before initializing Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ryan Harkin <ryan.harkin@linaro.org> Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
* ArmPlatformPkg: PL061 - rewrite the hardware interactionLeif Lindholm2016-02-261-11/+61
| | | | | | | | | | | | | | The PL061 GPIO controller is a bit of an anachronism, and the existing driver does nothing to hide this - leading to it being very tricky to read. Rewrite it to document (in comments and code) what is actually happening, and fix some bugs in the process. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Leif Lindholm <leif.lindholm@linaro.org> Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Ryan Harkin <ryan.harkin@linaro.org>
* ArmPlatformPkg: PL061 - drop pointless initialize functionLeif Lindholm2016-02-261-26/+1
| | | | | | | | | | PL061Initialize() did not actually do anything other than call PL061Identify() - so cut out the middle man. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Leif Lindholm <leif.lindholm@linaro.org> Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Ryan Harkin <ryan.harkin@linaro.org>
* ArmPlatformPkg: PL061 - only initialize on protocol loadLeif Lindholm2016-02-261-33/+7
| | | | | | | | | | | For whatever reason, every single operation on the PL061 looked for an "Initialized" flag, and manually called the initialization function if not set. Move this to a single call on protocol installation. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Leif Lindholm <leif.lindholm@linaro.org> Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Ryan Harkin <ryan.harkin@linaro.org>
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