summaryrefslogtreecommitdiffstats
path: root/ArmPlatformPkg
Commit message (Collapse)AuthorAgeFilesLines
* ArmPlatformPkg: remove EblCmdLib implementationArd Biesheuvel2017-11-265-1191/+0
| | | | | | | | EBL is being phased out so remove ArmPlatformPkg's copy of EblCmdLib. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
* ArmPlatformPkg: remove unused L2X0CacheLibNull libraryArd Biesheuvel2017-11-262-57/+0
| | | | | | | | This library is not used anywhere so remove it. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
* ArmPlatformPkg: remove ArmJunoPkgArd Biesheuvel2017-11-2613-1636/+0
| | | | | | | | | Remove ArmJunoPkg now that it has been moved into edk2-platforms where it belongs. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
* ArmPlatformPkg: remove ArmTrustedMonitorLib definition and implementationArd Biesheuvel2017-11-266-207/+0
| | | | | | | | Remove ArmTrustedMonitorLib and its only [NULL] implementation. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
* ArmPlatformPkg: remove unused DebugSecExtraActionLib libraryArd Biesheuvel2017-11-262-175/+0
| | | | | | | | | This implementation of ArmPlatformSecExtraActionLib is no longer used anywhere so remove it. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
* ArmPlatformPkg: remove ArmPlatformSecLib definition and implementationsArd Biesheuvel2017-11-2619-1347/+0
| | | | | | | | | This library class is not used by any drivers, so remove it in its entirety. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
* ArmPlatformPkg: remove ArmGetCpuCountPerCluster () from ArmPlatformLibArd Biesheuvel2017-11-252-13/+13
| | | | | | | | | | | | The only user of ArmPlatformLib's ArmGetCpuCountPerCluster () is itself an ArmPlatformLib implementation, i.e., ArmVExpressLibRTSM. Given that we'd prefer to get rid of ArmPlatformLib entirely, let's remove ArmGetCpuCountPerCluster () from the API as a first step. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
* ArmPlatformPkg/ArmPlatformLibNull: remove bogus PCD dependenciesArd Biesheuvel2017-11-171-3/+0
| | | | | | | | | | Remove dependencies on gArmTokenSpaceGuid.PcdSystemMemoryBase and gArmTokenSpaceGuid.PcdSystemMemorySize, the presence of which in a [FixedPcd] section makes this module unusable for ArmVirtQemu. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
* ArmPlatformPkg: reorganize PL011 codeArd Biesheuvel2017-11-176-2/+830
| | | | | | | | | | | | | | | | The PL011 code in ArmPlatformPkg is organized in a weird way: there is a single PL011Uart.h header file under Include/Drivers containing both register definitions and function entry points. The PL011Uart library itself is in Drivers/ but it is actually a library. So let's clean this up: add a new PL011UartLib library class and associated header file containing only the library prototypes, and move the library itself under Library/ using a new GUID, with the register definitions moved into a local header file. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
* ArmPlatformPkg/PL031RealTimeClockLib: drop ArmPlatformSysConfigLib referenceArd Biesheuvel2017-11-162-38/+6
| | | | | | | | | | | | The PL031 driver implements a VExpress/Juno specific hack to set the battery backed clock in addition to the PL031. However, none of the remaining VExpress based hardware we support in EDK2 actuall implements this feature so we can just remove it, and get rid of the cumbersome dependency on ArmPlatform.h. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
* ArmPlatformPkg/PL031RealTimeClockLib: ignore DST setting when timezone is setArd Biesheuvel2017-11-131-8/+4
| | | | | | | | | | | | | | | | | According to the UEFI spec, the timezone setting which the platform needs to record in addition to the actual date and time already reflects the current DST setting. In other words, moving the clock from standard time to daylight saving time also involves adding or subtracting 60 minutes from the timezone setting, as well as flicking the EFI_TIME_IN_DAYLIGHT bit in the DST setting. This means we need to disregard the DST setting if the timezone is specified, and only add or subtract the additional hour if we are on local time. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
* ArmPlatformPkg/PL031RealTimeClockLib: remove validation and DST handlingArd Biesheuvel2017-11-131-171/+15
| | | | | | | | | | | | | This library, which is intended to encapsulate the hardware specifics of the ARM PL031 RTC, also implements its own input validation routines and record the timezone and DST settings in its own set of EFI variables. This functionality has recently been added to the core driver, so let's remove it here. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
* ArmPlatformPkg/PrePeiCore: seed temporary stack before entering PEI coreArd Biesheuvel2017-11-095-0/+26
| | | | | | | | | | | | | | | | | | | | | | DEBUG builds of PEI code will print a diagnostic message regarding the utilization of temporary RAM before switching to permanent RAM. For example, Total temporary memory: 16352 bytes. temporary memory stack ever used: 4820 bytes. temporary memory heap used for HobList: 4720 bytes. Tracking stack utilization like this requires the stack to be seeded with a known magic value, and this needs to occur before entering C code, given that it uses the stack. Currently, only Nt32Pkg appears to implement this feature, but it is useful nonetheless, so let's wire it up for PrePeiCore. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Liming Gao <liming.gao@intel.com> Acked-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
* ArmPlatformPkg/PlatformPeim: allow PlatformPeiLib to set the boot modeArd Biesheuvel2017-11-052-5/+8
| | | | | | | | | | | | | | | | | | | | | | | The current interdepencies between the PrePeiCore SEC module, the platform PEIM and ArmPlatformLib is a bit awkward: due to the fact that ArmPlatformLib is also used by SEC modules, we cannot use PEI specific facilities in the implementation of ArmPlatformGetBootMode. However, given that we call that library function /after/ invoking PlatformPeiLib, there is no way for that library to set the boot mode other than resorting to tricks like notification callbacks on arbitrary unrelated events. ArmPlatformLib should probably be phased out anyway, given its quirky nature, but for now, let's fix this particular issue by deferring the call to PlatformPeim() to after the point where we set the boot mode by calling ArmPlatformGetBootMode (). While we're at it, clean up the code slightly by using PeiServicesLib instead of doing double pointer dereferencing. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
* ArmPlatformPkg: Store initial timer valueAlexei Fedorov2017-10-103-3/+13
| | | | | | | | | | | | | This commit adds support for storing initial timer value logged at the beginning of firmware image execution. This timer value is required for firmware basic boot performance data record referenced by Firmware Performance Data Table (FPDT). Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Alexei Fedorov <Alxei.Fedorov@arm.com> Signed-off-by: Evan Lloyd <evan.lloyd@arm.com> Reviewed-by: Graeme Gregory <graeme.gregory@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
* ArmPlatformPkg: Add PCD for SBSA Watchdog CountSami Mujawar2017-10-062-3/+4
| | | | | | | | | | | | | | The Juno and FVP platform implement the SBSA Watchdog timers. Added PcdWatchdogCount to specify the number of Watchdog timers that are available. This allows configurability and an option to disable the watchdog timers if required for testing. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Sami Mujawar <sami.mujawar@arm.com> Signed-off-by: Evan Lloyd <evan.lloyd@arm.com> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
* ArmPlatformPkg/ArmJunoDxe: remove bogus DmaLib dependencyArd Biesheuvel2017-08-301-1/+0
| | | | | | | | | This driver does not rely on DmaLib at all, so don't declare it as a dependency. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
* edk2: Move License.txt file to rootMichael D Kinney2017-08-031-25/+0
| | | | | | | | | | | | | | | | | | | https://bugzilla.tianocore.org/show_bug.cgi?id=642 Add top level License.txt file with the BSD 2-Clause License that is used by the majority of the EKD II open source project content. Merge copyright statements from the BSD 2-Clause License files in each package directory and remove the duplication License.txt file from package directories. Cc: Leif Lindholm <leif.lindholm@linaro.org> Cc: Andrew Fish <afish@apple.com> Cc: Jordan Justen <jordan.l.justen@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com> Reviewed-by: Jordan Justen <jordan.l.justen@intel.com> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
* edk2: Move TianoCore Contribution Agreement to rootMichael D Kinney2017-08-031-218/+0
| | | | | | | | | | | | | | | | | https://bugzilla.tianocore.org/show_bug.cgi?id=629 Move Contributions.txt that contains the TianoCore Contribution Agreement 1.0 to the root of the edk2 repository and remove the duplicate Contributions.txt files from all packages. Cc: Leif Lindholm <leif.lindholm@linaro.org> Cc: Andrew Fish <afish@apple.com> Cc: Jordan Justen <jordan.l.justen@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com> Reviewed-by: Jordan Justen <jordan.l.justen@intel.com> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
* ArmPlatformPkg: Support different PL011 reg offsetJun Nie2017-07-173-0/+33
| | | | | | | | | ZTE/SanChip version pl011 has different reg offset and bit offset for some registers. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jun Nie <jun.nie@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
* ArmPlatformPkg: convert VExpress ResetSystemLib to ResetSystemLibLeif Lindholm2017-07-052-50/+73
| | | | | | | | | | | Since we're in the process of migrating all of the VExpress platforms to MdeModulePkg ResetSystemRuntimeDxe, convert VExpress ResetSystemLib from EfiResetSystemLib interface to the ResetSystemLib one. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Leif Lindholm <leif.lindholm@linaro.org> Tested-by: Ryan Harkin <ryan.harkin@linaro.org> Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
* ArmPlatformPkg: eliminate Juno gcc build warningLeif Lindholm2017-06-201-0/+1
| | | | | | | | | | | | When building without LTO, gcc incorrectly resolves the hazards for 'PciRegBase’ when inlining, leading to "may be used uninitialized" warnings (and hence build failure with -Werror). Eliminate this warning by explicitly initializing the variable to 0. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Leif Lindholm <leif.lindholm@linaro.org> Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Ryan Harkin <ryan.harkin@linaro.org>
* ArmPlatformPkg: Timer access for non-secure EL1/0Sami Mujawar2017-05-222-2/+16
| | | | | | | | | | | | | | | According to Section 2.3.6 of the "UEFI Specification 2.6 Errata A"; the primary CPU must be configured such that 'Timer access must be provided to non-secure EL1 and EL0 by setting bits EL1PCTEN and EL1PCEN in register CNTHCTL_EL2.' This commit adds this missing set-up to the PrePi and PrePeiCore modules. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Sami Mujawar <sami.mujawar@arm.com> Signed-off-by: Evan Lloyd <evan.lloyd@arm.com> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
* ArmPlatformPkg/NorFlashDxe: correct NumOfLba vararg type in EraseBlocks()Laszlo Ersek2017-05-181-3/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | According to the PI spec, Volume 3, EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL.EraseBlocks(): > The variable argument list is a list of tuples. Each tuple describes a > range of LBAs to erase and consists of the following: > * An EFI_LBA that indicates the starting LBA > * A UINTN that indicates the number of blocks to erase (NB, in edk2, EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL is a typedef to EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL.) In this driver, the NumOfLba local variable is defined with type UINTN, but the TYPE argument passed to VA_ARG() is UINT32. Fix the mismatch. In addition, update the DEBUG macro invocation where NumOfLba is formatted with the %d conversion specifier: UINTN values should be converted to UINT64 and printed with %Lu or %Lx for portability between 32-bit and 64-bit. Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org> Cc: Jordan Justen <jordan.l.justen@intel.com> Cc: Leif Lindholm <leif.lindholm@linaro.org> Reported-by: Jordan Justen <jordan.l.justen@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
* ArmPlatformPkg,ArmVirtPkg: delete redundant PL031 functionsLeif Lindholm2017-05-103-135/+4
| | | | | | | | | | Remove the functions now provided by TimeBaseLib from PL031RealTimeClockLib. Add TimeBaseLib resolution to ArmVirtPkg in same commit to prevent breakage. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Leif Lindholm <leif.lindholm@linaro.org> Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
* ArmPlatformPkg/ArmVExpressDxe: remove FDT handling from ArmFvpDxeArd Biesheuvel2017-04-116-443/+5
| | | | | | | | | | | | | | | | | | | | | Replace the elaborate but awkward handling of FDT images using device paths and string PCDs initialized to 128 spaces with a simple scheme involving a set of builtin DTBs and a bit of runtime logic to select between them. This is sufficient for ordinary use, which makes it more suitable as reference code. Note that overriding the DTB presented to the OS can easily be done with a UEFI application that simply installs a new DTB image under the existing FDT configuration table GUID. For this module, this simply involves removing all code that is involved in deciding which platform we are running on, and for reasoning about FDT device paths. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org> Tested-by: Ryan Harkin <ryan.harkin@linaro.org>
* ArmPlatformPkg/ArmVExpressDxe: remove unused cruft from ArmHwDxeArd Biesheuvel2017-04-112-45/+1
| | | | | | | | | | Remove unused cruft from ArmHwDxe -- the only thing that remains is installation of the 'runaxf' shell command. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org> Tested-by: Ryan Harkin <ryan.harkin@linaro.org>
* ArmPlatformPkg/ArmVExpressDxe: remove ARM supportArd Biesheuvel2017-04-113-103/+0
| | | | | | | | | | The 32-bit ARM support in this driver is unused, and thus untested. So let's just remove it. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org> Tested-by: Ryan Harkin <ryan.harkin@linaro.org>
* ArmPlatformPkg/EblCmdLib: remove dependency on deprecated ARM BdsLibArd Biesheuvel2017-04-112-2/+48
| | | | | | | | | | The EBL alternative shell depends indirectly on the deprecated ARM BdsLib via EblCmdLib, which only uses a single helper function that can easily be cloned. So clone it, and remove the dependency. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
* ArmPlatformPkg/PL111LcdArmVExpressLib: use write-combine mapping for VRAMArd Biesheuvel2017-04-062-9/+6
| | | | | | | | | | | | | | | | | Replace the uncached memory mapping of the framebuffer with a write- combining one. This improves performance, and avoids issues with unaligned accesses and DC ZVA instructions performed by the accelerated memcpy/memset routines. Instead of manipulating the memory attributes directly, use the SetMemorySpaceAttributes() DXE services, which validates the attributes against the capabilities of the region before making the actual change. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Jeremy Linton <jeremy.linton@arm.com> Tested-by: Ryan Harkin <ryan.harkin@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
* ArmPlatformPkg/HdLcdArmVExpressLib: use write-combine mapping for VRAMArd Biesheuvel2017-04-062-9/+6
| | | | | | | | | | | | | | | | | Replace the uncached memory mapping of the framebuffer with a write- combining one. This improves performance, and avoids issues with unaligned accesses and DC ZVA instructions performed by the accelerated memcpy/memset routines. Instead of manipulating the memory attributes directly, use the SetMemorySpaceAttributes() DXE services, which validates the attributes against the capabilities of the region before making the actual change. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Jeremy Linton <jeremy.linton@arm.com> Tested-by: Ryan Harkin <ryan.harkin@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
* ArmPlatformPkg/PL111LcdArmVExpressLib: fix incorrect FreePool () callArd Biesheuvel2017-04-061-1/+1
| | | | | | | | | | | | | | When we fail to modify the memory attributes for the VRAM allocation, the allocation - which was made using AllocatePages() - is freed using FreePool(). This is incorrect by itself, but it masks a second bug, i.e., that the address of the allocation is not in VramBaseAddress but in *VramBaseAddress. So fix both issues. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Jeremy Linton <jeremy.linton@arm.com> Tested-by: Ryan Harkin <ryan.harkin@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
* ArmPlatformPkg/HdLcdArmVExpressLib: fix incorrect FreePool () callArd Biesheuvel2017-04-061-1/+1
| | | | | | | | | | | | | | When we fail to modify the memory attributes for the VRAM allocation, the allocation - which was made using AllocatePages() - is freed using FreePool(). This is incorrect by itself, but it masks a second bug, i.e., that the address of the allocation is not in VramBaseAddress but in *VramBaseAddress. So fix both issues. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Jeremy Linton <jeremy.linton@arm.com> Tested-by: Ryan Harkin <ryan.harkin@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
* ArmPlatformPkg/FVP: map motherboard VRAM as uncached memoryArd Biesheuvel2017-04-062-7/+18
| | | | | | | | | | | | | | | | | | The VRAM of the PL111 on the FVP Base/Foundation models is described as device memory rather than uncached memory, which is not an accurate description of the nature of the region (i.e., a framebuffer), and may result in problems when using accelerated string routines to access the region, since this may legally involve unaligned accesses or DC ZVA instructions, which are not allowed on device mappings. So split of the 8 MB VRAM region into a separate region, and map it using memory attributes. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Jeremy Linton <jeremy.linton@arm.com> Tested-by: Ryan Harkin <ryan.harkin@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
* ArmPlatformPkg/ArmJunoDxe: simplify ACPI table installationArd Biesheuvel2017-04-051-36/+1
| | | | | | | | | | | Having a three way conditional with callbacks would make sense if the callbacks weren't (a) identical and (b) didn't return TRUE all the time. So get rid of the kludge. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Tested-by: Ryan Harkin <ryan.harkin@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
* ArmPlatformPkg/ArmJunoPkg: remove PCI host bridge driverArd Biesheuvel2017-04-057-2270/+0
| | | | | | | | | | | | | | | | We are switching the Juno platform to the generic host bridge driver, which involves implementing PciHostBridgeLib for this platform, and plugging it into MdeModulePkg's PciHostBridgeDxe.inf. Since the platform descriptions no longer live in upstream EDK2, the PciHostBridgeLib implementation (which reuses some of the code removed here) will live there as well. But this PciHostBridgeDxe driver is no longer used, so remove it. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Tested-by: Ryan Harkin <ryan.harkin@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
* ArmPlatformPkg/ArmJunoDxe: don't register OnEndOfDxe event on rev R0Ard Biesheuvel2017-04-051-24/+19
| | | | | | | | | | | | | The ArmJunoDxe driver code registers a callback for the EndOfDxe event, at which time it does some manipulation of the PCI peripherals on the board. Given that R0 has no working PCIe, instead of conditionally performing these operations, omit the registration of the callback altogether on that platform. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Tested-by: Ryan Harkin <ryan.harkin@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
* ArmPlatformPkg/ArmJunoDxe: use the generic non-discoverable device supportArd Biesheuvel2017-04-056-1190/+27
| | | | | | | | | | | Replace the open coded reimplementation of 'PCI emulation' with a pair of calls into NonDiscoverableDeviceRegistrationLib to register the OHCI and EHCI controllers. These will be picked up by the generic driver instead. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Tested-by: Ryan Harkin <ryan.harkin@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
* ArmPlatformPkg/ArmJunoDxe: remove BdsLib dependencyArd Biesheuvel2017-04-051-1/+0
| | | | | | | | | | The ArmJunoDxe driver does not actually depend on the deprecated BdsLib so remove the dependency declaration from the INF file. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Tested-by: Ryan Harkin <ryan.harkin@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
* ArmPlatformPkg/ArmShellCmdRunAxf: remove BdsLib dependencyArd Biesheuvel2017-04-052-2/+57
| | | | | | | | | | | Remove ArmShellCmdRunAxf's dependency on the deprecated BdsLib by cloning the ShutdownUefiBootServices() routine into a local source file; this is the only BdsLib feature 'runaxf' depends on. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Tested-by: Ryan Harkin <ryan.harkin@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
* ArmPlatformPkg/PlatformIntelBdsLib: don't clobber ConSplitter handleArd Biesheuvel2017-03-031-10/+15
| | | | | | | | | | | | | | | | The InitializeConsolePipe() routine takes care to only set its output argument *Interface if it is not already set, to prevent overwriting the ConSplitter interface pointer that may have already been assigned. However, the associated OUT argument 'Handle' is clobbered by the subsequent unnecessary LocateDevicePath() invocation, which should similarly be made dependent on whether *Interface has been set already. Reported-by: "Lee, Terry Ping-Chung" <terry.lee@hpe.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
* ArmPlatformPkg/ArmPlatformStackLib: use callee preserved registersArd Biesheuvel2017-02-221-24/+19
| | | | | | | | | | | | | | | | | | The entry code in ArmPlatformStackSet () is a 1:1 transliteration of the ARM version, which uses the callee preserved registers r3 - r7 (*) to preserve the function arguments and the link register across a call to ArmPlatformIsPrimaryCore (). However, x3 - x7 are not callee preserved on AARCH64, and so we should use registers >= x19 instead. While we're at it, drop an unnecessary preserve of the link register, and simplify/deobfuscate the calculation of the secondary stack position. (*) Note that r3 is not actually a callee saved register even on ARM. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
* ArmPlatformPkg/PL061Gpio: fix the offset value in Get functionHaojian Zhuang2017-02-161-1/+1
| | | | | | | | | When call PL061GetPins() or PL061SetPins(), should use GPIO_PIN_MASK(offset) as parameter, not offset. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org> Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
* ArmPlatformPkg/PL061: remove duplicated PL061_GPIO_DATA_REGHaojian Zhuang2017-02-161-4/+4
| | | | | | | | | | PL061_GPIO_DATA_REG offset is referenced in PL061EffectiveAddress () already. So remove the duplicated reference when invoke PL061GetPins () or PL061SetPins (). Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org> Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
* ArmPlatformPkg/TZASC: Allow specifying subregions to be disabledBhupesh Sharma2017-01-263-11/+35
| | | | | | | | | | | | | | | | | | | | | | | | | | ARM TZASC-380 IP provides a mechanism to split memory regions being protected via it into eight equal-sized sub-regions. A bit-setting allows the corresponding subregion to be disabled. Several NXP/FSL SoCs support the TZASC-380 IP block and allow the DDR connected via the TZASC to be partitioned into regions having different security settings and also allow subregions to be disabled. This patch enables this support and can be used for SoCs which support such a partition of DDR regions. Details of the 'subregion_disable' register can be viewed here: http://infocenter.arm.com/help/topic/com.arm.doc.ddi0431c/CHDIGDCI.html Cc: Leif Lindholm <leif.lindholm@linaro.org> Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Bhupesh Sharma <bhupesh.sharma@nxp.com> [bhupesh.linux@gmail.com : Added gmail ID as NXP one is no longer valid] Signed-off-by: Bhupesh Sharma <bhupesh.linux@gmail.com> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
* ArmPlatformPkg/ArmJunoPkg/Drivers/ArmJunoDxe: Fixed crash on Juno R0Daniil Egranov2017-01-251-2/+9
| | | | | | | | | | The Marvell Yukon MAC address load supported only on Juno R1 and R2. It disabled for Juno R0 due to PCI issues on this board. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Daniil Egranov <daniil.egranov@arm.com> Tested-by: Ryan Harkin <ryan.harkin@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
* ArmPlatformPkg/NorFlashDxe: Change Flash memory attributes before writesAchin Gupta2017-01-201-22/+23
| | | | | | | | | | | | | | | In NorFlashFvbInitialize() if a valid Firmware Volume header is not found at the start of NOR Flash, the Flash memory is written before it has been remapped with EFI_MEMORY_UC attributes to allow write commands. Since the flash memory was previously mapped with Normal and possibly cacheable memory attributes, the Flash commands might never reach the device. This patch fixes this issue by remapping the Flash memory region with correct memory attributes before writing to it. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Achin Gupta <achin.gupta@arm.com> Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
* ArmPlatformPkg: Use EfiEventGroupSignal from UefiLibStar Zeng2017-01-203-36/+6
| | | | | | | | | | | | | | | Use EfiEventGroupSignal from UefiLib and remove EmptyCallbackFunction. REF: https://bugzilla.tianocore.org/show_bug.cgi?id=298 Cc: Leif Lindholm <leif.lindholm@linaro.org> Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org> Cc: Liming Gao <liming.gao@intel.com> Cc: Michael Kinney <michael.d.kinney@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Star Zeng <star.zeng@intel.com> Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
* ArmPlatformPkg/ArmJunoDxe: Set Marvell Yukon MAC addressDaniil Egranov2017-01-102-0/+302
| | | | | | | | | The patch reads a valid MAC address from the Juno IOFPGA registers and pushes it into onboard Marvell Yukon NIC. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Daniil Egranov <daniil.egranov@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
* ArmPlatformPkg: Fix VE RTSM mem map descriptor countSami Mujawar2016-11-251-2/+3
| | | | | | | | | | | | | | | The number of memory map entries used exceeded the allocated count, thereby causing memory corruption. Fixed the number of Virtual Memory Map Descriptors allocated in describing the RTSM Memory Map. Also added an assert to confirm that the descriptor count has not been exceeded, in the hope that it may help highlight the problem should a new entry be added. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Sami Mujawar <sami.mujawar@arm.com> Signed-off-by: Evan Lloyd <evan.lloyd@arm.com> Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
generated by cgit v1.2.3 (git 2.25.1) at 2024-08-07 23:49:54 +0000