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* BaseTools/tools_def.template: remove comment about GCC44 + LzmaF86CompressLaszlo Ersek2019-01-081-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | "tools_def.template" currently suggests, in the documentation of the LzmaF86Compress utility, that said tool is generally unhelpful on binaries built with the GCC44 toolchain, relative to LzmaCompress. This statement doesn't apply to the GCC48 toolchain. I compressed 126 NOOPT_GCC48/IA32 unique EFI modules (built with gcc-4.8.5, as part of OVMF) with both LzmaCompress and LzmaF86Compress. I repeated the same for 117 NOOPT_GCC48/X64 unique EFI modules. On average, the LzmaF86Compress output size was 92.4% of the LzmaCompress output size in the IA32 case (best relative compression: 86.01%, poorest relative compression: 97.47% -- still a win). In the X64 case, the LzmaF86Compress output size was 92.95% of the LzmaCompress output size, on avarege (best relative compression: 87.69%, poorest relative compression: 97.65% -- again, still a win). Given the consistent improvement from LzmaCompress to LzmaF86Compress, remove the statement (rather than updating it to GCC48). Cc: Bob Feng <bob.c.feng@intel.com> Cc: Liming Gao <liming.gao@intel.com> Cc: Yonghong Zhu <yonghong.zhu@intel.com> Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=1377 Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Jordan Justen <jordan.l.justen@intel.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
* BaseTools/tools_def.template: rename GCC44_IA32_X64_DLINK_COMMON to ↵Laszlo Ersek2019-01-081-4/+3
| | | | | | | | | | | | | | | | | | | | | | GCC48_IA32_X64_DLINK_COMMON GCC44_IA32_X64_DLINK_COMMON is only referenced by: - GCC48_IA32_X64_ASLDLINK_FLAGS, - GCC48_IA32_X64_DLINK_FLAGS. Thus, we can rename ("raise") it to GCC48_IA32_X64_DLINK_COMMON. (It's easier to review this patch with "git show --word-diff".) Cc: Bob Feng <bob.c.feng@intel.com> Cc: Liming Gao <liming.gao@intel.com> Cc: Yonghong Zhu <yonghong.zhu@intel.com> Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=1377 Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Jordan Justen <jordan.l.justen@intel.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
* BaseTools/tools_def.template: eliminate GCC44_IA32_X64_DLINK_FLAGSLaszlo Ersek2019-01-081-3/+2
| | | | | | | | | | | | | | | | | | | | | | | GCC48_IA32_X64_DLINK_FLAGS is defined *wholly* as GCC44_IA32_X64_DLINK_FLAGS, therefore: - expand the contents of GCC44_IA32_X64_DLINK_FLAGS into GCC48_IA32_X64_DLINK_FLAGS, - re-point all references of GCC44_IA32_X64_DLINK_FLAGS to GCC48_IA32_X64_DLINK_FLAGS, - remove GCC44_IA32_X64_DLINK_FLAGS. Cc: Bob Feng <bob.c.feng@intel.com> Cc: Liming Gao <liming.gao@intel.com> Cc: Yonghong Zhu <yonghong.zhu@intel.com> Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=1377 Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Jordan Justen <jordan.l.justen@intel.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
* BaseTools/tools_def.template: rename GCC44_ALL_CC_FLAGS to GCC48_ALL_CC_FLAGSLaszlo Ersek2019-01-081-5/+5
| | | | | | | | | | | | | | | | | | | | | | GCC44_ALL_CC_FLAGS is only referenced by: - GCC48_IA32_CC_FLAGS, - GCC48_X64_CC_FLAGS, - GCC49_AARCH64_CC_FLAGS, - CLANG38_ALL_CC_FLAGS. Thus, we can rename ("raise") it to GCC48_ALL_CC_FLAGS. (It's easier to review this patch with "git show --word-diff".) Cc: Bob Feng <bob.c.feng@intel.com> Cc: Liming Gao <liming.gao@intel.com> Cc: Yonghong Zhu <yonghong.zhu@intel.com> Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=1377 Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Jordan Justen <jordan.l.justen@intel.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
* BaseTools/tools_def.template: propagate loss of GCC44 referencesLaszlo Ersek2019-01-081-18/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The last patch decremented references on a number of DEFs. They can be classified into three groups: (a) those that remain used by multiple toolchains, or by multiple definitions of a given toolchain (refcount >= 2): - GCC_ASLCC_FLAGS - GCC_ASLPP_FLAGS - GCC_HOST_PREFIX - GCC_IA32_RC_FLAGS - GCC_PP_FLAGS - GCC_VFRPP_FLAGS - GCC_X64_RC_FLAGS - IASL_FLAGS - IASL_OUTFLAGS - UNIX_IASL_BIN - GCC44_IA32_X64_DLINK_FLAGS (!) (b) those that are only used by GCC48 (refcount == 1): - GCC44_ASM_FLAGS - GCC44_IA32_CC_FLAGS - GCC44_IA32_DLINK2_FLAGS - GCC44_IA32_X64_ASLDLINK_FLAGS - GCC44_X64_CC_FLAGS - GCC44_X64_DLINK2_FLAGS - GCC44_X64_DLINK_FLAGS (c) those that are no longer used (refcount == 0): - GCC44_IA32_PREFIX - GCC44_X64_PREFIX For the members of class (b), expand their definitions at the referring sites, and remove their definitions. For the members of class (c), remove their definitions. (It's easier to review this patch with "git show --word-diff".) Cc: Bob Feng <bob.c.feng@intel.com> Cc: Liming Gao <liming.gao@intel.com> Cc: Yonghong Zhu <yonghong.zhu@intel.com> Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=1377 Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Jordan Justen <jordan.l.justen@intel.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
* BaseTools/tools_def.template: remove GCC44 leaf definitionsLaszlo Ersek2019-01-081-76/+0
| | | | | | | | | | | | | | | | | Remove the "leaf" definitions for GCC44. These definitions are never referenced in "tools_def.template", so their removal can't break other definitions. Instead, their erasure turns other definitions into leaves (subject to further removal). Cc: Bob Feng <bob.c.feng@intel.com> Cc: Liming Gao <liming.gao@intel.com> Cc: Yonghong Zhu <yonghong.zhu@intel.com> Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=1377 Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Jordan Justen <jordan.l.justen@intel.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
* BaseTools/tools_def.template: remove GCC45 documentationLaszlo Ersek2019-01-081-6/+0
| | | | | | | | | | | | | | | No GCC45 definitions exist at this point, so remove the GCC45 documentation too, from "tools_def.template". Cc: Bob Feng <bob.c.feng@intel.com> Cc: Liming Gao <liming.gao@intel.com> Cc: Yonghong Zhu <yonghong.zhu@intel.com> Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=1377 Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Jordan Justen <jordan.l.justen@intel.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
* BaseTools/tools_def.template: propagate loss of GCC45 referencesLaszlo Ersek2019-01-081-20/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The last patch decremented references on a number of DEFs. They can be classified into three groups: (a) those that remain used by multiple toolchains (refcount >= 2): - GCC_ASLCC_FLAGS - GCC_ASLPP_FLAGS - GCC_HOST_PREFIX - GCC_IA32_RC_FLAGS - GCC_PP_FLAGS - GCC_VFRPP_FLAGS - GCC_X64_RC_FLAGS - IASL_FLAGS - IASL_OUTFLAGS - UNIX_IASL_BIN (b) those that are only used by GCC48 (refcount == 1): - GCC45_ASM_FLAGS - GCC45_IA32_CC_FLAGS - GCC45_IA32_DLINK2_FLAGS - GCC45_IA32_X64_ASLDLINK_FLAGS - GCC45_IA32_X64_DLINK_FLAGS - GCC45_X64_CC_FLAGS - GCC45_X64_DLINK2_FLAGS - GCC45_X64_DLINK_FLAGS (c) those that are no longer used (refcount == 0): - GCC45_IA32_PREFIX - GCC45_X64_PREFIX For the members of class (b), expand their definitions at the referring sites, and remove their definitions. For the members of class (c), remove their definitions. Cc: Bob Feng <bob.c.feng@intel.com> Cc: Liming Gao <liming.gao@intel.com> Cc: Yonghong Zhu <yonghong.zhu@intel.com> Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=1377 Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Jordan Justen <jordan.l.justen@intel.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
* BaseTools/tools_def.template: remove GCC45 leaf definitionsLaszlo Ersek2019-01-081-76/+0
| | | | | | | | | | | | | | | | | Remove the "leaf" definitions for GCC45. These definitions are never referenced in "tools_def.template" (they are the last GCC45 mentions in the file), so their removal can't break other definitions. Instead, their erasure turns other definitions into leaves (subject to further removal). Cc: Bob Feng <bob.c.feng@intel.com> Cc: Liming Gao <liming.gao@intel.com> Cc: Yonghong Zhu <yonghong.zhu@intel.com> Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=1377 Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Jordan Justen <jordan.l.justen@intel.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
* BaseTools/tools_def.template: remove GCC46 documentationLaszlo Ersek2019-01-081-6/+0
| | | | | | | | | | | | | | | No GCC46 definitions exist at this point, so remove the GCC46 documentation too, from "tools_def.template". Cc: Bob Feng <bob.c.feng@intel.com> Cc: Liming Gao <liming.gao@intel.com> Cc: Yonghong Zhu <yonghong.zhu@intel.com> Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=1377 Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Jordan Justen <jordan.l.justen@intel.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
* BaseTools/tools_def.template: propagate loss of GCC46 referencesLaszlo Ersek2019-01-081-20/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The last patch decremented references on a number of DEFs. They can be classified into three groups: (a) those that remain used by multiple toolchains (refcount >= 2): - GCC_ASLCC_FLAGS - GCC_ASLPP_FLAGS - GCC_HOST_PREFIX - GCC_IA32_RC_FLAGS - GCC_PP_FLAGS - GCC_VFRPP_FLAGS - GCC_X64_RC_FLAGS - IASL_FLAGS - IASL_OUTFLAGS - UNIX_IASL_BIN (b) those that are only used by GCC48 (refcount == 1): - GCC46_ASM_FLAGS - GCC46_IA32_CC_FLAGS - GCC46_IA32_DLINK2_FLAGS - GCC46_IA32_X64_ASLDLINK_FLAGS - GCC46_IA32_X64_DLINK_FLAGS - GCC46_X64_CC_FLAGS - GCC46_X64_DLINK2_FLAGS - GCC46_X64_DLINK_FLAGS (c) those that are no longer used (refcount == 0): - GCC46_IA32_PREFIX - GCC46_X64_PREFIX For the members of class (b), expand their definitions at the referring sites, and remove their definitions. For the members of class (c), remove their definitions. Cc: Bob Feng <bob.c.feng@intel.com> Cc: Liming Gao <liming.gao@intel.com> Cc: Yonghong Zhu <yonghong.zhu@intel.com> Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=1377 Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Jordan Justen <jordan.l.justen@intel.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
* BaseTools/tools_def.template: remove GCC46 leaf definitionsLaszlo Ersek2019-01-081-76/+0
| | | | | | | | | | | | | | | | | Remove the "leaf" definitions for GCC46. These definitions are never referenced in "tools_def.template" (they are the last GCC46 mentions in the file), so their removal can't break other definitions. Instead, their erasure turns other definitions into leaves (subject to further removal). Cc: Bob Feng <bob.c.feng@intel.com> Cc: Liming Gao <liming.gao@intel.com> Cc: Yonghong Zhu <yonghong.zhu@intel.com> Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=1377 Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Jordan Justen <jordan.l.justen@intel.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
* BaseTools/tools_def.template: remove GCC47 documentationLaszlo Ersek2019-01-081-6/+0
| | | | | | | | | | | | | | | No GCC47 definitions exist at this point, so remove the GCC47 documentation too, from "tools_def.template". Cc: Bob Feng <bob.c.feng@intel.com> Cc: Liming Gao <liming.gao@intel.com> Cc: Yonghong Zhu <yonghong.zhu@intel.com> Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=1377 Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Jordan Justen <jordan.l.justen@intel.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
* BaseTools/tools_def.template: propagate loss of GCC47 referencesLaszlo Ersek2019-01-081-20/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The last patch decremented references on a number of DEFs. They can be classified into three groups: (a) those that remain used by multiple toolchains (refcount >= 2): - GCC_ASLCC_FLAGS - GCC_ASLPP_FLAGS - GCC_HOST_PREFIX - GCC_IA32_RC_FLAGS - GCC_PP_FLAGS - GCC_VFRPP_FLAGS - GCC_X64_RC_FLAGS - IASL_FLAGS - IASL_OUTFLAGS - UNIX_IASL_BIN (b) those that are only used by GCC48 (refcount == 1): - GCC47_ASM_FLAGS - GCC47_IA32_CC_FLAGS - GCC47_IA32_DLINK2_FLAGS - GCC47_IA32_X64_ASLDLINK_FLAGS - GCC47_IA32_X64_DLINK_FLAGS - GCC47_X64_CC_FLAGS - GCC47_X64_DLINK2_FLAGS - GCC47_X64_DLINK_FLAGS (c) those that are no longer used (refcount == 0): - GCC47_IA32_PREFIX - GCC47_X64_PREFIX For the members of class (b), expand their definitions at the referring sites, and remove their definitions. For the members of class (c), remove their definitions. Cc: Bob Feng <bob.c.feng@intel.com> Cc: Liming Gao <liming.gao@intel.com> Cc: Yonghong Zhu <yonghong.zhu@intel.com> Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=1377 Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Jordan Justen <jordan.l.justen@intel.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
* BaseTools/tools_def.template: remove GCC47 leaf definitionsLaszlo Ersek2019-01-081-76/+0
| | | | | | | | | | | | | | | | | Remove the "leaf" definitions for GCC47. These definitions are never referenced in "tools_def.template" (they are the last GCC47 mentions in the file), so their removal can't break other definitions. Instead, their erasure turns other definitions into leaves (subject to further removal). Cc: Bob Feng <bob.c.feng@intel.com> Cc: Liming Gao <liming.gao@intel.com> Cc: Yonghong Zhu <yonghong.zhu@intel.com> Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=1377 Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Jordan Justen <jordan.l.justen@intel.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
* BaseTools/tools_def.template: remove GCC48_IA32_X64_DLINK_COMMON dead-endLaszlo Ersek2019-01-081-4/+0
| | | | | | | | | | | | | | | | | | | | | | DLINK_COMMON definitions are not consumed by "build_rule.template"; instead, DLINK_COMMON definitions (internal to "tools_def.template") were invented for sharing options between ASLDLINK_FLAGS and DLINK_FLAGS. However, this intent doesn't actually apply to GCC48_IA32_X64_DLINK_COMMON: it is never consumed. Furthermore, the GCC45..GCC47 instances of IA32_X64_DLINK_COMMON too lead up to GCC48_IA32_X64_DLINK_COMMON only -- they form a dead-end. Remove them altogether, in order to simplify the subsequent patches. Cc: Bob Feng <bob.c.feng@intel.com> Cc: Liming Gao <liming.gao@intel.com> Cc: Yonghong Zhu <yonghong.zhu@intel.com> Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=1377 Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Jordan Justen <jordan.l.justen@intel.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
* BaseTools/tools_def.template: strip trailing whitespaceLaszlo Ersek2019-01-081-54/+54
| | | | | | | | | | | | | | | | Whitespace just before line terminators is useless, remove it. ("git show -b" produces a null diff for this patch.) Cc: Bob Feng <bob.c.feng@intel.com> Cc: Liming Gao <liming.gao@intel.com> Cc: Yonghong Zhu <yonghong.zhu@intel.com> Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=1377 Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Jordan Justen <jordan.l.justen@intel.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
* BaseTools/tools_def.template: fix up LF-only line terminatorLaszlo Ersek2019-01-081-1/+1
| | | | | | | | | | | | | | | "tools_def.template" should only use CRLF line terminators, at this time. Cc: Bob Feng <bob.c.feng@intel.com> Cc: Liming Gao <liming.gao@intel.com> Cc: Yonghong Zhu <yonghong.zhu@intel.com> Fixes: 88e8498f8a72cff1f7af6852ec8166772913399e Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=1377 Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Jordan Justen <jordan.l.justen@intel.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
* BaseTools/Conf/tools_def.template: drop ARM/AARCH support from GCC46/GCC47Ard Biesheuvel2019-01-081-129/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | This drops ARM and AARCH64 support from the GCC46 and GCC47 toolchain definitions, which are on the list to be removed, along with VS2003, VS2005, VS2008, VS2010, DDK3790, UNIXGCC, GCC44, GCC45, ELFGCC, CYGGCC, ICC, ICC11 and MYTOOLS. Since GCC46 and GCC47 are the only ones on that list that support ARM and/or AARCH64, let's give Liming a hand and cover the ARM side of things first, so that everything that remains to be removed is x86 only. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Liming Gao <liming.gao@intel.com> Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=1377 Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org> Cc: Leif Lindholm <leif.lindholm@linaro.org> Cc: Liming Gao <liming.gao@intel.com> [lersek@redhat.com: add bugzilla reference and CCs] Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Jordan Justen <jordan.l.justen@intel.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
* BaseTools/tools_def ARM: use softfloat target for CLANG3xArd Biesheuvel2018-12-231-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The 'arm-linux-gnueabihf' target triplet we use for CLANG35 and CLANG38 specifies a hardfloat target, and so the binaries that are emitted are annotated as using VFP registers for passing floating point arguments, even though no VFP is used anywhere in the code. This works fine as long as we don't try to link against code that uses software floating point, but combining object files with different floating point calling conventions is not permitted. So switch to the softfloat arm-linux-gnueabi triplet instead. This affects both the name Clang uses when invoking the linker, and the arguments it passes to it, and we are mostly interested in the latter (since any version of GNU ld.bfd will do the right thing as long as it targets EABI ARM) For native builds, this change has no effect, since the unprefixed system linker will take priority, and so Clang will pass the right arguments to whichever linker happens to be the system linker. For cross builds, the fact that Clang composes the name of the linker by prefixing '-ld' with the target triplet implies that users will have to switch to a version of binutils that targets arm-linux-gnueabi rather than arm-linux-gnueabihf. Note that the GCCx toolchain targets can use either when building for ARM so this does not create a need to install two versions of the ARM cross toolchain. Also, note that all ARM toolchains in the GCC family are already documented as requiring a toolchain that targets arm-linux-gnueabi and not arm-linux-gnueabihf. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
* BaseTools/tools_def ARM: emit PIC veneersArd Biesheuvel2018-12-191-1/+1
| | | | | | | | | | | | | | | | | The ARM linker may emit veneers, i.e., trampolines, when ordinary direct relative branches cannot be used, e.g., for Thumb interworking or branch targets that are out of range. Usually, such veneers carry an absolute reference to the branch target, which is problematic for us, since these absolute references are not covered by annotations that are visible to GenFw in the PE/COFF conversion, and so these absolute references are not fixed up by the PE/COFF loader at runtime. So switch to all ARM GNU ld toolchains to position independent veneers. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
* BaseTools: Update nasm file build rule to support $(INC)zhijufan2018-12-181-1/+2
| | | | | | | | | | | | | | https://bugzilla.tianocore.org/show_bug.cgi?id=1085 Update the build rule to: "$(NASM)" -I${s_path}(+) $(NASM_INC) $(NASM_FLAGS) -o $dst ${d_path}(+)${s_base}.iii Cc: Liming Gao <liming.gao@intel.com> Cc: Yonghong Zhu <yonghong.zhu@intel.com> Cc: Bob Feng <bob.c.feng@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Zhiju.Fan <zhijux.fan@intel.com> Reviewed-by: Bob Feng <bob.c.feng@intel.com>
* BaseTools/tools_def ARM CLANG35: work around -mno-movt option name changeArd Biesheuvel2018-12-131-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | PE/COFF only has a very limited id space for runtime relocations, and so it defines only a single relocation for movw/movt instruction pairs, which can be combined to load a 32-bit symbol reference into a register. For this to work as expected, these instructions must always appear in the same order and adjacently, and this is something few compilers take into account, unless they target PE/COFF explicitly (and this is not the case for our ELF based toolchains) For Clang 3.6 and later, we can pass the -mno-movt option to suppress movw/movt pairs entirely, which works around the issue. Unfortunately, for Clang 3.5, the option is called differently (-mllvm -arm-use-movt=0) and mutually incompatible between 3.5 and 3.6. Since it is desirable for the CLANG35 toolchain to be usable on newer versions of Clang as well (given that it is the only non-LTO alternative to CLANG38), let's work around this issue in a way that permits versions 3.5 and newer of Clang to be used with the CLANG35 profile. So pass the -mkernel flag instead (and add -Qunused-argument so Clang does not complain about the -mno-unaligned-access in ARM_CC_XIPFLAGS). This also inhibits movw/movt generation, along with some other changes (e.g., long calls) which do affect code generation but not in an undesirable manner. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Acked-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org> Reviewed-by: Liming Gao <liming.gao@intel.com>
* BaseTools/tools_def AARCH64 RELEASE: move GCC49/GGC5 to 4 KB alignmentArd Biesheuvel2018-12-111-12/+14
| | | | | | | | | | | | | | | Since 4 KB section alignment is required when mapping PE/COFF images with strict permissions, update the default section alignment when using GCC49 and GCC5 in RELEASE mode. Note that XIP modules such as SEC, PEIMs or PEI core are not affected by this change, since the override to 32 byte aligment remains in effect. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org> Tested-by: Leif Lindholm <leif.lindholm@linaro.org> Reviewed-by: Liming Gao <liming.gao@intel.com>
* BaseTools build_rule.template: Update aslc rule for XCODE tool chainLiming Gao2018-11-051-2/+2
| | | | | | | | | | | Update aslc rule to rename the temp output file from .efi to .pecoff. This change can avoid the conflict .efi file name in output directory. One is the driver image, another is aslc temp output file. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Liming Gao <liming.gao@intel.com> Cc: Yonghong Zhu <yonghong.zhu@intel.com> Reviewed-by: Yonghong Zhu <yonghong.zhu@intel.com>
* BaseTools tools_def.template: Add GCC link script option in ASLDLINK_FLAGSLiming Gao2018-11-021-1/+1
| | | | | | | | | | | GCC link script is used to discard the unused section data from ELF image. ASLDLINK_FLAGS requires it to remove the unnecessary section data, then GenFw can be used to retrieve the correct data section from ELF image. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Liming Gao <liming.gao@intel.com> Cc: Yonghong Zhu <yonghong.zhu@intel.com> Reviewed-by: Yonghong Zhu <yonghong.zhu@intel.com>
* BaseTools: Update the rule to remove .lib before link it for GCCYonghong Zhu2018-08-161-1/+2
| | | | | | | | | | | | | | | | | We met a case on GCC toolchain for increment build. the case is user build Helloworld first, then rename the source file Helloworld.c to Helloworld_new.c and also update the file name to Helloworld_new.c in .inf file's [sources] section. finally, he rebuild it again. It cause build failure due to multiple definition of `UefiMain' because in the .lib file it both have Helloworld.obj and Helloworld_new.obj. current we use the option 'cr' to create the .lib file while the 'r' cmd means replace existing or insert new files into the archive. so in this patch before we create the .lib file, we delete it first. Cc: Liming Gao <liming.gao@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Yonghong Zhu <yonghong.zhu@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
* BaseTools: Clean up source filesLiming Gao2018-07-091-1/+1
| | | | | | | | | | | 1. Do not use tab characters 2. No trailing white space in one line 3. All files must end with CRLF Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Liming Gao <liming.gao@intel.com> Cc: Yonghong Zhu <yonghong.zhu@intel.com> Reviewed-by: Yonghong Zhu <yonghong.zhu@intel.com>
* BaseTools Conf: Update tools_def and build_rule to remove IPF settingLiming Gao2018-07-052-813/+0
| | | | | | | Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Liming Gao <liming.gao@intel.com> Cc: Yonghong Zhu <yonghong.zhu@intel.com> Reviewed-by: Yonghong Zhu <yonghong.zhu@intel.com>
* BaseTools tools_def.template: Ignore link warning 4281 for VS2017Liming Gao2018-06-251-3/+3
| | | | | | | | | | | | VS2017 reports warning LNK4281: undesirable base address 0x0 for x64 image; set base address above 4GB for best ASLR optimization. edk2 build always sets baes address to zero as default. So, ignore this link warning. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Pete Batard <pete@akeo.ie>
* BaseTools/tools_def CLANG35: add NOOPT build targetArd Biesheuvel2018-06-181-2/+4
| | | | | | | | | | | Create the missing NOOPT target for CLANG35 (which is ARM and AARCH64 only), and align it with the other toolchains: NOOPT has optimizations disabled entirely (for source level debugging), and DEBUG is changed from -O0 to -O1, as is the case for CLANG38 as well. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
* BaseTools/tools_def IA32: drop -no-pie linker option for GCC49Ard Biesheuvel2018-06-181-4/+4
| | | | | | | | | | | | | | | | As reported by Liming, GCC 4.9.2 does not support the -no-pie linker option that we added to the GCC49 and GCC5 toolchain profiles in commit c25d3905523a ("BaseTools/tools_def IA32: disable PIE code generation explicitly") to work around issues with recent distro toolchains that enable PIE code generation by default. So rollback the changes for GCC49 but preserve them for GCC5 Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Acked-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
* BaseTools/tools_def IA32: disable PIE code generation explicitlyArd Biesheuvel2018-06-121-5/+5
| | | | | | | | | | | | | | | | | As a security measure, some distros now build their GCC toolchains with PIE code generation enabled by default, because it is a prerequisite for ASLR to be enabled when running the executable. This typically results in slightly larger code, but it also generates ELF relocations that our tooling cannot deal with, so let's disable it explicitly when using GCC49 or later for IA32. (Note that this does not apply to X64: it uses PIE code deliberately in some cases, and our tooling does deal with the resuling relocations) Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Acked-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
* BaseTools/tools_def: add "-fno-unwind-tables" to GCC_AARCH64_CC_FLAGSLaszlo Ersek2018-05-231-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The ElfConvert routines in GenFw don't handle the ".eh_frame" ELF section emitted by gcc. For this reason, Leif disabled the generation of that section for AARCH64 with "-fno-asynchronous-unwind-tables" in commit 28e80befa4fe [1], and Ard did the same for IA32 and X64 in commit 26ecc55c027d [2]. (The CLANG38 toolchain received the same flag at its inception, in commit 6f756db5ea05 [3].) However, ".eh_frame" is back now; in upstream gcc commit 9cbee213b579 [4] (part of tag "gcc-8_1_0-release"), both "-fasynchronous-unwind-tables" and "-funwind-tables" were made the default for AARCH64. (The patch author described the effects on the gcc mailing list [5].) We have to counter the latter flag with "-fno-unwind-tables", otherwise GenFw chokes on ".eh_frame" again (triggered for example on Fedora 28). "-f[no-]unwind-tables" goes back to at least gcc-4.4 [6], so it's safe to add to GCC_AARCH64_CC_FLAGS. [1] https://github.com/tianocore/edk2/commit/28e80befa4fe [2] https://github.com/tianocore/edk2/commit/26ecc55c027d [3] https://github.com/tianocore/edk2/commit/6f756db5ea05 [4] https://gcc.gnu.org/git/?p=gcc.git;a=commitdiff;h=9cbee213b579 [5] http://mid.mail-archive.com/7b28c03a-c032-6cec-c127-1c12cbe98eeb@foss.arm.com [6] https://gcc.gnu.org/onlinedocs/gcc-4.4.7/gcc/Code-Gen-Options.html Cc: "Danilo C. L. de Paula" <ddepaula@redhat.com> Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org> Cc: Cole Robinson <crobinso@redhat.com> Cc: Gerd Hoffmann <kraxel@redhat.com> Cc: Leif Lindholm <leif.lindholm@linaro.org> Cc: Liming Gao <liming.gao@intel.com> Cc: Paolo Bonzini <pbonzini@redhat.com> Cc: Yonghong Zhu <yonghong.zhu@intel.com> Reported-by: "Danilo C. L. de Paula" <ddepaula@redhat.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Liming Gao <liming.gao@intel.com>
* BaseTools: Separate HOST and PREFIX env for GCC tool chainLiming Gao2018-05-211-7/+8
| | | | | | | | | | | | | | The crossing GCC compiler may use the different path for make and gcc tool. So, GCC_HOST_BIN is introduced for make path. GCC5_BIN is still kept for gcc path. User needs to set GCC_HOST_BIN besides set GCC5_BIN env if the default make is not used. Normally, make is in the default system path. GCC_HOST_BIN is not required to be set. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Yonghong Zhu <yonghong.zhu@intel.com> Tested-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Acked-by: Laszlo Ersek <lersek@redhat.com>
* BaseTools/Conf: Add /Gw optimisation option for VS2017 IA32 and X64Pete Batard2018-05-071-4/+4
| | | | | | | | | This option, which is used in VS2015 and earlier toolchains, was missing for VS2017. Applying it greatly reduces the size of generated binaries. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Pete Batard <pete@akeo.ie> Reviewed-by: Liming Gao <liming.gao@intel.com>
* BaseTools/Conf: Add VS2017/ARM64 supportPete Batard2018-03-192-3/+31
| | | | | | | | | | Build options for ARM64 are the same as for ARM, except for /BASE:0 which is removed from DLINK flags to avoid LNK1355 error: invalid base address 0x0; ARM64 image cannot have base address below 4GB Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Pete Batard <pete@akeo.ie> Reviewed-by: Liming Gao <liming.gao@intel.com>
* BaseTools/tools_def: use separate PP definition for DTCArd Biesheuvel2018-02-282-8/+4
| | | | | | | | | | | | | | Clang's preprocessor behaves differently from GCC's, and produces intermediate device tree source that still contains #pragma pack() and other directives that the device tree compiler chokes on. For assembling device tree sources, it matters very little which preprocessor is being used, so let's just use GNU CPP explicitly. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org> Reviewed-by: Liming Gao <liming.gao@intel.com>
* BaseTools: not specified value of MAX_CONCURRENT_THREAD_NUMBERYonghong Zhu2018-02-091-5/+9
| | | | | | | | | | when MAX_CONCURRENT_THREAD_NUMBER is not specified, tool will automatically detect number of processor threads. Fixes: https://bugzilla.tianocore.org/show_bug.cgi?id=775 Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Yonghong Zhu <yonghong.zhu@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
* BaseTools/Conf: Add VS2017/ARM supportPete Batard2018-02-072-1/+61
| | | | | | | | | We duplicate the Assembly-Code-File section from build_rule.template because --convert-hex cannot be used with the MSFT ARM assembler. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Pete Batard <pete@akeo.ie> Reviewed-by: Liming Gao <liming.gao@intel.com>
* BaseTools/Conf: disable DTC legacy phandle formatArd Biesheuvel2018-02-062-1/+2
| | | | | | | | | | | | | | | | | By default, the device tree compiler emits phandle properties twice: once called 'phandle' and again called 'linux,phandle'. Given that Linux was updated in early 2010 [0] to accept the former (which is what is specified in the ePAPR and device tree specifications), there is no point in emitting both when compiling device trees for UEFI platforms. [0] 04b954a673dd02f585a2769c4945a43880faa989 "of/flattree: Make the kernel accept ePAPR style phandle information" Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
* BaseTools/tools_def CLANG3x: ignore unknown warning optionsArd Biesheuvel2018-01-221-3/+3
| | | | | | | | | | | | | | | Ironically, disabling warnings in the OpensslLib library build is causing breakage when using the CLANG35 toolchain to build for ARM: error: unknown warning option '-Werror=maybe-uninitialized'; did you mean '-Werror=uninitialized'? [-Werror,-Wunknown-warning-option] So let's add -Wno-unknown-warning-option to the list of warnings to ignore when using Clang 3.5, and move the same option from the x86 specific list to the shared list for Clang 3.8. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Liming Gao <liming.gao@intel.com>
* BaseTools: Use nasm as the preferred assembly source files for XCODE5 toolLiming Gao2018-01-161-1/+0
| | | | | | | | | | https://bugzilla.tianocore.org/show_bug.cgi?id=850 Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Liming Gao <liming.gao@intel.com> Cc: Andrew Fish <afish@apple.com> Cc: Yonghong Zhu <yonghong.zhu@intel.com> Reviewed-by: Yonghong Zhu <yonghong.zhu@intel.com>
* BaseTools: Disable -Wno-unused-const-variable in XCODE5 RELEASE targetLiming Gao2018-01-161-3/+3
| | | | | | | | Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Liming Gao <liming.gao@intel.com> Cc: Yonghong Zhu <yonghong.zhu@intel.com> Cc: Andrew Fish <afish@apple.com> Reviewed-by: Yonghong Zhu <yonghong.zhu@intel.com>
* BaseTools: Disable warning varargs in XCODE5 align to CLANG38Liming Gao2018-01-161-6/+6
| | | | | | | | https://bugzilla.tianocore.org/show_bug.cgi?id=741 Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Yonghong Zhu <yonghong.zhu@intel.com>
* BaseTool/tools_def GCC5: enable optimization for ARM/AARCH64 DEBUG buildsArd Biesheuvel2017-12-081-4/+4
| | | | | | | | | | | | | | | | | | | | | Enable optimization for DEBUG builds, to make it more usable in terms of performance, and to give more coverage to the LTO builds. Also, some diagnostics are only enabled when optimization is enabled. NOOPT builds can now also be created, which will retain the behavior DEBUG builds had previously. Note that this aligns ARM and AARCH64 with the x86 architectures, which already use optimization for DEBUG builds. In order to preserve existing behavior for users of older toolchains, keep GCC49 and older as-is. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Acked-by: Laszlo Ersek <lersek@redhat.com> Tested-by: Leif Lindholm <leif.lindholm@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org> Reviewed-by: Liming Gao <liming.gao@intel.com>
* BaseTools/tools_def CLANG38: add -Wno-unused-const-variableArd Biesheuvel2017-12-081-1/+1
| | | | | | | | | | | | | | | | | | Commit 8b6366f87584 ("BaseTools/GCC: set -Wno-unused-const-variable on RELEASE builds") suppresses warnings about unused constant variables in RELEASE builds when building with GCC, given that they break the build under our warnings-as-errors policy. Do the same for CLANG38. Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=790 Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Shi Steven <steven.shi@intel.com> Tested-by: Leif Lindholm <leif.lindholm@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org> Reviewed-by: Liming Gao <liming.gao@intel.com>
* BaseTools/tools_def: add CLANG38 LTO versions for AARCH64 and ARMArd Biesheuvel2017-12-081-3/+95
| | | | | | | | | | | | | | | | | | | | Extend the CLANG38 toolchain definition so it can be used for ARM and AARCH64 as well. Note that this requires llvm-ar and the LLVMgold.so linker plugin. In preparation of doing the same for GCC5, this toolchain version also departs from the custom of using -O0 for DEBUG builds, which makes them needlessly slow. Instead, let's add a NOOPT flavor as well, and enable optimization for DEBUG like the other architectures do. (Note that this will require some trivial changes to the platform description files) Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Acked-by: Laszlo Ersek <lersek@redhat.com> Tested-by: Leif Lindholm <leif.lindholm@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org> Reviewed-by: Liming Gao <liming.gao@intel.com>
* BaseTools: Add VS2017 tool chain in BaseTools tools_def.templateLiming Gao2017-11-291-0/+126
| | | | | | | | | | VS2017 tool chain enables /WHOLEARCHIVE linker option Split host-related and arch-related elements Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Liming Gao <liming.gao@intel.com> Signed-off-by: Pete Batard <pete@akeo.ie> Reviewed-by: Yonghong Zhu <yonghong.zhu@intel.com>
* BaseTools/tools_def AARCH64 ARM: suppres PIE sections via linker scriptArd Biesheuvel2017-11-231-6/+7
| | | | | | | | | | | | | | | | | | | | | | | | Recent distro builds of GCC 6 enable PIE linking by default, and allow the previous behavior to be restored by passing the -no-pie command line argument. Support for this was implemented by commits 1894a7c64c0a and 3380a591232d but unfortunately, it turns out that GCC 5 does not support this command line argument, and exits with an error. To avoid the need for yet another toolchain tag, to distinguish between GCC 5 and GCC 6, let's use our GCC linker scripts when building objects from .aslc files. This will ensure that the extra sections that are added by the PIE linker are discarded from the ELF binary, and so they will not corrupt the resulting .acpi file. This reverts 1894a7c64c0a BaseTools/tools_def AARCH64 ARM: disable PIE linking 3380a591232d BaseTools/tools_def AARCH64 ARM: disable PIE linking for .aslc sources Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Tested-by: Marcin Wojtas <mw@semihalf.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
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