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* Coreboot*Pkg: Retire CorebootPayloadPkg and CorebootModulePkgMaurice Ma2019-05-101-721/+0
| | | | | | | | | | | | | | RFC: https://edk2.groups.io/g/devel/message/39126 Since UefiPayloadPkg in EDK2 supports Coreboot and Slim Bootloader, and I don't receive any concerns for the RFC to remove CorebootModulePkg and CorebootPayloadPkg from EDK2, here is the action patch to remove CorebootPayloadPkg and CorebootModulePkg. Signed-off-by: Guo Dong <guo.dong@intel.com> Cc: Prince Agyeman <prince.agyeman@intel.com> Cc: Benjamin You <benjamin.you@intel.com> Reviewed-by: Maurice Ma <maurice.ma@intel.com>
* CorebootModulePkg: Replace BSD License with BSD+Patent LicenseMichael D Kinney2019-04-091-7/+1
| | | | | | | | | | | | | | | | | | | | https://bugzilla.tianocore.org/show_bug.cgi?id=1373 Replace BSD 2-Clause License with BSD+Patent License. This change is based on the following emails: https://lists.01.org/pipermail/edk2-devel/2019-February/036260.html https://lists.01.org/pipermail/edk2-devel/2018-October/030385.html RFCs with detailed process for the license change: V3: https://lists.01.org/pipermail/edk2-devel/2019-March/038116.html V2: https://lists.01.org/pipermail/edk2-devel/2019-March/037669.html V1: https://lists.01.org/pipermail/edk2-devel/2019-March/037500.html Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com> Reviewed-by: Maurice Ma <maurice.ma@intel.com>
* CorebootModulePkg: Fix various typosAntoine Coeur2019-02-121-3/+3
| | | | | | | | Fix various typos in CorebootModulePkg. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Coeur <coeur@gmx.fr> Reviewed-by: Benjamin You <benjamin.you@intel.com>
* CorebootModulePkg/CbSupportDxe: Remove SCI_EN settingBenjamin You2018-06-111-0/+34
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | Current implemenation sets PM1_CNT.SCI_EN bit at ReadyToBoot event. However, this should not be done because this causes OS to skip triggering FADT.SMI_CMD, which leads to the functions implemented in the SMI handler being omitted. This issue was identified by Matt Delco <delco@google.com>. The fix does the following: - The SCI_EN bit setting is removed from CbSupportDxe driver. - Some additional checks are added in CbParseFadtInfo() in CbParseLib.c to output some error message and ASSERT (FALSE) if ALL of the following conditions are met: 1) HARDWARE_REDUCED_ACPI is not set; 2) SMI_CMD field is zero; 3) SCI_EN bit is zero; which indicates the ACPI enabling status is inconsistent: SCI is not enabled but the ACPI table does not provide a means to enable it through FADT->SMI_CMD. This may cause issues in OS. Cc: Maurice Ma <maurice.ma@intel.com> Cc: Prince Agyeman <prince.agyeman@intel.com> Cc: Matt Delco <delco@google.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Benjamin You <benjamin.you@intel.com> Reviewed-by: Maurice Ma <maurice.ma@intel.com> Reviewed-by: Matt Delco <delco@google.com>
* CorebootModulePkgPkg: Expose FindCbTag API from CbParseLibgdong12016-10-271-0/+10
| | | | | | | | | | CbPlatformSupportLib might use FindCbTag() API to parse platform specific information. So expose this API. And add EFIAPI to all functions in CbParseLib. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Guo Dong <guo.dong@intel.com> Reviewed-by: Maurice Ma <maurice.ma@intel.com>
* CorebootModulePkg: Fix memmap issuegdong12016-10-261-60/+42
| | | | | | | | | | Some reserved memory (e.g. CSE reserved memory) might be in the middle of usable physical memory. The current memory map caculation could not handle this case. This patch fixed this issue. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: gdong1 <guo.dong@intel.com> Reviewed-by: Maurice Ma <maurice.ma@intel.com>
* CorebootPayloadPkg/PlatformBdsLib: Pass more serial parametersLeahy, Leroy P2016-05-101-7/+25
| | | | | | | | | | Pass the serial port baudrate, register stride, input clock rate and ID from coreboot to CorebootPayloadPkg. Change-Id: I37111d23216e4effa2909337af7e8a6de36b61f7 Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com> Reviewed-by: Prince Agyeman <prince.agyeman@intel.com>
* CorebootModulePkg-CbParseLib: Fix bad reference in CbParseLibLeahy, Leroy P2016-02-261-1/+2
| | | | | | | | | | | | Dereferencing pMemTableSize in debug statement displays bad values when it is set to NULL. Display the actual table size value instead. TEST=Build and run on Galileo Gen2 Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com> Reviewed-by: Erik Bjorge <erik.c.bjorge@intel.com> Reviewed-by: Prince Agyeman <prince.agyeman@intel.com>
* CorebootModulePkg-CbParseLib: Add ACPI table verificationLeahy, Leroy P2016-02-261-0/+9
| | | | | | | | | | | Verify the register address in the FADT. TEST=Build and run on Galileo Gen2 when the FADT was not present. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com> Reviewed-by: Erik Bjorge <erik.c.bjorge@intel.com> Reviewed-by: Prince Agyeman <prince.agyeman@intel.com>
* CorebootModulePkg: Get power management register addresses.Guo Dong2015-07-011-1/+24
| | | | | | | | | | | This patch will get power management event register address and power management GPE enable register address. Add missing code in CbParseLib.c. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Guo Dong <guo.dong@intel.com> Reviewed-by: Maurice Ma <maurice.ma@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17791 6f19259b-4bc3-4df7-8a09-765794883524
* CorebootModulePkg: Fix GCC build failure.Guo Dong2015-05-271-1/+1
| | | | | | | | | | This patch fixed a GCC build failure issue. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Guo Dong <guo.dong@intel.com> Reviewed-by: Maurice Ma <maurice.ma@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17519 6f19259b-4bc3-4df7-8a09-765794883524
* CorebootModulePkg/CbParseLib: Coding style updateGuo Dong2015-05-201-88/+159
| | | | | | | | | | | | | | | This patch update file CbParseLib.c to make it consistent with EDKII coding style: 1) Add function comments. 2) Add {} for if statement. 3) Compare with NULL for pointer and compare with 0 for integer instead of using them like a BOOLEAN. 4) For debug information only, use EFI_D_INFO instead of EFI_D_ERROR 5) Correct IN, OUT modifier Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Guo Dong <guo.dong@intel.com> Reviewed-by: Maurice Ma <maurice.ma@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17487 6f19259b-4bc3-4df7-8a09-765794883524
* CorebootModulePkg/CbParseLib: Fix coding issue in ACPIGuo Dong2015-05-201-3/+3
| | | | | | | | Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Guo Dong <guo.dong@intel.com> Reviewed-by: Maurice Ma <maurice.ma@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17486 6f19259b-4bc3-4df7-8a09-765794883524
* CorebootModulePkg/CbParseLib: Remove tab and spacesGuo Dong2015-05-201-247/+245
| | | | | | | | | | Replace tab with space. Remove the sapce at the end of lines. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Guo Dong <guo.dong@intel.com> Reviewed-by: Maurice Ma <maurice.ma@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17485 6f19259b-4bc3-4df7-8a09-765794883524
* CorebootModulePkg/CbParseLib: Support current Coreboot IMDGuo Dong2015-05-201-14/+38
| | | | | | | | | | The latest coreboot use IMD (In Memory Database) to report Tables. This patch adds IMD support in UEFI payload. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Guo Dong <guo.dong@intel.com> Reviewed-by: Maurice Ma <maurice.ma@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17484 6f19259b-4bc3-4df7-8a09-765794883524
* CorebootModulePkg: DEBUG print format correctionsScott Duplichan2015-04-101-7/+7
| | | | | | | | | | | Fix DEBUG print formats so that pointers and 64-bit integer values display correctly for both 32-bit and 64-bit builds. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Scott Duplichan <scott@notabs.org> Reviewed-by: Prince Agyeman <prince.agyeman@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17153 6f19259b-4bc3-4df7-8a09-765794883524
* CorebootModulePkg: Change CbParseAcpiTable prototype to avoid gcc failScott Duplichan2015-04-101-2/+2
| | | | | | | | | | | | | | | Use of void** as a generic pointer to pointer is a Microsoft extension to the C language and is not supported by gcc. Without this change, gcc compile fails with error: passing argument 1 of 'CbParseAcpiTable' from incompatible pointer type note: expected 'void **' but argument is of type 'struct EFI_ACPI_3_0_ROOT_SYSTEM_DESCRIPTION_POINTER **' Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Scott Duplichan <scott@notabs.org> Reviewed-by: Maurice Ma <maurice.ma@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17144 6f19259b-4bc3-4df7-8a09-765794883524
* CorebootModulePkg: Remove unused static functions to prevent gcc build failScott Duplichan2015-04-101-10/+0
| | | | | | | | | | | The gcc build will fail with -Werror=unused-function when a compilation unit defines a static function but never calls it. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Scott Duplichan <scott@notabs.org> Reviewed-by: Maurice Ma <maurice.ma@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17143 6f19259b-4bc3-4df7-8a09-765794883524
* CorebootModulePkg: Fix build failure with 32-bit NOOPT targetScott Duplichan2015-04-101-1/+1
| | | | | | | | | | | | Fix build failure with 32-bit NOOPT target by replacing direct shift of 64-bit integer with a function call. Otherwise Microsoft tool chains will generate a call to function __allshl and fail to link. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Scott Duplichan <scott@notabs.org> Reviewed-by: Maurice Ma <maurice.ma@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17142 6f19259b-4bc3-4df7-8a09-765794883524
* Pkg-Module: CorebootModulePkgMaurice Ma2015-03-311-0/+567
Initial coreboot UEFI payload code check in. It provides UEFI services on top of coreboot that allows UEFI OS boot. CorebootModulePkg is the source code package of coreboot support modules that will be used to parse the coreboot tables and report memory/io resources. It supports the following features: - Support Unified Extensible Firmware Interface (UEFI) specification 2.4. - Support Platform Initialization(PI) specification 1.3. - Support execution as a coreboot payload. - Support USB 3.0 - Support SATA/ATA devices. - Support EFI aware OS boot. The following features are not supported currently and have not been validated: - GCC Tool Chains - SMM Execution Environment - Security Boot It was tested on a Intel Bay Trail CRB platform. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Maurice Ma <maurice.ma@intel.com> Reviewed-by: Prince Agyeman <prince.agyeman@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17084 6f19259b-4bc3-4df7-8a09-765794883524
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