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* CorebootPayloadPkg: Use EfiEventGroupSignal from UefiLibStar Zeng2017-01-201-23/+2
| | | | | | | | | | | | | | | Use EfiEventGroupSignal from UefiLib and remove InternalBdsEmptyCallbackFuntion. REF: https://bugzilla.tianocore.org/show_bug.cgi?id=298 Cc: Maurice Ma <maurice.ma@intel.com> Cc: Prince Agyeman <prince.agyeman@intel.com> Cc: Liming Gao <liming.gao@intel.com> Cc: Michael Kinney <michael.d.kinney@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Star Zeng <star.zeng@intel.com> Reviewed-by: Maurice Ma <maurice.ma@intel.com>
* CorebootPayload/PlatformBds: Dispatch deferred images after EndOfDxeRuiyu Ni2016-11-101-0/+5
| | | | | | | | Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com> Reviewed-by: Maurice Ma <maurice.ma@intel.com> Cc: Prince Agyeman <prince.agyeman@intel.com> Reviewed-by: Sunny Wang <sunnywang@hpe.com>
* CorebootPayloadPkg: Fix typos in commentsMaurice Ma2016-11-071-2/+2
| | | | | | | | | | | - dirver -> driver - futhure -> future Cc: Maurice Ma <maurice.ma@intel.com> Cc: Prince Agyeman <prince.agyeman@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Gary Lin <glin@suse.com> Reviewed-by: Maurice Ma <maurice.ma@intel.com>
* CorebootPayloadPkg: Add "Down" key to Boot Manager Menugdong12016-10-271-2/+11
| | | | | | | | | Also add Down key to Boot Manager Menu since some serial terminals don't support F2 key. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Guo Dong <guo.dong@intel.com> Reviewed-by: Maurice Ma <maurice.ma@intel.com>
* CorebootPayloadPkg: Make EFI shell the last boot option.gdong12016-10-271-5/+5
| | | | | | | | | To let it boot to OS automatically, make built in shell as the last boot option. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Guo Dong <guo.dong@intel.com> Reviewed-by: Maurice Ma <maurice.ma@intel.com>
* CorebootPayloadPkg: Notify EndOfDxe and install ReadyToLock protocol.gdong12016-10-263-4/+69
| | | | | | | | | Update PlatformBootManagerLib to notify EndOfDxe event and install SmmReadyToLock protocol since other modules depend on them. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: gdong1 <guo.dong@intel.com> Reviewed-by: Maurice Ma <maurice.ma@intel.com>
* CorebootPayloadPkg/PciHostBridgeLib: Fix the wrong PCI resource limitMaurice Ma2016-10-181-2/+2
| | | | | | | | | | | The current PCI resource limit calculation in CorebootPayloadPkg PciHostBridgeLib is wrong. Adjusted it to match the PciHostBridge driver's expectation. Cc: Prince Agyeman <prince.agyeman@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Maurice Ma <maurice.ma@intel.com> Reviewed-by : Prince Agyeman <prince.agyeman@intel.com>
* CorebootPayloadPkg/ResetSystemLib: Implement ResetPlatformSpecificRuiyu Ni2016-09-021-1/+22
| | | | | | | Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com> Reviewed-by: Maurice Ma <maurice.ma@intel.com> Cc: Prince Agyeman <prince.agyeman@intel.com>
* CorebootModulePkg/PciHostBridgeLib: Fix PCI 64bit memory BAR size issueMaurice Ma2016-05-271-1/+5
| | | | | | | | | | | | | | The current PCI 64bit memory BAR size calculation in PciHostBridgeLib assumes all 32 bits in the upper BAR are fully writable. However, platform might only support partial address programming, such as 40bit PCI BAR address. In this case the complement cannot be used for size calculation. Instead, the lowest non-zero bit should be used for BAR size calculation. Cc: Prince Agyeman <prince.agyeman@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Maurice Ma <maurice.ma@intel.com> Reviewed-by: Prince Agyeman <prince.agyeman@intel.com>
* CorebootPayloadPkg: Consume PlatformHookLib in PlatformBootManagerLibMaurice Ma2016-05-231-1/+2
| | | | | | | | | | | | | | When coreboot uses different baud rate from the default (115200), the current BDS driver will not be able to enable serial console display due to the inconsistent serial port PCD settings. By adding the PlatformHookLib reference in the inf file, it will enforce the PCDs to be aligned with what have been passed from coreboot. Cc: Prince Agyeman <prince.agyeman@intel.com> Cc: Lee Leahy <leroy.p.leahy@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Maurice Ma <maurice.ma@intel.com> Reviewed by: Lee Leahy <leroy.p.leahy@intel.com>
* CorebootPayloadPkg: Use generic PciBus/PciHostBridge driverMaurice Ma2016-05-234-0/+942
| | | | | | | | | | | | | Current CorebootPayloadPkg uses PciBusNoEnumerationDxe and PciRootBridgenoEnumerationDxe copied from the DuetPkg. Now it will switch to use the standard PciBusDxe and PciHostBridgeDxe from MdeModulePkg. As a result, a coreboot specific PciHostBridgeLib is added to collect pre-allocated PCI resources. Cc: Prince Agyeman <prince.agyeman@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Maurice Ma <maurice.ma@intel.com> Reviewed-by: Prince Agyeman <prince.agyeman@intel.com>
* CorebootPayloadPkg/PlatformBootManagerLib: Fix Linux buildLeahy, Leroy P2016-05-231-2/+1
| | | | | | | | | Fix Linux build failure with GCC 4.8.4 due to missing braces. Change-Id: Ic0de6520605149f1bb74f8b60ce8cab8beda10a4 Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com> Reviewed-by: Maurice Ma <maurice.ma@intel.com>
* CorebootPayloadPkg: Remove BdsPlatform libraryMaurice Ma2016-05-204-1298/+0
| | | | | | | | | | Since the new BdsDxe driver in MdeModulePkg is used, the old BdsPlatform library is not used any more and should be removed. Cc: Prince Agyeman <prince.agyeman@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Maurice Ma <maurice.ma@intel.com> Reviewed-by: Prince Agyeman <prince.agyeman@intel.com>
* CorebootPayloadPkg: Add coreboot PlatfromBootManagerLib implementationMaurice Ma2016-05-206-0/+1121
| | | | | | | | | | | In order to use the generic BdsDxe in MdeModulePkg, a platform specific PlatfromBootManagerLib is required. This library will help update the ConIn, ConOut and ErrOut variables. Cc: Prince Agyeman <prince.agyeman@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Maurice Ma <maurice.ma@intel.com> Reviewed-by: Lee Leahy <leroy.p.leahy@intel.com>
* CorebootPayloadPkg/PlatformBdsLib: Pass more serial parametersLeahy, Leroy P2016-05-104-5/+71
| | | | | | | | | | Pass the serial port baudrate, register stride, input clock rate and ID from coreboot to CorebootPayloadPkg. Change-Id: I37111d23216e4effa2909337af7e8a6de36b61f7 Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com> Reviewed-by: Prince Agyeman <prince.agyeman@intel.com>
* CorebootPayloadPkg: PlatformBdsLib: remove set but unused variablesLaszlo Ersek2016-03-251-2/+0
| | | | | | | | | Cc: Maurice Ma <maurice.ma@intel.com> Cc: Prince Agyeman <prince.agyeman@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Jordan Justen <jordan.l.justen@intel.com> Reviewed-by: Jeff Fan <jeff.fan@intel.com>
* FW: [PATCH 3/9] CorebootPayloadPkg/PlatformBdsLib: Fix spelling errorLeahy, Leroy P2016-03-073-4/+4
| | | | | | | | | | | | | | | -----Original Message----- From: Leahy, Leroy P Sent: Friday, March 4, 2016 8:58 AM To: Ni, Ruiyu <ruiyu.ni@intel.com>; edk2-devel@lists.01.org; Bjorge, Erik C <erik.c.bjorge@intel.com> Cc: Leahy, Leroy P <leroy.p.leahy@intel.com> Subject: [PATCH 3/9] CorebootPayloadPkg/PlatformBdsLib: Fix spelling error Change vender to vendor Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com> Reviewed-by: Prince Agyeman <prince.agyeman@intel.com>
* CorebootPayloadPkg PlatformHookLib: Fix GCC build failureStar Zeng2015-11-301-3/+9
| | | | | | | | | | | | | | | | | | | | | | | | | Add return status check to fix GCC build failure below. error: right-hand operand of comma expression has no effect [-Werror=unused-value] ((_gPcd_BinaryPatch_PcdSerialUseMmio = (Value)), RETURN_SUCCESS) error: right-hand operand of comma expression has no effect [-Werror=unused-value] ((_gPcd_BinaryPatch_PcdSerialRegisterBase = (Value)), RETURN_SUCCESS) http://article.gmane.org/gmane.comp.bios.edk2.devel/4949 Cc: Maurice Ma <maurice.ma@intel.com> Cc: Prince Agyeman <prince.agyeman@intel.com> Cc: Laszlo Ersek <lersek@redhat.com> Contributed-under: TianoCore Contribution Agreement 1.0 Suggested-by: Laszlo Ersek <lersek@redhat.com> Signed-off-by: Star Zeng <star.zeng@intel.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Maurice Ma <maurice.ma@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@19069 6f19259b-4bc3-4df7-8a09-765794883524
* CorebootPayloadPkg: Use SerialDxe in MdeModulePkgStar Zeng2015-11-264-339/+74
| | | | | | | | | | | | | | | | | | | | 1. Update fdf and dsc to use SerialDxe in MdeModulePkg. 2. Separate the code that gets SerialRegBase and SerialRegAccessType by CbParseLib from CorebootPayloadPkg/Library/SerialPortLib to PlatformHookLib, and then leverage BaseSerialPortLib16550 in MdeModulePkg. 3. Remove CorebootPayloadPkg/SerialDxe and CorebootPayloadPkg/Library/SerialPortLib. Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <liming.gao@intel.com> Cc: Maurice Ma <maurice.ma@intel.com> Cc: Prince Agyeman <prince.agyeman@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Star Zeng <star.zeng@intel.com> Reviewed-by: Maurice Ma <maurice.ma@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18968 6f19259b-4bc3-4df7-8a09-765794883524
* CorebootPayloadPkg: Fix "reset -s" issue.Guo Dong2015-06-251-2/+29
| | | | | | | | | | Fix reboot issue after issuing shell command "reset -s" from UEFI payload. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Guo Dong <guo.dong@intel.com> Reviewed-by: Maurice Ma <maurice.ma@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17715 6f19259b-4bc3-4df7-8a09-765794883524
* CorebootPayloadPkg: Use the new PCDs defined in MdePkg.Ruiyu Ni2015-05-061-1/+1
| | | | | | | | Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com> Reviewed-by: Maurice Ma <maurice.ma@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17325 6f19259b-4bc3-4df7-8a09-765794883524
* Pkg-Module: CorebootPayloadPkgMaurice Ma2015-03-3110-0/+2150
Initial coreboot UEFI payload code check in. It provides UEFI services on top of coreboot that allows UEFI OS boot. CorebootPayloadPkg is source code package of coreboot Payload Modules, Provides definitions of payload image's layout and lists the modules required in DSC file. It supports the following features: - Support Unified Extensible Firmware Interface (UEFI) specification 2.4. - Support Platform Initialization(PI) specification 1.3. - Support execution as a coreboot payload. - Support USB 3.0 - Support SATA/ATA devices. - Support EFI aware OS boot. The following features are not supported currently and have not been validated: - GCC Tool Chains - SMM Execution Environment - Security Boot It was tested on a Intel Bay Trail CRB platform. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Maurice Ma <maurice.ma@intel.com> Reviewed-by: Prince Agyeman <prince.agyeman@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17081 6f19259b-4bc3-4df7-8a09-765794883524
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