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* DynamicTablesPkg: Add support to build _DSDJeff Brasen2022-09-011-0/+250
| | | | | | | | | | | | Add APIs needed to build _DSD with different UUIDs. This is per ACPI specification 6.4 s6.2.5. Adds support for building data packages with format Package {"Name", Integer} Signed-off-by: Jeff Brasen <jbrasen@nvidia.com> Reviewed-by: Pierre Gondois <pierre.gondois@arm.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
* DynamicTablesPkg: AcpiSsdtPcieLibArm: Added function to reserve ECAM spaceKun Qin2022-09-011-0/+135
| | | | | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3998 Certain OSes will complain if the ECAM config space is not reserved in the ACPI namespace. This change adds a function to reserve PNP motherboard resources for a given PCI node. Co-authored-by: Joe Lopez <joelopez@microsoft.com> Signed-off-by: Kun Qin <kuqin12@gmail.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com> Tested-by: Sami Mujawar <sami.mujawar@arm.com>
* DynamicTablesPkg: DynamicPlatRepoLib: Adding more token fixersKun Qin2022-09-011-3/+75
| | | | | | | | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3996 This change added more token fixers for other node types, including NamedComponentNode, RootComplexNode, and SmmuV3Node. The corresponding entries for tokenFixer functions table is also updated. Cc: Sami Mujawar <Sami.Mujawar@arm.com> Cc: Alexei Fedorov <Alexei.Fedorov@arm.com> Co-authored-by: Joe Lopez <joelopez@microsoft.com> Signed-off-by: Kun Qin <kuqin12@gmail.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com> Reviewed-by: Pierre Gondois <pierre.gondois@arm.com> Tested-by: Sami Mujawar <sami.mujawar@arm.com>
* DynamicTablesPkg: DynamicPlatRepoLib: Fix incorrect dereferencingKun Qin2022-09-011-1/+1
| | | | | | | | | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3996 The content of token should be derived from the data section of the `CmObject` instead of the object itself. This change fixed the issue by dereferencing the token value from the data buffer of input CmObject. Cc: Sami Mujawar <Sami.Mujawar@arm.com> Cc: Alexei Fedorov <Alexei.Fedorov@arm.com> Co-authored-by: Joe Lopez <joelopez@microsoft.com> Signed-off-by: Kun Qin <kuqin12@gmail.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com> Reviewed-by: Pierre Gondois <pierre.gondois@arm.com> Tested-by: Sami Mujawar <sami.mujawar@arm.com>
* DynamicTablesPkg: DynamicPlatRepoLib: Added MemoryAllocationLib to infKun Qin2022-09-011-0/+1
| | | | | | | | | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3996 The DynamicPlatRepoLib has multiple reference to MemoryAllocationLib, such as DynamicPlatRepo.c and TokenMapper.c. Not including it in the library inf file could lead to potential build break. This change added the MemoryAllocationLib into this inf file. Cc: Sami Mujawar <Sami.Mujawar@arm.com> Cc: Alexei Fedorov <Alexei.Fedorov@arm.com> Co-authored-by: Joe Lopez <joelopez@microsoft.com> Signed-off-by: Kun Qin <kuqin12@gmail.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com> Reviewed-by: Pierre Gondois <pierre.gondois@arm.com> Tested-by: Sami Mujawar <sami.mujawar@arm.com>
* DynamicTablesPkg: Fix using RmrNodeCount unitlitialisedEdward Pickup2022-08-061-1/+6
| | | | | | | | | Fix using RmrNodeCount uninitliased by initliasing it to zero. Also, add an additional check for ACPI version. This fixes a crash running on kvmtool. Signed-off-by: Edward Pickup <edward.pickup@arm.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
* DynamicTablesPkg: IORT generator updates for Rev E.d specSami Mujawar2022-07-292-50/+610
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Bugzilla: 3458 - Add support IORT Rev E.d specification updates (https://bugzilla.tianocore.org/show_bug.cgi?id=3458) The IO Remapping Table, Platform Design Document, Revision E.d, Feb 2022 (https://developer.arm.com/documentation/den0049/) introduces the following updates, collectively including the updates and errata fixes to Rev E, Rev E.a, Rev E.b, Rev E.c: - increments the IORT table revision to 5. - updates the node definition to add an 'Identifier' field. - adds definition of node type 6 - Reserved Memory Range node. - adds definition for Memory Range Descriptors. - adds flag to indicate PRI support for root complexes. - adds flag to indicate if the root complex supports forwarding of PASID information on translated transactions to the SMMU. - adds flag to indicate if the root complex supports PASID. - adds flags to define access privilege and attributes for the memory ranges. Therefore, update the IORT generator to: - increment IORT table revision count to 5. - populate Identifier filed if revision is greater than 4. - add support to populate Reserved Memory Range nodes and the Memory range descriptors. - add validation to check that the Identifier field is unique. - Populate the PASID capabilities and Flags field of the Root complex node. - Added checks to not generate IORT Rev E, Rev E.<a,b,c>. Signed-off-by: Sami Mujawar <sami.mujawar@arm.com> Reviewed-by: Pierre Gondois <pierre.gondois@arm.com>
* MdePkg: IORT header update for IORT Rev E.d specSami Mujawar2022-07-291-10/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Bugzilla: 3458 - Add support IORT Rev E.d specification updates (https://bugzilla.tianocore.org/show_bug.cgi?id=3458) The IO Remapping Table, Platform Design Document, Revision E.d, Feb 2022 (https://developer.arm.com/documentation/den0049/) introduces the following updates, collectively including the updates and errata fixes to Rev E, Rev E.a, Rev E.b, Rev E.c: - increments the IORT table revision to 5. - updates the node definition to add an 'Identifier' field. - adds definition of node type 6 - Reserved Memory Range node. - adds definition for Memory Range Descriptors. - adds flag to indicate PRI support for root complexes. - adds flag to indicate if the root complex supports forwarding of PASID information on translated transactions to the SMMU. - adds flag to indicate if the root complex supports PASID. - adds flags to define access privilege and attributes for the memory ranges. Therefore, update the IORT header file to reflect these changes, and also rename the EFI_ACPI_IO_REMAPPING_TABLE_REVISION macro to EFI_ACPI_IO_REMAPPING_TABLE_REVISION_00. Also update the IORT generator in DynamicTablesPkg to fix the compilation errors so that Git Bisect can work. Signed-off-by: Sami Mujawar <sami.mujawar@arm.com> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn> Reviewed-by: Pierre Gondois <pierre.gondois@arm.com> Reviewed-by: Zhichao Gao <zhichao.gao@intel.com>
* DynamicTablesPkg: IORT set reference to interrupt array if presentSami Mujawar2022-07-291-30/+57
| | | | | | | | | | | | The IORT generator is populating the reference field for Context and PMU interrupts even if their count is zero. Update the IORT generator to set the references only if the interrupt count is not 0. Also add checks to ensure a valid reference token has been provided. Signed-off-by: Sami Mujawar <sami.mujawar@arm.com> Reviewed-by: Pierre Gondois <pierre.gondois@arm.com>
* DynamicTablesPkg: IORT set reference to Id array only if presentSami Mujawar2022-07-291-12/+15
| | | | | | | | | | | | | The IORT table generator is setting up a reference to ID array for nodes even when the ID Mapping count is zero. This is not an issue as an OS would only access the ID Reference if the ID mapping count is not zero. However, it would be good to set the reference to ID array to zero when the ID Mapping count is zero rather than populating it with an incorrect value. Signed-off-by: Sami Mujawar <sami.mujawar@arm.com> Reviewed-by: Pierre Gondois <pierre.gondois@arm.com>
* DynamicTablesPkg: Handle error when IdMappingToken is NULLSami Mujawar2022-07-291-16/+66
| | | | | | | | Add error handling when the IdMappingCount is not zero and the IdMappingToken is NULL. Signed-off-by: Sami Mujawar <sami.mujawar@arm.com> Reviewed-by: Pierre Gondois <pierre.gondois@arm.com>
* DynamicTablesPkg: AcpiSsdtPcieLibArm: Create support libraryJeff Brasen2022-07-197-187/+259
| | | | | | | | | | Add support library to allow for customization of _OSC and slot info. The functions in the library are unchanged, with the exception of adding PciInfo pointer to the APIs. Signed-off-by: Jeff Brasen <jbrasen@nvidia.com> Reviewed-by: Pierre Gondois <pierre.gondois@arm.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
* DynamicTablesPkg: AcpiSsdtPcieLibArm: Support UID > 0xFJeff Brasen2022-07-192-2/+5
| | | | | | | | | | Add support for PCIe devices with UID > 0xF. This is done by using the next value in the name so PCI5, PC26, etc Signed-off-by: Jeff Brasen <jbrasen@nvidia.com> Reviewed-by: Pierre Gondois <pierre.gondois@arm.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
* DynamicTablesPkg: AcpiSsdtPcieLibArm: Correct translation valueJeff Brasen2022-07-191-6/+12
| | | | | | | | The translation value in ACPI should be the difference between the CPU and PCIe address. Signed-off-by: Jeff Brasen <jbrasen@nvidia.com> Reviewed-by: Pierre Gondois <pierre.gondois@arm.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
* DynamicTablesPkg: Fix generated _HID value for SBSAPierre Gondois2022-07-181-1/+2
| | | | | | | | | | | | | SSDT tables describing an SBSA compatible serial port receive an '_HID' value of 'ARMH0011'. This value represents a PL011 serial port. This patch: - Generates an 'ARMHB000' instead - References the 'ACPI for Arm Components 1.0 - 2020' document specifying the '_HID' values to use. Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
* DynamicTables: Fix DT PCI interrupt flags parsingPierre Gondois2022-07-182-2/+2
| | | | | | | | | | | | | | | | | Device Tree PCI interrupt flags use the convention described at linux/Documentation/devicetree/bindings/interrupt-controller/arm,gic.yaml The 3rd cell is the flags, encoded as follows: bits[3:0] trigger type and level flags. 1 = low-to-high edge triggered 2 = high-to-low edge triggered (invalid for SPIs) 4 = active high level-sensitive 8 = active low level-sensitive (invalid for SPIs). Fix the incorrect code. Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
* DynamicTablesPkg: Add support to specify FADT minor revisionSami Mujawar2022-07-151-2/+27
| | | | | | | | | | | | | | | | | | | | | | | | | | The CM_STD_OBJ_ACPI_TABLE_INFO.AcpiTableRevision can be used to specify the major revision number of the ACPI table that the generator must use. Although most ACPI tables only have a major revision number, the FADT table additionally has a minor revision number. The FADT generator currently defaults to setting the latest supported ACPI revision for the FADT table i.e. ACPI 6.4. This means that the minor revision for the FADT table is always set to 4 and there is no provision for a user to specify the minor revision to be selected. Therefore, update CM_STD_OBJ_ACPI_TABLE_INFO to introduce a new field MinorRevision which can be used to specify the minor revision for an ACPI table. Also update the FADT generator to validate the supported FADT revisions ans use the specified minor revision for the FADT table if supported. If an unsupported minor revision is specified the FADT generator defaults to the latest supported minor revision. Since the CM_STD_OBJ_ACPI_TABLE_INFO.MinorRevision field is added to the end of the structure, it should not break existing platform code. Signed-off-by: Sami Mujawar <sami.mujawar@arm.com> Reviewed-by: <pierre.gondois@arm.com> Tested-by: Jagadeesh Ujja <Jagadeesh.Ujja@arm.com>
* DynamicTablesPkg: Fix serial port namespace path in DBG2Sami Mujawar2022-03-151-3/+7
| | | | | | | | | | | | | | | | | | | | According to the Debug Port Table 2 (DBG2) specification, February 17, 2021, the NamespaceString is a NULL terminated ASCII string that consists of a fully qualified reference to the object that represents the serial port device in the ACPI namespace. The DBG2 table generator did not populate the full device path for the serial port device, and this results in a FWTS test failure. Therefore, populate the full namespace device path for the serial port in DBG2 table. Signed-off-by: Sami Mujawar <sami.mujawar@arm.com> Reviewed-by: Pierre Gondois <pierre.gondois@arm.com> Tested-by: Jagadeesh Ujja <Jagadeesh.Ujja@arm.com> Tested-by: Sunny Wang <sunny.wang@arm.com>
* DynamicTablesPkg: Add AmlCodeGenMethodRetInteger functionRebecca Cran2022-02-021-0/+159
| | | | | | | | | Add AmlCodeGenMethodRetInteger function to generate AML code for a Method returning an Integer. Signed-off-by: Rebecca Cran <quic_rcran@quicinc.com> Reviewed-by: Pierre Gondois <pierre.gondois@arm.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
* DynamicTablesPkg: Remove redundant cast in AmlCodeGenReturnRebecca Cran2022-02-021-1/+1
| | | | | | | | | | In AmlCodeGenReturn, the cast to AML_NODE_HEADER* in the call to AmlSetFixedArgument is redundant because ReturnNode is already a AML_NODE_HEADER* . Signed-off-by: Rebecca Cran <quic_rcran@quicinc.com> Reviewed-by: Pierre Gondois <pierre.gondois@arm.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
* DynamicTablesPkg: Add Memory32Fixed functionRebecca Cran2022-02-021-0/+58
| | | | | | | | | Add a Memory32Fixed function to generate code for the corresponding Memory32Fixed macro in AML. Signed-off-by: Rebecca Cran <quic_rcran@quicinc.com> Reviewed-by: Pierre Gondois <pierre.gondois@arm.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
* DynamicTablesPkg: AcpiSsdtPcieLibArm: Remove link device generationPierre Gondois2022-02-012-288/+15
| | | | | | | | | | | | | | | | | | | | | | | | In ACPI 6.4, s6.2.13, _PRT objects describing PCI legacy interrupts can be defined following 2 models. In the first model, _PRT entries reference link devices. Link devices then describe interrupts. This allows to dynamically modify interrupts through _SRS and _PRS objects and to choose exactly the interrupt type (level/edge triggered, active high/low). In the second model, interrupt numbder are described in the _PRT entry. The interrupt type is then assumed by the OS. The Arm BSA, sE.6 "Legacy interrupts" states that PCI legacy interrupts must be converted to SPIs, and programmed level-sensitive, active high. Thus any OS must configure interrupts as such and there is no need to specify the interrupt type. Plus it is not possible to dynamically configure PCI interrupts. Thus remove the link device generation and use the second model for _PRT. Suggested-by: Ard Biesheuvel <ardb+tianocore@kernel.org> Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com> Reviewed-by: Ard Biesheuvel <ardb@kernel.org>
* DynamicTablesPkg: AmlLib: AmlAddPrtEntry() to handle GSIPierre Gondois2022-02-011-34/+55
| | | | | | | | | | | | | | | | | In ACPI 6.4, s6.2.13, _PRT objects describing PCI legacy interrupts can be defined following 2 models. In the first model, _PRT entries reference link devices. Link devices then describe interrupts. This allows to dynamically modify interrupts through _SRS and _PRS objects and to choose exactly the interrupt type (level/edge triggered, active high/low). In the second model, interrupt numbers are described in the _PRT entry. The interrupt type is then assumed by the OS. AmlAddPrtEntry() currently only handles the first model. Make changes to also handle the second model. Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com> Reviewed-by: Ard Biesheuvel <ardb@kernel.org>
* DynamicTablesPkg: FdtHwInfoParserLib: Parse Pmu infoPierre Gondois2022-02-012-4/+136
| | | | | | | | Parse the Pmu interrupts if a pmu compatible node is present, and populate the MADT GicC structure accordingly. Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com> Reviewed-by: Ard Biesheuvel <ardb@kernel.org>
* DynamicTablesPkg: Add DynamicPlatRepo libraryPierre Gondois2021-12-143-0/+632
| | | | | | | | | | | | | | | | | | | | The DynamicPlatRepo library allows to handle dynamically created CmObj. The dynamic platform repository can be in the following states: 1 - Non-initialised 2 - Transient: Possibility to add CmObj to the platform, but not to query them. 3 - Finalised: Possibility to query CmObj, but not to add new. A token is allocated to each CmObj added to the dynamic platform repository (except for reference tokens CmObj). This allows to retrieve dynamic CmObjs among all CmObj (static CmObj for instance). This patch add the inf file of the module and the main module functionnalities and update the dsc file of the package. Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
* DynamicTablesPkg: DynamicPlatRepo: Add TokenMapperPierre Gondois2021-12-142-0/+347
| | | | | | | | | | | | | | | | | | | | The DynamicPlatRepo library allows to handle dynamically created CmObj. The dynamic platform repository can be in the following states: 1 - Non-initialised 2 - Transient: Possibility to add CmObj to the platform, but not to query them. 3 - Finalised: Possibility to query CmObj, but not to add new. A token is allocated to each CmObj added to the dynamic platform repository (except for reference tokens CmObj). This allows to retrieve dynamic CmObjs among all CmObj (static CmObj for instance). This patch add the TokenMapper files, allowing to retrieve a CmObj from a token/CmObjId couple. Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
* DynamicTablesPkg: DynamicPlatRepo: Add TokenFixerPierre Gondois2021-12-142-0/+217
| | | | | | | | | | | | | | | | | | | | The DynamicPlatRepo library allows to handle dynamically created CmObj. The dynamic platform repository can be in the following states: 1 - Non-initialised 2 - Transient: Possibility to add CmObj to the platform, but not to query them. 3 - Finalised: Possibility to query CmObj, but not to add new. A token is allocated to each CmObj added to the dynamic platform repository (except for reference tokens CmObj). This allows to retrieve dynamic CmObjs among all CmObj (static CmObj for instance). This patch add the TokenFixer files, allowing to update the self-token some CmObj have. Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
* DynamicTablesPkg: DynamicPlatRepo: Add TokenGeneratorPierre Gondois2021-12-142-0/+55
| | | | | | | | | | | | | | | | | | | The DynamicPlatRepo library allows to handle dynamically created CmObj. The dynamic platform repository can be in the following states: 1 - Non-initialised 2 - Transient: Possibility to add CmObj to the platform, but not to query them. 3 - Finalised: Possibility to query CmObj, but not to add new. A token is allocated to each CmObj added to the dynamic platform repository (except for reference tokens CmObj). This allows to retrieve dynamic CmObjs among all CmObj (static CmObj for instance). This patch add the TokenGenerator files. Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
* DynamicTablesPkg: Handle 16550_WITH_GAS idPierre Gondois2021-12-141-1/+4
| | | | | | | | | | Handle the EFI_ACPI_DBG2_PORT_SUBTYPE_SERIAL_16550_WITH_GAS id when generating an AML description of a serial port. The same _HID/_CID as the EFI_ACPI_DBG2_PORT_SUBTYPE_SERIAL_FULL_16550 are generated. Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
* DynamicTablesPkg: Add FdtHwInfoParser libraryPierre Gondois2021-12-144-0/+328
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Hardware information parser is an optional module defined by the Dynamic Tables Framework. It can either parse an XML, a Device Tree or a Json file containing the platform hardware information to populate the platform information repository. FdtHwInfoParser library is an instance of a HwInfoParser that parses a Device Tree and populates the Configuration Manager Platform information repository. FdtHwInfoParser library is aimed at providing a solution for generating ACPI tables for Guest Partitions launched by virtual machine managers (VMMs). One such use case is Kvmtool where the Device Tree for the Guest is passed on to the firmware by Kvmtool. The Configuration Manager for Kvmtool firmware shall invoke the FdtHwInfoParser to parse the Device Tree to populate the hardware information in the Platform Info Repository. The Kvmtool Configuration Manager can the process this information to generate the required ACPI tables for the Guest VM. This approach also scales well if the number of CPUs or if the hardware configuration of the Guest partition is varied. FdtHwInfoParser thereby introduces 'Dynamic Tables for Virtual Machines'. Ref:https://bugzilla.tianocore.org/show_bug.cgi?id=3741 Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
* DynamicTablesPkg: FdtHwInfoParser: Add PCI config parserPierre Gondois2021-12-142-0/+956
| | | | | | | | | | | | | | | | | | | | | | | | On platforms that implement PCIe, the PCIe configuration space information must be described to a standards-based operating system in the Memory mapped configuration space base address Description (MCFG) table. The PCIe information is described in the platform Device Tree, the bindings for which can be found at: - linux/Documentation/devicetree/bindings/pci/ host-generic-pci.yaml The FdtHwInfoParser implements a PCI configuration space Parser that parses the platform Device Tree to create CM_ARM_PCI_CONFIG_SPACE_INFO objects which are encapsulated in a Configuration Manager descriptor object and added to the platform information repository. The platform Configuration Manager can then utilise this information when generating the MCFG table. Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
* DynamicTablesPkg: FdtHwInfoParser: Add GIC dispatcherPierre Gondois2021-12-142-0/+290
| | | | | | | | | The GIC Dispatcher is the top-level component that is responsible for invoking the respective parsers for GICC, GICD, GIC MSI Frame, GIC ITS and the GICR. Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
* DynamicTablesPkg: FdtHwInfoParser: Add GICR parserPierre Gondois2021-12-142-0/+285
| | | | | | | | | | | | | | | | | | | | | | | | | | | The GIC Redistributor (GICR) structure is part of the Multiple APIC Description Table (MADT) that enables the discovery of GIC Redistributor base addresses by providing the Physical Base Address of a page range containing the GIC Redistributors. More than one GICR Structure may be presented in the MADT. The GICR structures should only be used when describing GIC version 3 or higher. The GIC Redistributor information is described in the platform Device Tree, the bindings for which can be found at: - linux/Documentation/devicetree/bindings/interrupt-controller/ arm,gic-v3.yaml The FdtHwInfoParser implements a GIC Redistributor Parser that parses the platform Device Tree to create CM_ARM_GIC_REDIST_INFO objects which are encapsulated in a Configuration Manager descriptor object and added to the platform information repository. The platform Configuration Manager can then utilise this information when generating the MADT table. Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
* DynamicTablesPkg: FdtHwInfoParser: Add ITS parserPierre Gondois2021-12-142-0/+266
| | | | | | | | | | | | | | | | | | | | | | | | Arm GIC v3/v4 optionally includes support for GIC Interrupt Translation Service (ITS). The GIC ITS Structure is part of the Multiple APIC Description Table (MADT) that describes the GIC Interrupt Translation service to the OS. The GIC Interrupt Translation Service information is described in the platform Device Tree, the bindings for which can be found at: - linux/Documentation/devicetree/bindings/interrupt-controller/ arm,gic-v3.yaml The FdtHwInfoParser implements a GIC ITS Parser that parses the platform Device Tree to create CM_ARM_GIC_ITS_INFO objects which are encapsulated in a Configuration Manager descriptor object and added to the platform information repository. The platform Configuration Manager can then utilise this information when generating the MADT table. Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
* DynamicTablesPkg: FdtHwInfoParser: Add MSI Frame parserPierre Gondois2021-12-142-0/+267
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Arm GIC version 2 systems that support Message Signalled Interrupts implement GICv2m MSI frame(s). Each GICv2m MSI frame consists of a 4k page which includes registers to generate message signalled interrupts to an associated GIC distributor. The frame also includes registers to discover the set of distributor lines which may be signalled by MSIs from that frame. A system may have multiple MSI frames, and separate frames may be defined for secure and non-secure access. A MSI Frame structure is part of the Multiple APIC Description Table (MADT) and must only be used to describe non-secure MSI frames. The MSI Frame information is described in the platform Device Tree, the bindings for which can be found at: - linux/Documentation/devicetree/bindings/interrupt-controller/ arm,gic.yaml - linux/Documentation/devicetree/bindings/interrupt-controller/ arm,gic-v3.yaml The FdtHwInfoParser implements a MSI Frame Parser that parses the platform Device Tree to create CM_ARM_GIC_MSI_FRAME_INFO objects which are encapsulated in a Configuration Manager descriptor object and added to the platform information repository. The platform Configuration Manager can then utilise this information when generating the MADT table. Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
* DynamicTablesPkg: FdtHwInfoParser: Add GICD parserPierre Gondois2021-12-142-0/+221
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On ARM-based systems the Generic Interrupt Controller (GIC) manages interrupts on the system. Each interrupt is identified in the GIC by an interrupt identifier (INTID). ACPI GSIVs map one to one to GIC INTIDs for peripheral interrupts, whether shared (SPI) or private (PPI). The GIC distributor provides the routing configuration for the interrupts. The GIC Distributor (GICD) structure is part of the Multiple APIC Description Table (MADT) that describes the GIC distributor to the OS. The MADT table is a mandatory table required for booting a standards-based operating system. The GIC Distributor information is described in the platform Device Tree, the bindings for which can be found at: - linux/Documentation/devicetree/bindings/interrupt-controller/ arm,gic.yaml - linux/Documentation/devicetree/bindings/interrupt-controller/ arm,gic-v3.yaml The FdtHwInfoParser implements a GIC Distributor Parser that parses the platform Device Tree to create CM_ARM_GICD_INFO object which is encapsulated in a Configuration Manager descriptor object and added to the platform information repository. The platform Configuration Manager can then utilise this information when generating the MADT table. Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
* DynamicTablesPkg: FdtHwInfoParser: Add GICC parserPierre Gondois2021-12-142-0/+844
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The GIC CPU Interface (GICC) structure is part of the Multiple APIC Description Table (MADT) that describes the interrupt model for the platform. The MADT table is a mandatory table required for booting a standards-based operating system. Arm requires the GIC interrupt model, in which the logical processors are required to have a Processor Device object in the DSDT, and must convey each processor's GIC information to the OS using the GICC structure. The CPU and GIC information is described in the platform Device Tree, the bindings for which can be found at: - linux/Documentation/devicetree/bindings/arm/cpus.yaml - linux/Documentation/devicetree/bindings/interrupt-controller/ arm,gic.yaml - linux/Documentation/devicetree/bindings/interrupt-controller/ arm,gic-v3.yaml The FdtHwInfoParser implements a GIC CPU Interface Parser that parses the platform Device Tree to create CM_ARM_GICC_INFO objects which are encapsulated in a Configuration Manager descriptor object and added to the platform information repository. The platform Configuration Manager can then utilise this information when generating the MADT and the SSDT CPU information tables. Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
* DynamicTablesPkg: FdtHwInfoParser: Add Serial port parserPierre Gondois2021-12-142-0/+680
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Microsoft Debug Port Table 2 (DBG2), the Serial Port Console Redirector (SPCR) table are mandatory tables required for booting a standards-based operating system. The DBG2 table is used by the OS debugger while the SPCR table is used to configure the serial terminal. Additionally, the serial ports available on a platform for generic use also need to be described in DSDT/SSDT for an OS to be able to use the serial ports. The Arm Base System Architecture 1.0 specification a lists of supported serial port hardware for Arm Platforms. This list includes the following serial port UARTs: - SBSA/Generic UART - a fully 16550 compatible UART. Along, with these the PL011 UART is the most commonly used serial port hardware on Arm platforms. The serial port hardware information is described in the platform Device Tree, the bindings for which can be found at: - linux/Documentation/devicetree/bindings/serial/serial.yaml - linux/Documentation/devicetree/bindings/serial/8250.txt - linux/Documentation/devicetree/bindings/serial/arm_sbsa_uart.txt - linux/Documentation/devicetree/bindings/serial/pl011.yaml The FdtHwInfoParser implements a Serial Port Parser that parses the platform Device Tree to create CM_ARM_SERIAL_PORT_INFO objects with the following IDs: - EArmObjSerialConsolePortInfo (for use by SPCR) - EArmObjSerialDebugPortInfo (for use by DBG2) - EArmObjSerialPortInfo (for use as generic Serial Ports) The Serial Port for use by SPCR is selected by parsing the Device Tree for the '/chosen' node with the 'stdout-path' property. The next Serial Port is selected for use as the Debug Serial Port and the remaining serial ports are used as generic serial ports. The CM_ARM_SERIAL_PORT_INFO objects are encapsulated in Configuration Manager descriptor objects with the respective IDs and are added to the platform information repository. The platform Configuration Manager can then utilise this information when generating the DBG2, SPCR and the SSDT serial port tables. Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
* DynamicTablesPkg: FdtHwInfoParser: Generic Timer ParserPierre Gondois2021-12-142-0/+324
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Generic Timer Description Table (GTDT) is a mandatory table required for booting a standards-based operating system. It provides an OSPM with information about a system's Generic Timer configuration. The Generic Timer (GT) is a standard timer interface implemented on ARM processor-based systems. The GTDT provides OSPM with information about a system's GT interrupt configurations, for both per-processor timers, and platform (memory-mapped) timers. The Generic Timer information is described in the platform Device Tree. The Device Tree bindings for the Generic timers can be found at: - linux/Documentation/devicetree/bindings/timer/arm,arch_timer.yaml The FdtHwInfoParser implements a Generic Timer Parser that parses the platform Device Tree to create a CM_ARM_GENERIC_TIMER_INFO object. The CM_ARM_GENERIC_TIMER_INFO object is encapsulated in a Configuration Manager descriptor object and added to the platform information repository. The platform Configuration Manager can then utilise this information when generating the GTDT table. Note: The Generic Timer Parser currently does not support parsing of memory-mapped platform timers. Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
* DynamicTablesPkg: FdtHwInfoParser: Add Boot Arch parserPierre Gondois2021-12-142-0/+204
| | | | | | | | | | | | | | | | | | | | | | | | | | | The Fixed ACPI Description Table (FADT) is a mandatory table required for booting a standards-based operating system. The FADT table has an 'ARM Boot Architecture Flags' field that is used by an OS at boot time to determine the code path during boot. This field is used to specify if the platform complies with the PSCI specification. It is also used to describe the conduit (SMC/HVC) to be used for PSCI. The PSCI compliance information for a platform is described in the platform Device Tree, the bindings for which can be found at: - linux/Documentation/devicetree/bindings/arm/psci.yaml The FdtHwInfoParser implements a Boot Arch Parser that parses the platform Device Tree to create a CM_ARM_BOOT_ARCH_INFO object. The CM_ARM_BOOT_ARCH_INFO object is encapsulated in a Configuration Manager descriptor object and added to the platform information repository. The platform Configuration Manager can then utilise this information when generating the FADT table. Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
* DynamicTablesPkg: FdtHwInfoParser: Add FDT utility functionsPierre Gondois2021-12-142-0/+1381
| | | | | | | | | | | | The FdtHwInfoParser parses a platform Device Tree and populates the Platform Information repository with Configuration Manager objects. Therefore, add a set of helper functions to simplify parsing of the platform Device Tree. Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
* DynamicTablesPkg: FdtHwInfoParser: CM Object descriptor helperPierre Gondois2021-12-142-0/+437
| | | | | | | | | | | | | | | FdtHwInfoParserLib is an instance of the HwInfoParser. The FdtHwInfoParser parses a platform Device Tree and populates the Platform Information repository with Configuration Manager objects that describe the platform hardware. These Configuration Manager objects are encapsulated in Configuration Manager Object Descriptors. Therefore, add helper functions to create and free the Configuration Manager Object descriptors. Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
* DynamicTablesPkg: Fix multiple objects parsingPierre Gondois2021-12-131-1/+13
| | | | | | | | | When a CmObjDesc contains multiple objects, only the first one is parsed as the buffer doesn't progress. Fix this. Also check that the whole buffer has been parsed with an asset. Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
* DynamicTablesPkg: SSDT Pci express generatorPierre Gondois2021-12-134-0/+1710
| | | | | | | | | | | | | | | | This generator allows to generate a SSDT table describing a Pci express Bus. It uses the following CmObj: - EArmObjCmRef - EArmObjPciConfigSpaceInfo - EArmObjPciAddressMapInfo - EArmObjPciInterruptMapInfo REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3682 To: Sami Mujawar <sami.mujawar@arm.com> To: Alexei Fedorov <Alexei.Fedorov@arm.com> Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
* DynamicTablesPkg: Add Pci related objectsPierre Gondois2021-12-131-4/+30
| | | | | | | | | | | | | | Introduce the following CmObj in the ArmNameSpaceObjects: - CM_ARM_PCI_ADDRESS_MAP_INFO - CM_ARM_PCI_INTERRUPT_MAP_INFO These objects allow to describe address range mapping of Pci busses and interrupt mapping of Pci devices. To: Sami Mujawar <sami.mujawar@arm.com> To: Alexei Fedorov <Alexei.Fedorov@arm.com> Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
* DynamicTablesPkg: Add AmlAttachNode()Pierre Gondois2021-12-131-0/+36
| | | | | | | | | | | | | | | | | | | | | | | | This function allows to add a node as the last node of a parent node in an AML tree. For instance, ASL code corresponding to NewNode: Name (_UID, 0) ASL code corresponding to ParentNode: Device (PCI0) { Name(_HID, EISAID("PNP0A08")) } "AmlAttachNode (ParentNode, NewNode)" will result in: ASL code: Device (PCI0) { Name(_HID, EISAID("PNP0A08")) Name (_UID, 0) } To: Sami Mujawar <sami.mujawar@arm.com> To: Alexei Fedorov <Alexei.Fedorov@arm.com> Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
* DynamicTablesPkg: AML Code generation to add _PRT entriesPierre Gondois2021-12-131-0/+214
| | | | | | | | | | | | | _PRT entries can describe interrupt mapping for Pci devices. The object is described in ACPI 6.4 s6.2.13 "_PRT (PCI Routing Table)". Add AmlCodeGenPrtEntry() helper function to add _PRT entries to an existing _PRT object. To: Sami Mujawar <sami.mujawar@arm.com> To: Alexei Fedorov <Alexei.Fedorov@arm.com> Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
* DynamicTablesPkg: AML Code generation to create a named ResourceTemplate()Pierre Gondois2021-12-131-0/+56
| | | | | | | | | | | | | | Add AmlCodeGenNameResourceTemplate() to generate code for a ResourceTemplate(). AmlCodeGenNameResourceTemplate ("REST", ParentNode, NewObjectNode) is equivalent of the following ASL code: Name(REST, ResourceTemplate () {}) To: Sami Mujawar <sami.mujawar@arm.com> To: Alexei Fedorov <Alexei.Fedorov@arm.com> Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
* DynamicTablesPkg: AML Code generation to create a named Package()Pierre Gondois2021-12-131-0/+56
| | | | | | | | | | | | | Add AmlCodeGenNamePackage() to generate code for a Package(). AmlCodeGenNamePackage ("PACK", ParentNode, NewObjectNode) is equivalent of the following ASL code: Name(PACK, Package () {}) To: Sami Mujawar <sami.mujawar@arm.com> To: Alexei Fedorov <Alexei.Fedorov@arm.com> Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
* DynamicTablesPkg: AML Code generation for memory rangesPierre Gondois2021-12-131-0/+951
| | | | | | | | | | | | | | | | Add helper functions to generate AML Resource Data describing memory ranges. Memory ranges can be one, double or four words long. They can be of 'normal', IO or bus number memory type. The following APIs are exposed: - AmlCodeGenRdDWordIo () - AmlCodeGenRdDWordMemory () - AmlCodeGenRdWordBusNumber () - AmlCodeGenRdQWordMemory () To: Sami Mujawar <sami.mujawar@arm.com> To: Alexei Fedorov <Alexei.Fedorov@arm.com> Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
generated by cgit v1.2.3 (git 2.25.1) at 2024-08-01 15:36:28 +0000