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* DynamicTablesPkg: Allow for specified CPU namesJeff Brasen2022-12-193-11/+43
| | | | | | | | | | | | | | | Allow object to specify the name of processor and processor container nodes and the UID of processor containers. This allows these to be more accurately referenced from other tables. For example for the _PSL method or the UID in the APMT table. The UID and Name for processor container may be different as if the intention is to set names as the corresponding affinity level the UID may need to be different if there are multiple levels of containers. Signed-off-by: Jeff Brasen <jbrasen@nvidia.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
* DynamicTablesPkg: SSDT _LPI revision is incorrectJeff Brasen2022-12-141-1/+1
| | | | | | | | | _LPI Revision should be 0 per the ACPI 6.5 specification. "The revision number of the _LPI object. Current revision is 0." Signed-off-by: Jeff Brasen <jbrasen@nvidia.com> Reviewed-by: Pierre Gondois <pierre.gondois@arm.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
* DynamicTablesPkg: Remove duplicated wordsPierre Gondois2022-12-1310-10/+10
| | | | | | | | | | In an effort to clean the documentation of the above package, remove duplicated words. Cc: Sami Mujawar <Sami.Mujawar@arm.com> Cc: Alexei Fedorov <Alexei.Fedorov@arm.com> Signed-off-by: Pierre Gondois <pierre.gondois@arm.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
* DynamicTablesPkg: Readme.md: Update available tables for generationPierre Gondois2022-10-311-0/+3
| | | | | | | | | | | | The following tables can now be generated by the DynamicTablesPkg: - PCCT - PPTT - SRAT Update the documentation accordingly. Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
* DynamicTablesPkg/AmlLib: Allow larger AccessSize for Pcc address spacePierre Gondois2022-10-311-1/+6
| | | | | | | | | | For Pcc address space, the AccessSize field of a Register is used to delcare the Pcc Subspace Id. This Id can be up to 256. Cf. ACPI 6.4, s14.7 Referencing the PCC address space Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
* DynamicTablesPkg: Add PCCT GeneratorPierre Gondois2022-10-315-2/+1264
| | | | | | | | | | | | | | The Platform Communication Channel Table (PCCT) generator collates the relevant information required for generating a PCCT table from configuration manager using the configuration manager protocol. The DynamicTablesManager then install the PCCT table. From ACPI 6.4, s14 PLATFORM COMMUNICATIONS CHANNEL (PCC): The platform communication channel (PCC) is a generic mechanism for OSPM to communicate with an entity in the platform. Signed-off-by: Pierre Gondois <pierre.gondois@arm.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
* DynamicTablesPkg: Add PCCT related objectsPierre Gondois2022-10-312-43/+341
| | | | | | | | | | | | | | | | | | | | | Introduce the following CmObj in the ArmNameSpaceObjects: - CM_ARM_MAILBOX_REGISTER_INFO - CM_ARM_PCC_SUBSPACE_CHANNEL_TIMING_INFO - CM_ARM_PCC_SUBSPACE_GENERIC_INFO - CM_ARM_PCC_SUBPSACE_TYPE0_INFO - CM_ARM_PCC_SUBPSACE_TYPE1_INFO - CM_ARM_PCC_SUBPSACE_TYPE2_INFO - CM_ARM_PCC_SUBPSACE_TYPE3_INFO - CM_ARM_PCC_SUBPSACE_TYPE4_INFO - CM_ARM_PCC_SUBPSACE_TYPE5_INFO These objects allow to describe mailbox registers, pcc timings and PCCT subspaces. They prepare the enablement of a PCCT generator. Also add the CmObjParsers associated to each object. Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
* DynamicTablesPkg: Fix Ssdt PCI generation commentsPierre Gondois2022-10-312-7/+3
| | | | | | | | | | | | The second model of the _PRT object is used. Indeed: - the interrupts described are not re-configurable - OSes are aware of the polarity of PCI legacy interrupts, so there is no need to accurately describe the polarity. Also, fix a comment for the CM_ARM_PCI_INTERRUPT_MAP_INFO obj. Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
* DynamicTablesPkg: FdtHwInfoParserLib: Remove wrong commentPierre Gondois2022-10-312-6/+0
| | | | | | | | | commit 13136cc3111f ("DynamicTablesPkg: FdtHwInfoParserLib: Parse Pmu info") adds support for pmu parsing. Thus, remove the wrong comment. Signed-off-by: Pierre Gondois <pierre.gondois@arm.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
* DynamicTablesPkg: Remove deprecated APIsPierre Gondois2022-10-313-299/+0
| | | | | | | | | commit 691c5f776274 ("DynamicTablesPkg: Deprecate Crs specific methods in AmlLib") deprecates some APIs. Finally remove them. Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
* DynamicTablesPkg: Fix wrong/missing fields in CmObjParserPierre Gondois2022-10-311-11/+13
| | | | | | | | | | | Add missing fields to the following CmObjParser objects: - EArmObjGicDInfo - EArmObjCacheInfo and fix wrong formatting of: - EArmObjLpiInfo Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
* DynamicTablesPkg: Fix GTBlock and GTBlockTimerFrame CmObjParsersPierre Gondois2022-10-312-27/+27
| | | | | | | | | | | | | The CmObjParsers of the following objects was inverted, probably due to a wrong ordering placement in the file defining the structures: -EArmObjGTBlockTimerFrameInfo -EArmObjPlatformGTBlockInfo Assign the correct parser for each object, and re-order the structures in the file defining them. Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
* DynamicTablesPkg: Update CmObjParser for MinorRevisionPierre Gondois2022-10-311-1/+2
| | | | | | | | | | commit 0d23c447d6f5 ("DynamicTablesPkg: Add support to specify FADT minor revision") adds new 'MinorRevision' field to CM_STD_OBJ_ACPI_TABLE_INFO. Reflect the change in this patch to the CmObjectParser. Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
* DynamicTablesPkg: Update CmObjParser for IORT Rev E.dPierre Gondois2022-10-311-14/+45
| | | | | | | | | | commit de200b7e2c3c ("DynamicTablesPkg: Update ArmNameSpaceObjects for IORT Rev E.d") adds new CmObj structures and fields to the ArmNameSpaceObjects. Update the CmObjectParser accordingly. Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
* DynamicTablesPkg: Add PrintString to CmObjParserPierre Gondois2022-10-311-0/+26
| | | | | | | | | Add a PrintString to print strings in the CmObjParser. String must be NULL terminated and no buffer overrun check is done by this function. Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
* DynamicTablesPkg: Use correct print formatterPierre Gondois2022-10-311-7/+7
| | | | | | | | | In C, the 'long long' types are 64-bits. The 'll' printf length specifier should be used to pring these values. Just '%x' allows to print values that are on 16-bits or more. Use that instead. Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
* DynamicTablesPkg: SSDT CPU _CPC generatorJeff Brasen2022-09-231-6/+127
| | | | | | | | Add code to use a token attached to GICC to generate _CPC object on cpus. Signed-off-by: Jeff Brasen <jbrasen@nvidia.com> Reviewed-by: Pierre Gondois <pierre.gondois@arm.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
* DynamicTablesPkg: AML Code generation to add _CPC entriesJeff Brasen2022-09-232-0/+529
| | | | | | | | | | | | | _CPC entries can describe CPU performance information. The object is described in ACPI 6.4 s8.4.7.1. "_CPC (Continuous Performance Control)". Add AmlCreateCpcNode() helper function to add _CPC entries to an existing CPU object. Signed-off-by: Jeff Brasen <jbrasen@nvidia.com> Reviewed-by: Pierre Gondois <pierre.gondois@arm.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
* DynamicTablesPkg: Add CM_ARM_CPC_INFO objectJeff Brasen2022-09-233-34/+264
| | | | | | | | | | Introduce the CM_ARM_CPC_INFO CmObj in the ArmNameSpaceObjects. This allows to describe CPC information, as described in ACPI 6.4, s8.4.7.1 "_CPC (Continuous Performance Control)". Signed-off-by: Jeff Brasen <jbrasen@nvidia.com> Reviewed-by: Pierre Gondois <pierre.gondois@arm.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
* DynamicTablesPkg: AcpiSsdtPcieLibArm: Allow use of segment number as UIDJeff Brasen2022-09-153-1/+24
| | | | | | | | | | | Add support for selecting to use index or segment number as UID and name. This allows the path of the nodes to be well known. For example, if the PCIe node needs to be notified from by an interrupt for a Generic Event Device Signed-off-by: Jeff Brasen <jbrasen@nvidia.com> Reviewed-by: Pierre Gondois <pierre.gondois@arm.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
* DynamicTablesPkg/AcpiPpttLibArm: Fix debug macro argumentsMichael Kubacki2022-09-091-2/+1
| | | | | | | Cc: Sami Mujawar <Sami.Mujawar@arm.com> Cc: Alexei Fedorov <Alexei.Fedorov@arm.com> Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
* DynamicTablesPkg: Fix typo in AmlCodeGenRdMemory32Fixed doxygen commentRebecca Cran2022-09-011-1/+1
| | | | | | | Fix typo of "Address". Signed-off-by: Rebecca Cran <rebecca@quicinc.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
* DynamicTablesPkg: Fix nested processor containersJeff Brasen2022-09-011-44/+50
| | | | | | | | | | | | Current code will generate duplicate UID if there are nested processor containers in the topology. For example if there is a socket/cluster/core layout. Change references to processor container from cluster to be more accurate on what is being created. Signed-off-by: Jeff Brasen <jbrasen@nvidia.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
* DynamicTablesPkg: AcpiSsdtPcieLibArm : Add UID to slot creationJeff Brasen2022-09-013-7/+14
| | | | | | | | | | | | | | | | | | Expose the UID value to GeneratePciSlots(). This is needed for some cases for example: https://docs.microsoft.com/en-us/windows-hardware/drivers/pci/dsd-for-pcie-root-ports#identifying-externally-exposed-pcie-root-ports Name (_DSD, Package () { ToUUID("EFCC06CC-73AC-4BC3-BFF0-76143807C389"), Package () { Package (2) {"ExternalFacingPort", 1}, Package (2) {"UID", 0}, } }) Signed-off-by: Jeff Brasen <jbrasen@nvidia.com> Reviewed-by: Pierre Gondois <pierre.gondois@arm.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
* DynamicTablesPkg: Add support to build _DSDJeff Brasen2022-09-012-0/+306
| | | | | | | | | | | | Add APIs needed to build _DSD with different UUIDs. This is per ACPI specification 6.4 s6.2.5. Adds support for building data packages with format Package {"Name", Integer} Signed-off-by: Jeff Brasen <jbrasen@nvidia.com> Reviewed-by: Pierre Gondois <pierre.gondois@arm.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
* DynamicTablesPkg: AcpiSsdtPcieLibArm: Added function to reserve ECAM spaceKun Qin2022-09-011-0/+135
| | | | | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3998 Certain OSes will complain if the ECAM config space is not reserved in the ACPI namespace. This change adds a function to reserve PNP motherboard resources for a given PCI node. Co-authored-by: Joe Lopez <joelopez@microsoft.com> Signed-off-by: Kun Qin <kuqin12@gmail.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com> Tested-by: Sami Mujawar <sami.mujawar@arm.com>
* DynamicTablesPkg: DynamicTableManagerDxe: Added check for installed tablesKun Qin2022-09-012-81/+141
| | | | | | | | | | | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3997 This change added an extra step to allow check for installed ACPI tables. For FADT, MADT, GTDT, DSDT, DBG2 and SPCR tables, either pre-installed or supplied through AcpiTableInfo can be accepted. An extra check for FADT ACPI table existence during installation step is also added. Cc: Sami Mujawar <Sami.Mujawar@arm.com> Cc: Alexei Fedorov <Alexei.Fedorov@arm.com> Co-authored-by: Joe Lopez <joelopez@microsoft.com> Signed-off-by: Kun Qin <kuqin12@gmail.com> Reviewed-by: Pierre Gondois <pierre.gondois@arm.com> Reviewed-by: Sami Mujawar <sami.mujawar@Arm.com> Tested-by: Sami Mujawar <sami.mujawar@arm.com>
* DynamicTablesPkg: DynamicPlatRepoLib: Adding more token fixersKun Qin2022-09-011-3/+75
| | | | | | | | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3996 This change added more token fixers for other node types, including NamedComponentNode, RootComplexNode, and SmmuV3Node. The corresponding entries for tokenFixer functions table is also updated. Cc: Sami Mujawar <Sami.Mujawar@arm.com> Cc: Alexei Fedorov <Alexei.Fedorov@arm.com> Co-authored-by: Joe Lopez <joelopez@microsoft.com> Signed-off-by: Kun Qin <kuqin12@gmail.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com> Reviewed-by: Pierre Gondois <pierre.gondois@arm.com> Tested-by: Sami Mujawar <sami.mujawar@arm.com>
* DynamicTablesPkg: DynamicPlatRepoLib: Fix incorrect dereferencingKun Qin2022-09-011-1/+1
| | | | | | | | | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3996 The content of token should be derived from the data section of the `CmObject` instead of the object itself. This change fixed the issue by dereferencing the token value from the data buffer of input CmObject. Cc: Sami Mujawar <Sami.Mujawar@arm.com> Cc: Alexei Fedorov <Alexei.Fedorov@arm.com> Co-authored-by: Joe Lopez <joelopez@microsoft.com> Signed-off-by: Kun Qin <kuqin12@gmail.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com> Reviewed-by: Pierre Gondois <pierre.gondois@arm.com> Tested-by: Sami Mujawar <sami.mujawar@arm.com>
* DynamicTablesPkg: DynamicPlatRepoLib: Added MemoryAllocationLib to infKun Qin2022-09-011-0/+1
| | | | | | | | | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3996 The DynamicPlatRepoLib has multiple reference to MemoryAllocationLib, such as DynamicPlatRepo.c and TokenMapper.c. Not including it in the library inf file could lead to potential build break. This change added the MemoryAllocationLib into this inf file. Cc: Sami Mujawar <Sami.Mujawar@arm.com> Cc: Alexei Fedorov <Alexei.Fedorov@arm.com> Co-authored-by: Joe Lopez <joelopez@microsoft.com> Signed-off-by: Kun Qin <kuqin12@gmail.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com> Reviewed-by: Pierre Gondois <pierre.gondois@arm.com> Tested-by: Sami Mujawar <sami.mujawar@arm.com>
* DynamicTablesPkg: Fix using RmrNodeCount unitlitialisedEdward Pickup2022-08-061-1/+6
| | | | | | | | | Fix using RmrNodeCount uninitliased by initliasing it to zero. Also, add an additional check for ACPI version. This fixes a crash running on kvmtool. Signed-off-by: Edward Pickup <edward.pickup@arm.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
* DynamicTablesPkg: IORT generator updates for Rev E.d specSami Mujawar2022-07-292-50/+610
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Bugzilla: 3458 - Add support IORT Rev E.d specification updates (https://bugzilla.tianocore.org/show_bug.cgi?id=3458) The IO Remapping Table, Platform Design Document, Revision E.d, Feb 2022 (https://developer.arm.com/documentation/den0049/) introduces the following updates, collectively including the updates and errata fixes to Rev E, Rev E.a, Rev E.b, Rev E.c: - increments the IORT table revision to 5. - updates the node definition to add an 'Identifier' field. - adds definition of node type 6 - Reserved Memory Range node. - adds definition for Memory Range Descriptors. - adds flag to indicate PRI support for root complexes. - adds flag to indicate if the root complex supports forwarding of PASID information on translated transactions to the SMMU. - adds flag to indicate if the root complex supports PASID. - adds flags to define access privilege and attributes for the memory ranges. Therefore, update the IORT generator to: - increment IORT table revision count to 5. - populate Identifier filed if revision is greater than 4. - add support to populate Reserved Memory Range nodes and the Memory range descriptors. - add validation to check that the Identifier field is unique. - Populate the PASID capabilities and Flags field of the Root complex node. - Added checks to not generate IORT Rev E, Rev E.<a,b,c>. Signed-off-by: Sami Mujawar <sami.mujawar@arm.com> Reviewed-by: Pierre Gondois <pierre.gondois@arm.com>
* DynamicTablesPkg: Update ArmNameSpaceObjects for IORT Rev E.dSami Mujawar2022-07-292-1/+66
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Bugzilla: 3458 - Add support IORT Rev E.d specification updates (https://bugzilla.tianocore.org/show_bug.cgi?id=3458) The IO Remapping Table, Platform Design Document, Revision E.d, Feb 2022 (https://developer.arm.com/documentation/den0049/) introduces the following updates, collectively including the updates and errata fixes to Rev E, Rev E.a, Rev E.b, Rev E.c: - increments the IORT table revision to 5. - updates the node definition to add an 'Identifier' field. - adds definition of node type 6 - Reserved Memory Range node. - adds definition for Memory Range Descriptors. - adds flag to indicate PRI support for root complexes. - adds flag to indicate if the root complex supports forwarding of PASID information on translated transactions to the SMMU. - adds flag to indicate if the root complex supports PASID. - adds flags to define access privilege and attributes for the memory ranges. Therefore, update the Arm namespace objects to: - add Identifier field to IORT nodes. - introduce enums to represent RMR nodes and Memory Range descriptors. - add definition of node type 6 - Reserved Memory Range node. - add definition for Memory Range Descriptors. - add PASID capabilities and flags field to Root Complex node. Signed-off-by: Sami Mujawar <sami.mujawar@arm.com> Reviewed-by: Pierre Gondois <pierre.gondois@arm.com>
* MdePkg: IORT header update for IORT Rev E.d specSami Mujawar2022-07-291-10/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Bugzilla: 3458 - Add support IORT Rev E.d specification updates (https://bugzilla.tianocore.org/show_bug.cgi?id=3458) The IO Remapping Table, Platform Design Document, Revision E.d, Feb 2022 (https://developer.arm.com/documentation/den0049/) introduces the following updates, collectively including the updates and errata fixes to Rev E, Rev E.a, Rev E.b, Rev E.c: - increments the IORT table revision to 5. - updates the node definition to add an 'Identifier' field. - adds definition of node type 6 - Reserved Memory Range node. - adds definition for Memory Range Descriptors. - adds flag to indicate PRI support for root complexes. - adds flag to indicate if the root complex supports forwarding of PASID information on translated transactions to the SMMU. - adds flag to indicate if the root complex supports PASID. - adds flags to define access privilege and attributes for the memory ranges. Therefore, update the IORT header file to reflect these changes, and also rename the EFI_ACPI_IO_REMAPPING_TABLE_REVISION macro to EFI_ACPI_IO_REMAPPING_TABLE_REVISION_00. Also update the IORT generator in DynamicTablesPkg to fix the compilation errors so that Git Bisect can work. Signed-off-by: Sami Mujawar <sami.mujawar@arm.com> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn> Reviewed-by: Pierre Gondois <pierre.gondois@arm.com> Reviewed-by: Zhichao Gao <zhichao.gao@intel.com>
* DynamicTablesPkg: IORT set reference to interrupt array if presentSami Mujawar2022-07-291-30/+57
| | | | | | | | | | | | The IORT generator is populating the reference field for Context and PMU interrupts even if their count is zero. Update the IORT generator to set the references only if the interrupt count is not 0. Also add checks to ensure a valid reference token has been provided. Signed-off-by: Sami Mujawar <sami.mujawar@arm.com> Reviewed-by: Pierre Gondois <pierre.gondois@arm.com>
* DynamicTablesPkg: IORT set reference to Id array only if presentSami Mujawar2022-07-291-12/+15
| | | | | | | | | | | | | The IORT table generator is setting up a reference to ID array for nodes even when the ID Mapping count is zero. This is not an issue as an OS would only access the ID Reference if the ID mapping count is not zero. However, it would be good to set the reference to ID array to zero when the ID Mapping count is zero rather than populating it with an incorrect value. Signed-off-by: Sami Mujawar <sami.mujawar@arm.com> Reviewed-by: Pierre Gondois <pierre.gondois@arm.com>
* DynamicTablesPkg: Handle error when IdMappingToken is NULLSami Mujawar2022-07-291-16/+66
| | | | | | | | Add error handling when the IdMappingCount is not zero and the IdMappingToken is NULL. Signed-off-by: Sami Mujawar <sami.mujawar@arm.com> Reviewed-by: Pierre Gondois <pierre.gondois@arm.com>
* DynamicTablesPkg: AcpiSsdtPcieLibArm: Create support libraryJeff Brasen2022-07-1911-187/+337
| | | | | | | | | | Add support library to allow for customization of _OSC and slot info. The functions in the library are unchanged, with the exception of adding PciInfo pointer to the APIs. Signed-off-by: Jeff Brasen <jbrasen@nvidia.com> Reviewed-by: Pierre Gondois <pierre.gondois@arm.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
* DynamicTablesPkg: AcpiSsdtPcieLibArm: Support UID > 0xFJeff Brasen2022-07-192-2/+5
| | | | | | | | | | Add support for PCIe devices with UID > 0xF. This is done by using the next value in the name so PCI5, PC26, etc Signed-off-by: Jeff Brasen <jbrasen@nvidia.com> Reviewed-by: Pierre Gondois <pierre.gondois@arm.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
* DynamicTablesPkg: AcpiSsdtPcieLibArm: Correct translation valueJeff Brasen2022-07-191-6/+12
| | | | | | | | The translation value in ACPI should be the difference between the CPU and PCIe address. Signed-off-by: Jeff Brasen <jbrasen@nvidia.com> Reviewed-by: Pierre Gondois <pierre.gondois@arm.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
* DynamicTablesPkg: Fix generated _HID value for SBSAPierre Gondois2022-07-181-1/+2
| | | | | | | | | | | | | SSDT tables describing an SBSA compatible serial port receive an '_HID' value of 'ARMH0011'. This value represents a PL011 serial port. This patch: - Generates an 'ARMHB000' instead - References the 'ACPI for Arm Components 1.0 - 2020' document specifying the '_HID' values to use. Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
* DynamicTables: Fix DT PCI interrupt flags parsingPierre Gondois2022-07-182-2/+2
| | | | | | | | | | | | | | | | | Device Tree PCI interrupt flags use the convention described at linux/Documentation/devicetree/bindings/interrupt-controller/arm,gic.yaml The 3rd cell is the flags, encoded as follows: bits[3:0] trigger type and level flags. 1 = low-to-high edge triggered 2 = high-to-low edge triggered (invalid for SPIs) 4 = active high level-sensitive 8 = active low level-sensitive (invalid for SPIs). Fix the incorrect code. Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
* DynamicTablesPkg: Add support to specify FADT minor revisionSami Mujawar2022-07-152-3/+36
| | | | | | | | | | | | | | | | | | | | | | | | | | The CM_STD_OBJ_ACPI_TABLE_INFO.AcpiTableRevision can be used to specify the major revision number of the ACPI table that the generator must use. Although most ACPI tables only have a major revision number, the FADT table additionally has a minor revision number. The FADT generator currently defaults to setting the latest supported ACPI revision for the FADT table i.e. ACPI 6.4. This means that the minor revision for the FADT table is always set to 4 and there is no provision for a user to specify the minor revision to be selected. Therefore, update CM_STD_OBJ_ACPI_TABLE_INFO to introduce a new field MinorRevision which can be used to specify the minor revision for an ACPI table. Also update the FADT generator to validate the supported FADT revisions ans use the specified minor revision for the FADT table if supported. If an unsupported minor revision is specified the FADT generator defaults to the latest supported minor revision. Since the CM_STD_OBJ_ACPI_TABLE_INFO.MinorRevision field is added to the end of the structure, it should not break existing platform code. Signed-off-by: Sami Mujawar <sami.mujawar@arm.com> Reviewed-by: <pierre.gondois@arm.com> Tested-by: Jagadeesh Ujja <Jagadeesh.Ujja@arm.com>
* DynamicTablesPkg: Fix serial port namespace path in DBG2Sami Mujawar2022-03-151-3/+7
| | | | | | | | | | | | | | | | | | | | According to the Debug Port Table 2 (DBG2) specification, February 17, 2021, the NamespaceString is a NULL terminated ASCII string that consists of a fully qualified reference to the object that represents the serial port device in the ACPI namespace. The DBG2 table generator did not populate the full device path for the serial port device, and this results in a FWTS test failure. Therefore, populate the full namespace device path for the serial port in DBG2 table. Signed-off-by: Sami Mujawar <sami.mujawar@arm.com> Reviewed-by: Pierre Gondois <pierre.gondois@arm.com> Tested-by: Jagadeesh Ujja <Jagadeesh.Ujja@arm.com> Tested-by: Sunny Wang <sunny.wang@arm.com>
* DynamicTablesPkg: Add AmlCodeGenMethodRetInteger functionRebecca Cran2022-02-022-0/+206
| | | | | | | | | Add AmlCodeGenMethodRetInteger function to generate AML code for a Method returning an Integer. Signed-off-by: Rebecca Cran <quic_rcran@quicinc.com> Reviewed-by: Pierre Gondois <pierre.gondois@arm.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
* DynamicTablesPkg: Remove redundant cast in AmlCodeGenReturnRebecca Cran2022-02-021-1/+1
| | | | | | | | | | In AmlCodeGenReturn, the cast to AML_NODE_HEADER* in the call to AmlSetFixedArgument is redundant because ReturnNode is already a AML_NODE_HEADER* . Signed-off-by: Rebecca Cran <quic_rcran@quicinc.com> Reviewed-by: Pierre Gondois <pierre.gondois@arm.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
* DynamicTablesPkg: Add Memory32Fixed functionRebecca Cran2022-02-022-0/+91
| | | | | | | | | Add a Memory32Fixed function to generate code for the corresponding Memory32Fixed macro in AML. Signed-off-by: Rebecca Cran <quic_rcran@quicinc.com> Reviewed-by: Pierre Gondois <pierre.gondois@arm.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
* DynamicTablesPkg: AcpiSsdtPcieLibArm: Remove link device generationPierre Gondois2022-02-012-288/+15
| | | | | | | | | | | | | | | | | | | | | | | | In ACPI 6.4, s6.2.13, _PRT objects describing PCI legacy interrupts can be defined following 2 models. In the first model, _PRT entries reference link devices. Link devices then describe interrupts. This allows to dynamically modify interrupts through _SRS and _PRS objects and to choose exactly the interrupt type (level/edge triggered, active high/low). In the second model, interrupt numbder are described in the _PRT entry. The interrupt type is then assumed by the OS. The Arm BSA, sE.6 "Legacy interrupts" states that PCI legacy interrupts must be converted to SPIs, and programmed level-sensitive, active high. Thus any OS must configure interrupts as such and there is no need to specify the interrupt type. Plus it is not possible to dynamically configure PCI interrupts. Thus remove the link device generation and use the second model for _PRT. Suggested-by: Ard Biesheuvel <ardb+tianocore@kernel.org> Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com> Reviewed-by: Ard Biesheuvel <ardb@kernel.org>
* DynamicTablesPkg: AmlLib: AmlAddPrtEntry() to handle GSIPierre Gondois2022-02-011-34/+55
| | | | | | | | | | | | | | | | | In ACPI 6.4, s6.2.13, _PRT objects describing PCI legacy interrupts can be defined following 2 models. In the first model, _PRT entries reference link devices. Link devices then describe interrupts. This allows to dynamically modify interrupts through _SRS and _PRS objects and to choose exactly the interrupt type (level/edge triggered, active high/low). In the second model, interrupt numbers are described in the _PRT entry. The interrupt type is then assumed by the OS. AmlAddPrtEntry() currently only handles the first model. Make changes to also handle the second model. Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com> Reviewed-by: Ard Biesheuvel <ardb@kernel.org>
* DynamicTablesPkg: FdtHwInfoParserLib: Parse Pmu infoPierre Gondois2022-02-012-4/+136
| | | | | | | | Parse the Pmu interrupts if a pmu compatible node is present, and populate the MADT GicC structure accordingly. Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com> Reviewed-by: Ard Biesheuvel <ardb@kernel.org>