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* IntelFrameworkModulePkg: Fix UEFI and Tiano Decompression logic issueLiming Gao2018-11-111-0/+6
| | | | | | | | | | | | https://bugzilla.tianocore.org/show_bug.cgi?id=1317 This is a regression issue caused by 684db6da64bc7b5faee4e1174e801c245f563b5c. In Decode() function, once mOutBuf is fully filled, Decode() should return. Current logic misses the checker of mOutBuf after while() loop. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Yonghong Zhu <yonghong.zhu@intel.com>
* IntelFrameworkModulePkg: Add more checker in UefiTianoDecompressLib (CVE FIX)Liming Gao2018-10-241-2/+14
| | | | | | | | | | | | Fix CVE-2017-5731,CVE-2017-5732,CVE-2017-5733,CVE-2017-5734,CVE-2017-5735 https://bugzilla.tianocore.org/show_bug.cgi?id=686 To make sure the valid buffer be accessed only. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Holtsclaw Brent <brent.holtsclaw@intel.com> Signed-off-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com> Acked-by: Laszlo Ersek <lersek@redhat.com>
* IntelFrameworkModulePkg Lzma: Update LZMA SDK version to 18.05Liming Gao2018-10-0915-352/+773
| | | | | | | | | https://bugzilla.tianocore.org/show_bug.cgi?id=1006 New formal release in https://www.7-zip.org/sdk.html is 18.05. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com>
* IntelFrameworkModulePkg: Remove PalLib in dscChen A Chen2018-09-251-1/+0
| | | | | | | | | | | | | Remove PalLib in dsc which was missed at 64bbf1d. The PalLib is IPFspecific and will be removed from MdePkg. So this patch removes PalLib in IntelFrameworkModulePkg.dsc which was missed at 64bbf1dee2eca68d3410be9d05b2553da337051c. Cc: Liming Gao <liming.gao@intel.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Chen A Chen <chen.a.chen@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
* IntelFrameworkModulePkg: Avoid key notification called more than onceDandan Bi2018-09-142-0/+2
| | | | | | | | | | | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=996 Issue: In current code logic, when a key is pressed, it will search the whole NotifyList to find whether a notification has been registered with the keystroke. if yes, it will en-queue the key for notification execution later. And now if different notification functions have been registered with the same key, then the key will be en-queued more than once. Then it will cause the notification executed more than once. This patch is to enhance the code logic to fix this issue. Cc: Ruiyu Ni <ruiyu.ni@intel.com> Cc: Liming Gao <liming.gao@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Dandan Bi <dandan.bi@intel.com> Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
* IntelFrameworkModulePkg BdsDxe: Remove redundant functionsshenglei2018-08-237-324/+0
| | | | | | | | | | | | The redundant functions which are never called have been removed. They are GetProducerString,ChangeVariableDevicePath, EfiReallocatePool,Var_UpdateAllConsoleOption and BOpt_IsEfiApp. https://bugzilla.tianocore.org/show_bug.cgi?id=1063 Cc: Liming Gao <liming.gao@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: shenglei <shenglei.zhang@intel.com> Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
* IntelFrameworkModulePkg LegacyBiosDxe: Remove redundant LibraryClassesshenglei2018-08-232-4/+0
| | | | | | | | | | | The redundant LibraryClasses which are PeCoffLib and CacheMaintenanceLib have been removed. https://bugzilla.tianocore.org/show_bug.cgi?id=1063 Cc: Liming Gao <liming.gao@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: shenglei <shenglei.zhang@intel.com> Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
* IntelFrameworkModulePkg Snp16Dxe: Remove redundant functionsshenglei2018-08-232-271/+0
| | | | | | | | | | | | The redundant functions which are never called have been removed. They are PxeUndiSetMcastAddr, PxeUndiInitiateDiags,PxeUndiGetState PxeUndiForceInterrupt and PxeUndiSetPacketFilter. https://bugzilla.tianocore.org/show_bug.cgi?id=1063 Cc: Liming Gao <liming.gao@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: shenglei <shenglei.zhang@intel.com> Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
* IntelFrameworkModulePkg IdeBusDxe: Remove redundant functionsshenglei2018-08-234-517/+0
| | | | | | | | | | | | | The redundant functions which are never called have been removed. They are AtaNonDataCommandInExt,IDEBusDriverConfigurationSetOptions, GetResponse,IDEBusDriverConfigurationOptionsValid and IDEBusDriverConfigurationForceDefaults. https://bugzilla.tianocore.org/show_bug.cgi?id=1063 Cc: Liming Gao <liming.gao@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: shenglei <shenglei.zhang@intel.com> Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
* IntelFrameworkModulePkg Ps2KeyboardDxe: Remove a redundant functionshenglei2018-08-232-36/+0
| | | | | | | | | | | The redundant function DisableKeyboard which is never called has been removed. https://bugzilla.tianocore.org/show_bug.cgi?id=1063 Cc: Liming Gao <liming.gao@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: shenglei <shenglei.zhang@intel.com> Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
* IntelFrameworkModulePkg IsaIoDxe: Remove a redundant protocolshenglei2018-08-232-2/+0
| | | | | | | | | | Remove a redundant protocol which is gEfiGenericMemTestProtocolGuid. https://bugzilla.tianocore.org/show_bug.cgi?id=1063 Cc: Liming Gao <liming.gao@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: shenglei <shenglei.zhang@intel.com> Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
* IntelFrameworkModulePkg/Csm: Set CSM memory executableRuiyu Ni2018-08-161-8/+26
| | | | | | | | | | | | | | | | | | | | | Commit b22a62be5cdc8fd19d87ec1ecfa5b28fb9be50ad * IntelFrameworkModule/LegacyBios:Use reserved memory for legacy data allocates reserved memory for holding legacy code/data. But with PcdDxeNxMemoryProtectionPolicy set to certain value to forbid execution when code is in certain type of memory, it's possible that a platform forbids execution when code is in reserved memory. The patch calls GCD service to allow such case otherwise CPU exception may occur. Code execution in BSCode area should be enabled by platform by default. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com> Acked-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Jian Wang <jian.j.wang@intel.com>
* IntelFrameworkModulePkg: Removing ipf from edk2.chenc22018-06-2942-1714/+53
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Removing rules for Ipf sources file: * Remove the source file which path with "ipf" and also listed in [Sources.IPF] section of INF file. * Remove the source file which listed in [Components.IPF] section of DSC file and not listed in any other [Components] section. * Remove the embedded Ipf code for MDE_CPU_IPF. Removing rules for Inf file: * Remove IPF from VALID_ARCHITECTURES comments. * Remove DXE_SAL_DRIVER from LIBRARY_CLASS in [Defines] section. * Remove the INF which only listed in [Components.IPF] section in DSC. * Remove statements from [BuildOptions] that provide IPF specific flags. * Remove any IPF sepcific sections. Removing rules for Dec file: * Remove [Includes.IPF] section from Dec. Removing rules for Dsc file: * Remove IPF from SUPPORTED_ARCHITECTURES in [Defines] section of DSC. * Remove any IPF specific sections. * Remove statements from [BuildOptions] that provide IPF specific flags. Cc: Liming Gao <liming.gao@intel.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Chen A Chen <chen.a.chen@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
* IntelFrameworkModulePkg: Clean up source filesLiming Gao2018-06-28246-4069/+4069
| | | | | | | | | 1. Do not use tab characters 2. No trailing white space in one line 3. All files must end with CRLF Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Liming Gao <liming.gao@intel.com>
* IntelFrameworkModulePkg: Remove X86 ASM and S filesLiming Gao2018-06-075-288/+1
| | | | | | | | | | | | NASM has replaced ASM and S files. 1. Remove ASM from all modules. 2. Remove S files from the drivers only. 3. https://bugzilla.tianocore.org/show_bug.cgi?id=881 After NASM is updated, S files can be removed from Library. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Michael Kinney <michael.d.kinney@intel.com>
* IntelFrameworkModule/LegacyBios: Use reserved memory for legacy dataRuiyu Ni2018-05-092-9/+18
| | | | | | | | | | | Certain Legacy USB implementation needs to access legacy data (BDA, etc.) from SMM environment. While currently it's not allowed to access BS memory from SMM after EndofDxe, change the legacy data to use reserved memory type. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com>
* IntelFrameworkModulePkg/LegacyBootMaintUiLib: Update RouteConfig functionThomas Palmer2018-05-031-0/+3
| | | | | | | | | | | According to UEFI spec, the RouteConfig protocol function should populate the Progress pointer with an address inside Configuration. This patch ensures that these functions are compliant when EFI_NOT_FOUND is returned. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Thomas Palmer <thomas.palmer@hpe.com> Reviewed-by: Dandan Bi <dandan.bi@intel.com> Reviewed-by: Eric Dong <eric.dong@intel.com>
* IntelFrameworkModulePkg IsaSerialDxe: Update algorithm to calculate DivisorLiming Gao2018-04-181-2/+2
| | | | | | | | | | To align the way in MdeModulePkg SerialPortLib and PciSioSerialDxe driver, Divisor is added by one when the reminder is more than half (16 * BaudRate). Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Liming Gao <liming.gao@intel.com> Cc: Ruiyu Ni <ruiyu.ni@intel.com> Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
* IntelFrameworkModulePkg/GenericBdsLib: Remove the useless Perf codesDandan Bi2018-02-124-335/+26
| | | | | | | | | | | | | | Our new performance infrastructure (edk2 trunk commit hash value: SHA-1: 73fef64f14d1b97ae9bd4705df3becc022391eba ~ SHA-1: 115eae650bfd2be2c2bc37360f4a755065e774c4) can support to dump performance date form ACPI table in OS. So we can remove the old perf code to write performance data to OS. Cc: Liming Gao <liming.gao@intel.com> Cc: Star Zeng <star.zeng@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Dandan Bi <dandan.bi@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com>
* IntelFrameworkModulePkg/BdsDxe: Remove the useless Perf codesDandan Bi2018-02-123-60/+3
| | | | | | | | | | | | | | Our new performance infrastructure (edk2 trunk commit hash value: SHA-1: 73fef64f14d1b97ae9bd4705df3becc022391eba ~ SHA-1: 115eae650bfd2be2c2bc37360f4a755065e774c4) can support to dump performance date form ACPI table in OS. So we can remove the old perf code to write performance data to OS. Cc: Liming Gao <liming.gao@intel.com> Cc: Star Zeng <star.zeng@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Dandan Bi <dandan.bi@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com>
* IntelFrameworkModulePkg/GenericBdsLib: Use BmpSupportLibMichael D Kinney2018-02-114-250/+10
| | | | | | | | | | | | | | | | | | | | https://bugzilla.tianocore.org/show_bug.cgi?id=800 Based on content from the following branch/commits: https://github.com/Microsoft/MS_UEFI/tree/share/MsCapsuleSupport https://github.com/Microsoft/MS_UEFI/commit/33bab4031a417d7d5a7d356c15a14c2e60302b2d https://github.com/Microsoft/MS_UEFI/commit/ca516b1a61315c2d823f453e12d2135098f53d61 https://github.com/Microsoft/MS_UEFI/commit/2b9f111f2e74a4c2ef4c4e32379e111f016dbd9b Update GenericBdsLib to use BmpSupportLib to convert a BMP graphics image to a GOP BLT Buffer to display the boot logo. Cc: Sean Brogan <sean.brogan@microsoft.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Liming Gao <liming.gao@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com> Reviewed-by: Bret Barkelew <Bret.Barkelew@microsoft.com>
* IntelFrameworkModule/ThunkKb: ReadKeyStrokeEx always return key stateRuiyu Ni2018-02-012-4/+15
| | | | | | | | | | | | | | Today's implementation only return key state when there is a key. But when user doesn't press any key, the key state cannot be returned. The patch changes the ReadKeyStrokeEx() to always return the key state even there is no key pressed. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com> Cc: Michael D Kinney <michael.d.kinney@intel.com>
* IntelFrameworkModule/Ps2Kb: ReadKeyStrokeEx always return key stateRuiyu Ni2018-02-013-24/+54
| | | | | | | | | | | | | | Today's implementation only return key state when there is a key. But when user doesn't press any key, the key state cannot be returned. The patch changes the ReadKeyStrokeEx() to always return the key state even there is no key pressed. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com> Cc: Michael D Kinney <michael.d.kinney@intel.com>
* IntelFrameworkModulePkg/KeyboardDxe: Use macro to enable/disable page 0Jian J Wang2017-12-082-109/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Current implementation uses following two methods EnableNullDetection() DisableNullDetection() to enable/disable page 0. These two methods will check PCD PcdNullPointerDetectionPropertyMask to know if the page 0 is disabled or not. This is due to the fact that old GCD service doesn't provide paging related attributes of memory block. Since this issue has been fixed, GCD services can be used to determine the paging status of page 0. This is also make it possible to just use a new macro ACCESS_PAGE0_CODE( <code accessing page 0> ); to replace above methods to do the same job, which also makes code more readability. Cc: Liming Gao <liming.gao@intel.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Ruiyu Ni <ruiyu.ni@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Jian J Wang <jian.j.wang@intel.com> Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
* IntelFrameworkModulePkg/LegacyBios: Use macro to enable/disable page 0Jian J Wang2017-12-087-273/+135
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Current implementation uses following two methods EnableNullDetection() DisableNullDetection() to enable/disable page 0. These two methods will check PCD PcdNullPointerDetectionPropertyMask to know if the page 0 is disabled or not. This is due to the fact that old GCD service doesn't provide paging related attributes of memory block. Since this issue has been fixed, GCD services can be used to determine the paging status of page 0. This is also make it possible to just use a new macro ACCESS_PAGE0_CODE( <code accessing page 0> ); to replace above methods to do the same job, which also makes code more readability. Cc: Liming Gao <liming.gao@intel.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Ruiyu Ni <ruiyu.ni@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Jian J Wang <jian.j.wang@intel.com> Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
* IntelFrameworkModulePkg: Fix MSFT C4255 warningSong, BinX2017-11-143-0/+3
| | | | | | | | | | | | | | | | | | V2: Fix MSFT C4255 warning V1: Enable MSFT C4255 warning. From MSDN: Compiler Warning (level 4) C4255 function' : no function prototype given: converting '()' to '(void)' The compiler did not find an explicit list of arguments to a function. This warning is for the C compiler only. Cc: Liming Gao <liming.gao@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Bell Song <binx.song@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
* IntelFrameworkModulePkg: Fix misuses of AllocateCopyPoolJian J Wang2017-11-081-5/+5
| | | | | | | | | | | | | | | | AllocateCopyPool(AllocationSize, *Buffer) will copy "AllocationSize" bytes of memory from old "Buffer" to new allocated one. If "AllocationSize" is bigger than size of "Buffer", heap memory overflow occurs during copy. One solution is to allocate pool first then copy the necessary bytes to new memory. Another is using ReallocatePool instead if old buffer will be freed on spot. Cc: Liming Gao <liming.gao@intel.com> Cc: Bi Dandan <dandan.bi@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Jian J Wang <jian.j.wang@intel.com> Reviewed-by: Bi Dandan <dandan.bi@intel.com>
* IntelFrameworkModule/LegacyBios: Avoid explicit comparison for BOOLEANDandan Bi2017-10-241-2/+2
| | | | | | | | Cc: Jian J Wang <jian.j.wang@intel.com> Cc: Liming Gao <liming.gao@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Dandan Bi <dandan.bi@intel.com> Reviewed-by: Jian J Wang <jian.j.wang@intel.com>
* IntelFrameworkModulePkg/Csm: Refine coding style in commentsDandan Bi2017-10-243-12/+12
| | | | | | | | | | | | Make the comments follow Edk2 coding style: 1. Make the comments starts with /** and end with **/. 2. Make the comments descrition end with '.' Cc: Jian J Wang <jian.j.wang@intel.com> Cc: Liming Gao <liming.gao@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Dandan Bi <dandan.bi@intel.com> Reviewed-by: Jian J Wang <jian.j.wang@intel.com>
* IntelFrameworkModulePkg/LegacyBiosDxe: Fix GCC5 build warningJian J Wang2017-10-121-3/+0
| | | | | | | | | Cc: Laszlo Ersek <lersek@redhat.com> Cc: Liming Gao <liming.gao@intel.com> Cc: Dandan Bi <dandan.bi@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Jian J Wang <jian.j.wang@intel.com> Reviewed-by: Dandan Bi <dandan.bi@intel.com>
* IntelFrameworkModulePkg/Csm: Add code to bypass NULL pointer detectionJian J Wang2017-10-1110-10/+338
| | | | | | | | | | | | | | | | | | Legacy has to access interrupt vector, BDA, etc. located in memory between 0-4095. To allow as much code as possible to be monitored by NULL pointer detection, we add code to temporarily disable this feature right before those memory access and enable it again afterwards. Cc: Star Zeng <star.zeng@intel.com> Cc: Eric Dong <eric.dong@intel.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Michael Kinney <michael.d.kinney@intel.com> Cc: Ayellet Wolman <ayellet.wolman@intel.com> Suggested-by: Ayellet Wolman <ayellet.wolman@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Jian J Wang <jian.j.wang@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com>
* IntelFrameworkModulePkg FwVolDxe: Get FV auth status propagated from PEIStar Zeng2017-10-103-23/+57
| | | | | | | | | | | | | FV3 HOB was introduced by new (>= 1.5) PI spec, it is intended to be used to propagate PEI-phase FV authentication status to DXE. This patch is to update FwVolDxe to get the authentication status propagated from PEI-phase to DXE by FV3 HOB when producing FV protocol. Cc: Liming Gao <liming.gao@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Star Zeng <star.zeng@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
* IntelFrameworkModulePkg FwVolDxe: Support FFS_ATTRIB_DATA_ALIGNMENT_2Star Zeng2017-09-262-14/+62
| | | | | | | | | | Follow PI 1.6 spec to support FFS_ATTRIB_DATA_ALIGNMENT_2 for FFS alignment extended to support maximum 16MB. Cc: Liming Gao <liming.gao@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Star Zeng <star.zeng@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
* IntelFramdworkModulePkg/LegacyBios: Add IoMmu Support.Jiewen Yao2017-09-063-1/+73
| | | | | | | | | | | If IOMMU is enabled, the legacy BIOS need allow the legacy memory access by the legacy device. The legacy memory is below 1M memory and HighPmm memory. Cc: Star Zeng <star.zeng@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Jiewen Yao <jiewen.yao@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com>
* IntelFrameworkModulePkg/LegacyBootMaintUiLib: Add NULL pointer checkBi, Dandan2017-08-281-2/+2
| | | | | | | | | | | | mLegacyBootOptionPrivate pointer is initialized in Constructor function with if condition check, but it's used in Destructor function directly without any check. Now add the NULL pointer check. Cc: Eric Dong <eric.dong@intel.com> Cc: Liming Gao <liming.gao@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Dandan Bi <dandan.bi@intel.com> Reviewed-by: Eric Dong <eric.dong@intel.com>
* IntelFrameworkModulePkg: Fix Xcode 9 Beta treating 32-bit left shift as ↵Andrew Fish2017-08-111-3/+3
| | | | | | | | | | | | | undefined Bug: https://bugzilla.tianocore.org/show_bug.cgi?id=635 Cc: Liming Gao <liming.gao@intel.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Jeff Fan <jeff.fan@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Andrew Fish <afish@apple.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
* edk2: Move License.txt file to rootMichael D Kinney2017-08-031-25/+0
| | | | | | | | | | | | | | | | | | | https://bugzilla.tianocore.org/show_bug.cgi?id=642 Add top level License.txt file with the BSD 2-Clause License that is used by the majority of the EKD II open source project content. Merge copyright statements from the BSD 2-Clause License files in each package directory and remove the duplication License.txt file from package directories. Cc: Leif Lindholm <leif.lindholm@linaro.org> Cc: Andrew Fish <afish@apple.com> Cc: Jordan Justen <jordan.l.justen@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com> Reviewed-by: Jordan Justen <jordan.l.justen@intel.com> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
* edk2: Move TianoCore Contribution Agreement to rootMichael D Kinney2017-08-031-218/+0
| | | | | | | | | | | | | | | | | https://bugzilla.tianocore.org/show_bug.cgi?id=629 Move Contributions.txt that contains the TianoCore Contribution Agreement 1.0 to the root of the edk2 repository and remove the duplicate Contributions.txt files from all packages. Cc: Leif Lindholm <leif.lindholm@linaro.org> Cc: Andrew Fish <afish@apple.com> Cc: Jordan Justen <jordan.l.justen@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com> Reviewed-by: Jordan Justen <jordan.l.justen@intel.com> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
* IntelFrameworkModulePkg: Update comments in SimpleTextInExDandan Bi2017-06-204-18/+33
| | | | | | | | | | | | Update comments in SimpleTextInEx according to UEFI 2.7. Cc: Star Zeng <star.zeng@intel.com> Cc: Ruiyu Ni <ruiyu.ni@intel.com> Cc: Jeff Fan <jeff.fan@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Dandan Bi <dandan.bi@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com> Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
* IntelFrameworkModulePkg/IdeBusDxe: Fix undefined behavior in signed left shiftHao Wu2017-04-131-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In function AtapiReadCapacity(), the following expression: IdeDev->BlkIo.Media->LastBlock = (Data.LastLba3 << 24) | (Data.LastLba2 << 16) | (Data.LastLba1 << 8) | Data.LastLba0; (There is also a similar case in this function.) will involve undefined behavior in signed left shift operations. Since Data.LastLbaX is of type UINT8, and IdeDev->BlkIo.Media->LastBlock is of type UINT64. Therefore, Data.LastLbaX will be promoted to int (32 bits, signed) first, and then perform the left shift operation. According to the C11 spec, Section 6.5.7: 4 The result of E1 << E2 is E1 left-shifted E2 bit positions; vacated bits are filled with zeros. If E1 has an unsigned type, the value of the result is E1 * 2^E2 , reduced modulo one more than the maximum value representable in the result type. If E1 has a signed type and nonnegative value, and E1 * 2^E2 is representable in the result type, then that is the resulting value; otherwise, the behavior is undefined. So if bit 7 of Data.LastLba3 is 1, (Data.LastLba3 << 24) will be out of the range within int type. The undefined behavior of the signed left shift will lead to a potential of setting the high 32 bits of IdeDev->BlkIo.Media->LastBlock to 1 during the cast from type int to type UINT64. This commit will add an explicit UINT32 type cast for Data.LastLba3 to resolve this issue. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Hao Wu <hao.a.wu@intel.com> Reviewed-by: Feng Tian <feng.tian@intel.com>
* IntelFrameworkModulePkg: Refine casting expression result to bigger sizeHao Wu2017-03-0611-25/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There are cases that the operands of an expression are all with rank less than UINT64/INT64 and the result of the expression is explicitly cast to UINT64/INT64 to fit the target size. An example will be: UINT32 a,b; // a and b can be any unsigned int type with rank less than UINT64, like // UINT8, UINT16, etc. UINT64 c; c = (UINT64) (a + b); Some static code checkers may warn that the expression result might overflow within the rank of "int" (integer promotions) and the result is then cast to a bigger size. The commit refines codes by the following rules: 1). When the expression is possible to overflow the range of unsigned int/ int: c = (UINT64)a + b; 2). When the expression will not overflow within the rank of "int", remove the explicit type casts: c = a + b; 3). When the expression will be cast to pointer of possible greater size: UINT32 a,b; VOID *c; c = (VOID *)(UINTN)(a + b); --> c = (VOID *)((UINTN)a + b); 4). When one side of a comparison expression contains only operands with rank less than UINT32: UINT8 a; UINT16 b; UINTN c; if ((UINTN)(a + b) > c) {...} --> if (((UINT32)a + b) > c) {...} For rule 4), if we remove the 'UINTN' type cast like: if (a + b > c) {...} The VS compiler will complain with warning C4018 (signed/unsigned mismatch, level 3 warning) due to promoting 'a + b' to type 'int'. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Hao Wu <hao.a.wu@intel.com> Reviewed-by: Jeff Fan <jeff.fan@intel.com>
* IntelFrameworkModulePkg: Refine type cast for pointer subtractionHao Wu2017-03-066-13/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For pointer subtraction, the result is of type "ptrdiff_t". According to the C11 standard (Committee Draft - April 12, 2011): "When two pointers are subtracted, both shall point to elements of the same array object, or one past the last element of the array object; the result is the difference of the subscripts of the two array elements. The size of the result is implementation-defined, and its type (a signed integer type) is ptrdiff_t defined in the <stddef.h> header. If the result is not representable in an object of that type, the behavior is undefined." In our codes, there are cases that the pointer subtraction is not performed by pointers to elements of the same array object. This might lead to potential issues, since the behavior is undefined according to C11 standard. Also, since the size of type "ptrdiff_t" is implementation-defined. Some static code checkers may warn that the pointer subtraction might underflow first and then being cast to a bigger size. For example: UINT8 *Ptr1, *Ptr2; UINTN PtrDiff; ... PtrDiff = (UINTN) (Ptr1 - Ptr2); The commit will refine the pointer subtraction expressions by casting each pointer to UINTN first and then perform the subtraction: PtrDiff = (UINTN) Ptr1 - (UINTN) Ptr2; Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Hao Wu <hao.a.wu@intel.com> Acked-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Jeff Fan <jeff.fan@intel.com>
* IntelFrameworkModulePkg: Replace [Ascii|Unicode]ValueToStringHao Wu2017-03-024-13/+40
| | | | | | | | | | It is the follow up of commits 51f0ceb..9e32e97 to replace AsciiValueToString/UnicodeValueToString with AsciiValueToStringS/UnicodeValueToStringS. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Hao Wu <hao.a.wu@intel.com> Reviewed-by: Jeff Fan <jeff.fan@intel.com>
* IntelFrameworkModulePkg: Use EfiEventEmptyFunction from UefiLibStar Zeng2017-01-201-20/+2
| | | | | | | | | | | | | | | Use EfiEventEmptyFunction from UefiLib and remove the duplication of event empty function. REF: https://bugzilla.tianocore.org/show_bug.cgi?id=298 Cc: Jeff Fan <jeff.fan@intel.com> Cc: Ruiyu Ni <ruiyu.ni@intel.com> Cc: Liming Gao <liming.gao@intel.com> Cc: Michael Kinney <michael.d.kinney@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Star Zeng <star.zeng@intel.com> Reviewed-by: Jeff Fan <jeff.fan@intel.com>
* IntelFrameworkModulePkg: Modify CpuIoDxe to support new IoLib libraryLeo Duran2017-01-171-0/+52
| | | | | | | | | | | | | The IO_PROTOCOL supports Fifo types by invoking the Fifo routines in the new BaseIoLibIntrinsic (IoLib class) library. Cc: Jeff Fan <jeff.fan@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Brijesh Singh <brijesh.singh@amd.com> Signed-off-by: Leo Duran <leo.duran@amd.com> Reviewed-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Jordan Justen <jordan.l.justen@intel.com> Reviewed-by: Jeff Fan <jeff.fan@intel.com>
* IntelFrameworkModulePkg KbDxe: Execute key notify func at TPL_CALLBACKStar Zeng2016-12-262-6/+97
| | | | | | | | | | | | | | | | | | | | Current implementation executes key notify function in TimerHandler at TPL_NOTIFY. The code change is to make key notify function executed at TPL_CALLBACK to reduce the time occupied at TPL_NOTIFY. The code will signal KeyNotify process event if the key pressed matches any key registered and insert the KeyData to the EFI Key queue for notify, then the KeyNotify process handler will invoke key notify functions at TPL_CALLBACK. Cc: Ruiyu Ni <Ruiyu.ni@intel.com> Cc: Michael Kinney <michael.d.kinney@intel.com> Cc: Feng Tian <feng.tian@intel.com> Cc: Jeff Fan <jeff.fan@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Star Zeng <star.zeng@intel.com> Reviewed-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Ruiyu Ni <Ruiyu.ni@intel.com>
* IntelFrameworkModulePkg Ps2KbDxe: Execute key notify func at TPL_CALLBACKStar Zeng2016-12-264-5/+98
| | | | | | | | | | | | | | | | | | | | Current implementation executes key notify function in TimerHandler at TPL_NOTIFY. The code change is to make key notify function executed at TPL_CALLBACK to reduce the time occupied at TPL_NOTIFY. The code will signal KeyNotify process event if the key pressed matches any key registered and insert the KeyData to the EFI Key queue for notify, then the KeyNotify process handler will invoke key notify functions at TPL_CALLBACK. Cc: Ruiyu Ni <Ruiyu.ni@intel.com> Cc: Michael Kinney <michael.d.kinney@intel.com> Cc: Feng Tian <feng.tian@intel.com> Cc: Jeff Fan <jeff.fan@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Star Zeng <star.zeng@intel.com> Reviewed-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Ruiyu Ni <Ruiyu.ni@intel.com>
* IntelFrameworkModulePkg/LegacyBios: Fix legacy serial redirection bugRuiyu Ni2016-11-101-1/+1
| | | | | | | | | | | | Upon booting to a legacy OS, LegacyBios driver is responsible to initialize the BDA region with the correct COM port base address. But the current logic to get the COM port base address from IsaIo instance is not correct. The patch fixes this bug. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com> Reviewed-by: Jeff Fan <jeff.fan@intel.com>
* IntelFrameworkModulePkg/DxeCapsuleLib: Add ProcessCapsules().Jiewen Yao2016-11-081-1/+39
| | | | | | | | | | | | | | | | | | | Add NULL ProcessCapsules() interface for DxeCapsuleLib. IntelFrameworkModulePkg is under maintenance phase. We stop adding new feature there. Just add NULL function to make it pass build. Cc: Jeff Fan <jeff.fan@intel.com> Cc: Feng Tian <feng.tian@intel.com> Cc: Star Zeng <star.zeng@intel.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <liming.gao@intel.com> Cc: Chao Zhang <chao.b.zhang@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jiewen Yao <jiewen.yao@intel.com> Reviewed-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Michael Kinney <michael.d.kinney@intel.com> Tested-by: Michael Kinney <michael.d.kinney@intel.com>
* IntelFrameworkModulePkg/BootMaint: Show "Change Boot order" page correctlyDandan Bi2016-11-041-3/+19
| | | | | | | | | | | | | | | | | | | Some boot options may be deleted in the "Delete Boot Option page", But the data BootOptionOrder in BmmFakeNvData may not be updated. So when user enter the "Change Boot Order" page, we should not always get the BootOptionOrder in BmmFakeNvData, it will result in incorrect UI behaviors. When the Boot Options have been saved, we should get the BootOptionOrder through function GetBootOrder. For driver option codes need to do the same change. This patch is to fix the issue in bugzilla: https://bugzilla.tianocore.org/show_bug.cgi?id=39 Cc: Eric Dong <eric.dong@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Dandan Bi <dandan.bi@intel.com> Reviewed-by: Eric Dong <eric.dong@intel.com>
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-14 19:15:30 +0000