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* IntelFsp2Pkg/BaseFspSwitchStackLib: Remove unused PCDsshenglei2018-09-281-4/+0
| | | | | | | | | | | | | The PCDs below are unused, so they have been removed from inf. gIntelFsp2PkgTokenSpaceGuid.PcdFspMaxPatchEntry gIntelFsp2PkgTokenSpaceGuid.PcdFspMaxPerfEntry Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Chasel Chiu <chasel.chiu@intel.com> Cc: Laszlo Ersek <lersek@redhat.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: shenglei <shenglei.zhang@intel.com> Reviewed-by: Chasel Chiu <chasel.chiu@intel.com>
* IntelFsp2Pkg/BaseFspPlatformLib: Remove unused PCDsshenglei2018-09-281-9/+0
| | | | | | | | | | | | | | | | | The PCDs below are unused, so they have been removed from inf. gIntelFsp2PkgTokenSpaceGuid.PcdGlobalDataPointerAddress gIntelFsp2PkgTokenSpaceGuid.PcdTemporaryRamBase gIntelFsp2PkgTokenSpaceGuid.PcdTemporaryRamSize gIntelFsp2PkgTokenSpaceGuid.PcdFspTemporaryRamSize gIntelFsp2PkgTokenSpaceGuid.PcdFspMaxPatchEntry gIntelFsp2PkgTokenSpaceGuid.PcdFspMaxPerfEntry Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Chasel Chiu <chasel.chiu@intel.com> Cc: Laszlo Ersek <lersek@redhat.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: shenglei <shenglei.zhang@intel.com> Reviewed-by: Chasel Chiu <chasel.chiu@intel.com>
* IntelFsp2Pkg/BaseFspCommonLib: Remove unused PCDsshenglei2018-09-281-5/+0
| | | | | | | | | | | | | | | The PCDs below are unused, so they have been removed from inf. gIntelFsp2PkgTokenSpaceGuid.PcdFspMaxPatchEntry gIntelFsp2PkgTokenSpaceGuid.PcdFspMaxPerfEntry gIntelFsp2PkgTokenSpaceGuid.PcdTemporaryRamBase gIntelFsp2PkgTokenSpaceGuid.PcdTemporaryRamSize Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Chasel Chiu <chasel.chiu@intel.com> Cc: Laszlo Ersek <lersek@redhat.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: shenglei <shenglei.zhang@intel.com> Reviewed-by: Chasel Chiu <chasel.chiu@intel.com>
* IntelFsp2(Wrapper)Pkg: Revert from e8208100 to 737f812bChasel, Chiu2018-09-283-0/+18
| | | | | | | | | | | | Commit formats had issues so reverted 9 commits from IntelFsp2Pkg and IntelFsp2WrapperPkg. Will re-submit them with correct formats. Cc: Jiewen Yao <Jiewen.yao@intel.com> Cc: Star Zeng <star.zeng@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Chasel Chiu <chasel.chiu@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com>
* [PATCH v3 04/16] IntelFsp2Pkg/BaseFspSwitchStackLib: Remove unusedChasel, Chiu2018-09-271-4/+0
| | | | | | | | | | | | | | | PCDs The PCDs below are unused, so they have been removed from inf. gIntelFsp2PkgTokenSpaceGuid.PcdFspMaxPatchEntry gIntelFsp2PkgTokenSpaceGuid.PcdFspMaxPerfEntry Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Chasel Chiu <chasel.chiu@intel.com> Cc: Laszlo Ersek <lersek@redhat.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: shenglei <shenglei.zhang@intel.com> Reviewed-by: Chasel Chiu <chasel.chiu@intel.com>
* [PATCH v3 03/16] IntelFsp2Pkg/BaseFspPlatformLib: Remove unused PCDsChasel, Chiu2018-09-271-9/+0
| | | | | | | | | | | | | | | | | The PCDs below are unused, so they have been removed from inf. gIntelFsp2PkgTokenSpaceGuid.PcdGlobalDataPointerAddress gIntelFsp2PkgTokenSpaceGuid.PcdTemporaryRamBase gIntelFsp2PkgTokenSpaceGuid.PcdTemporaryRamSize gIntelFsp2PkgTokenSpaceGuid.PcdFspTemporaryRamSize gIntelFsp2PkgTokenSpaceGuid.PcdFspMaxPatchEntry gIntelFsp2PkgTokenSpaceGuid.PcdFspMaxPerfEntry Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Chasel Chiu <chasel.chiu@intel.com> Cc: Laszlo Ersek <lersek@redhat.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: shenglei <shenglei.zhang@intel.com> Reviewed-by: Chasel Chiu <chasel.chiu@intel.com>
* [PATCH v3 02/16] IntelFsp2Pkg/BaseFspCommonLib: Remove unused PCDsChasel, Chiu2018-09-271-5/+0
| | | | | | | | | | | | | | | | The PCDs below are unused, so they have been removed from inf. gIntelFsp2PkgTokenSpaceGuid.PcdFspMaxPatchEntry gIntelFsp2PkgTokenSpaceGuid.PcdFspMaxPerfEntry gIntelFsp2PkgTokenSpaceGuid.PcdTemporaryRamBase gIntelFsp2PkgTokenSpaceGuid.PcdTemporaryRamSize Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Chasel Chiu <chasel.chiu@intel.com> Cc: Laszlo Ersek <lersek@redhat.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: shenglei <shenglei.zhang@intel.com> Reviewed-by: Chasel Chiu <chasel.chiu@intel.com>
* IntelFsp2Pkg: Clean up source filesLiming Gao2018-06-284-9/+9
| | | | | | | | | 1. Do not use tab characters 2. No trailing white space in one line 3. All files must end with CRLF Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Liming Gao <liming.gao@intel.com>
* IntelFsp2Pkg: Update Section Name in INF filesLiming Gao2017-10-102-6/+6
| | | | | | | Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Liming Gao <liming.gao@intel.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
* IntelFsp2Pkg: Support to return error status from FSP API doneThomaiyar, Richard Marian2016-11-141-23/+128
| | | | | | | | | | | | | | | | Added FspMemoryInitDone2, FspTempRamExitDone2, FspSiliconInitDone2 to return error status to Boot Loader for FSP API calls. To maintain backward compatibility existing functions (FspMemoryInitDone, FspTempRamExitDone, FspSiliconInitDone) declaration left untouched. Cc: Maurice Ma <maurice.ma@intel.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Giri P Mudusuru <giri.p.mudusuru@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Richard Thomaiyar <richard.marian.thomaiyar@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com> Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com>
* IntelFsp2Pkg: Removing FSP Data TableSatya Yarlagadda2016-10-281-1/+0
| | | | | | | | | | | | | | | | FSP Base address is part of FSP_INFO_HEADER and we don't need additional table to report the base address of FSP components. we expect Boot loaders to parse the FSP INFO Header to get the base address. Also, this the FSP_DATA_TABLE is not defined in the FSP EAS and we don't see a need for it. Cc: Maurice Ma <maurice.ma@intel.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Giri P Mudusuru <giri.p.mudusuru@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Satya Yarlagadda <satya.p.yarlagadda@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com> Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com>
* IntelFsp2Pkg: Added changes to enable FPDT performance measurementsYarlagadda, Satya P2016-10-272-10/+27
| | | | | | | | | | | | | | | | | | | | | | IntelFsp2Pkg: 1.Defined performance measure mask to mask the Perf id (Bits 63:56) of the Perf Data from FSP Global data. 2.Replaced the hard coded perf ids to use the standard defines from FspStatuscode.h 3.Add the PerfData form Fsp Global data ( for TempRaminit entry, TempramInit exit, memoryinit entry) to FPDT entries IntelFsp2WrapperPkg: Moved the code to add the FSP FPDT records and wrapper FPDT records from ReadytoBoot event to EndofFirmware event Cc: Maurice Ma <maurice.ma@intel.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Giri P Mudusuru <giri.p.mudusuru@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Satya Yarlagadda <satya.p.yarlagadda@intel.com> Reviewed-by: Maurice Ma <maurice.ma@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
* IntelFsp2Pkg: Fix typo and commentsGiri P Mudusuru2016-08-311-17/+17
| | | | | | | | | | Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Maurice Ma <maurice.ma@intel.com> Cc: Satya Yarlagadda <satya.p.yarlagadda@intel.com> Cc: Michael Kinney <michael.d.kinney@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Giri P Mudusuru <giri.p.mudusuru@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
* IntelFsp2Pkg: Remove CarBase and CarSize from FSP_GLOBAL_DATASatya Yarlagadda2016-07-231-42/+0
| | | | | | | | | | | | | | CarBase and CarSize in Fsp Global data structure are no longer needed as Boot loader doesn't pass them to FSP even in case that BL chooses to skip calling the FspTempRamInit API. In case of FspTempramInit is called, we can use the PCDs to identify the CarBase and Size. Hence we remove the relevant code. Cc: Giri P Mudusuru <giri.p.mudusuru@intel.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Satya Yarlagadda <satya.p.yarlagadda@intel.com> Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
* IntelFsp2Pkg BaseFspPlatformLib: Remove Boot Loader tempram MigrationSatya Yarlagadda2016-07-181-67/+0
| | | | | | | | | | | | | In FSP2.0, Boot loader should migrate its temp ram before calling the tempramexit API to tear down the tempram. so, we don't need the function to migrate the BL TempRam in the IntelFsp2Pkg. Cc: Giri P Mudusuru <giri.p.mudusuru@intel.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Satya Yarlagadda <satya.p.yarlagadda@intel.com> Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
* IntelFsp2Pkg SecFspSecPlatformLibNull: Remove MASM/GAS filesLiming Gao2016-07-115-334/+1
| | | | | | | | | | Keep NASM file only for new added modules. Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Giri Mudusuru <giri.p.mudusuru@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com>
* IntelFsp2Pkg BaseFspSwitchStackLib: Remove MASM/GAS filesLiming Gao2016-07-113-157/+0
| | | | | | | | | | Keep NASM file only for new added modules. Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Giri Mudusuru <giri.p.mudusuru@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com>
* IntelFsp2Pkg BaseFspDebugLibSerialPort: Remove MASM/GAS filesLiming Gao2016-07-113-66/+0
| | | | | | | | | | Keep NASM file only for new added modules. Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Giri Mudusuru <giri.p.mudusuru@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com>
* IntelFsp2Pkg SecFspSecPlatformLibNull: Convert Ia32/Flat32.asm to NASMLiming Gao2016-06-282-0/+129
| | | | | | | Manually convert Ia32/Flat32.asm to Ia32/Flat32.nasm Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Liming Gao <liming.gao@intel.com>
* IntelFsp2Pkg SecFspSecPlatformLibNull: Convert Ia32/SecCarInit.asm to NASMLiming Gao2016-06-281-0/+46
| | | | | | | | The BaseTools/Scripts/ConvertMasmToNasm.py script was used to convert Ia32/SecCarInit.asm to Ia32/SecCarInit.nasm Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Liming Gao <liming.gao@intel.com>
* IntelFsp2Pkg BaseFspSwitchStackLib: Convert Ia32/Stack.asm to NASMLiming Gao2016-06-282-3/+78
| | | | | | | | The BaseTools/Scripts/ConvertMasmToNasm.py script was used to convert Ia32/Stack.asm to Ia32/Stack.nasm Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Liming Gao <liming.gao@intel.com>
* IntelFsp2Pkg BaseFspDebugLibSerialPort: Convert Ia32/FspDebug.asm to NASMLiming Gao2016-06-282-3/+35
| | | | | | | | The BaseTools/Scripts/ConvertMasmToNasm.py script was used to convert Ia32/FspDebug.asm to Ia32/FspDebug.nasm Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Liming Gao <liming.gao@intel.com>
* IntelFsp2Pkg-BaseFspCommonLib: Add funtion to return the reset required statusYarlagadda, Satya P2016-06-272-0/+30
| | | | | | | | | | | | Added new funtion in FSPCommonLib to update the FSP API return status with the requested return status and return the control to the boot loader. Cc: Giri P Mudusuru <giri.p.mudusuru@intel.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Satya Yarlagadda <satya.p.yarlagadda@intel.com> Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
* IntelFsp2Pkg: rename GetFspVpdDataPointer() to GetFspCfgRegionDataPointer()Jiewen Yao2016-06-181-3/+3
| | | | | | | | | | | | | | | FSP2.0 removed VPD concept. Rename GetFspVpdDataPointer() to GetFspCfgRegionDataPointer() to follow FSP2.0 specification (CfgRegionOffset). Cc: Giri P Mudusuru <giri.p.mudusuru@intel.com> Cc: Amy Chan <amy.chan@intel.com> Cc: Satya Yarlagadda <satya.p.yarlagadda@intel.com> Cc: Maurice Ma <maurice.ma@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jiewen Yao <jiewen.yao@intel.com> Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com> Reviewed-by: Amy Chan <amy.chan@intel.com>
* Add IntelFsp2Pkg and IntelFsp2WrapperPkg.Jiewen Yao2016-05-1326-0/+3139
Add FSP2.0 support. This series of patch is to support FSP2.0 specification at https://firmware.intel.com/sites/default/files/FSP_EAS_v2.0_Draft%20External.pdf Some major updates include: 1) One FSP binary is separated to multiple components: FSP-T, FSP-M, FSP-S, and optional FSP-O. Each component has its own configuration data region. 2) All FSP-APIs use same UPD format - FSP_UPD_HEADER. 3) Add EnumInitPhaseEndOfFirmware notifyphase. 4) FSP1.1/FSP1.0 compatibility is NOT maintained. 5) We also add rename Fsp* to FspWrapper* in IntelFsp2WrapperPkg, to indicate that it is for FspWrapper only. IntelFspPkg and IntelFspWrapperPkg will be deprecated. The new Intel platform will follow FSP2.0 and use IntelFsp2Pkg and IntelFsp2WrapperPkg. The old platform can still use IntelFspPkg and IntelFspWrapperPkg for compatibility consideration. Cc: Giri P Mudusuru <giri.p.mudusuru@intel.com> Cc: Maurice Ma <maurice.ma@intel.com> Cc: Ravi P Rangarajan <ravi.p.rangarajan@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jiewen Yao <jiewen.yao@intel.com> Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com> Reviewed-by: Maurice Ma <maurice.ma@intel.com> Reviewed-by: Ravi P Rangarajan <ravi.p.rangarajan@intel.com>
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