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* IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dec: add FspMeasurementLib.hQi Zhang2020-09-011-0/+2
| | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2944 Cc: Chasel Chiu <chasel.chiu@intel.com> Cc: Nate DeSimone <nathaniel.l.desimone@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Eric Dong <eric.dong@intel.com> Signed-off-by: Qi Zhang <qi1.zhang@intel.com> Message-Id: <20200831020721.8967-1-qi1.zhang@intel.com> Reviewed-by: Chasel Chiu <chasel.chiu@intel.com>
* IntelFsp2Wrapper/dsc: Add FspTpmMeasurementLib and PcdFspMeasurementConfig.Jiewen Yao2020-08-261-1/+18
| | | | | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2376 Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Chasel Chiu <chasel.chiu@intel.com> Cc: Nate DeSimone <nathaniel.l.desimone@intel.com> Cc: Star Zeng <star.zeng@intel.com> Cc: Qi Zhang <qi1.zhang@intel.com> Signed-off-by: Jiewen Yao <jiewen.yao@intel.com> Message-Id: <20200818062618.3698-7-qi1.zhang@intel.com> Reviewed-by: Jian J Wang <jian.j.wang@intel.com> [lersek@redhat.com: extend (C) notice in DEC to 2020 per Chasel's request] Reviewed-by: Chasel Chiu <chasel.chiu@intel.com>
* IntelFsp2WrapperPkg: Replace BSD License with BSD+Patent LicenseMichael D Kinney2019-04-091-7/+1
| | | | | | | | | | | | | | | | | | | | https://bugzilla.tianocore.org/show_bug.cgi?id=1373 Replace BSD 2-Clause License with BSD+Patent License. This change is based on the following emails: https://lists.01.org/pipermail/edk2-devel/2019-February/036260.html https://lists.01.org/pipermail/edk2-devel/2018-October/030385.html RFCs with detailed process for the license change: V3: https://lists.01.org/pipermail/edk2-devel/2019-March/038116.html V2: https://lists.01.org/pipermail/edk2-devel/2019-March/037669.html V1: https://lists.01.org/pipermail/edk2-devel/2019-March/037500.html Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com> Reviewed-by: Chasel Chiu <chasel.chiu@intel.com>
* IntelFsp2WrapperPkg: Fix line ending format issueChasel, Chiu2018-11-261-11/+11
| | | | | | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1352 Fixed line ending format wrong issues on some files. Test: Verified building successfully. Cc: Jiewen Yao <Jiewen.yao@intel.com> Cc: Desimone Nathaniel L <nathaniel.l.desimone@intel.com> Cc: Wu Hao A <hao.a.wu@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Chasel Chiu <chasel.chiu@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com> Reviewed-by: Hao Wu <hao.a.wu@intel.com>
* IntelFsp2WrapperPkg: Support FSP Dispatch modeChasel, Chiu2018-11-201-2/+11
| | | | | | | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1300 Provides PCD selection for FSP Wrapper to support Dispatch mode. Also PcdFspmBaseAddress should support Dynamic for recovery scenario (multiple FSP-M binary in flash) Test: Verified on internal platform and both API and DISPATCH modes booted successfully. Cc: Jiewen Yao <Jiewen.yao@intel.com> Cc: Desimone Nathaniel L <nathaniel.l.desimone@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Chasel Chiu <chasel.chiu@intel.com> Reviewed-by: Jiewen Yao <Jiewen.yao@intel.com>
* IntelFsp2WrapperPkg: Revert 90c5bc08Chasel, Chiu2018-11-201-11/+2
| | | | | | | | | | | | | Commit message issue and reverted commit 90c5bc081d15d077606131a61114ddfdefe62e61. Will re-submit with correct formats. Cc: Jiewen Yao <Jiewen.yao@intel.com> Cc: Star Zeng <star.zeng@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Chasel Chiu <chasel.chiu@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com>
* IntelFsp2WrapperPkg: Support FSP Dispatch modeChasel, Chiu2018-11-201-2/+11
| | | | | | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1300 Provides PCD selection for FSP Wrapper to support Dispatch mode. Also PcdFspmBaseAddress should support Dynamic for recovery scenario (multiple FSP-M binary in flash) Test: Verified on internal platform and both API and DISPATCH modes booted successfully. Cc: Jiewen Yao <Jiewen.yao@intel.com> Cc: Desimone Nathaniel L <nathaniel.l.desimone@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Chasel Chiu <chasel.chiu@intel.com>
* IntelFsp2WrapperPkg: Clean up source filesLiming Gao2018-06-281-2/+2
| | | | | | | | | 1. Do not use tab characters 2. No trailing white space in one line 3. All files must end with CRLF Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Liming Gao <liming.gao@intel.com>
* IntelFsp2WrapperPkg: Support UPD allocation outside FspWrapperChasel, Chiu2017-11-291-2/+11
| | | | | | | | | | | UPD allocation and patching can be done outside FspWrapper as implementation choice so adding a PCD to select between original FspWrapper allocation model or outside model Cc: Jiewen Yao <Jiewen.yao@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Chasel Chiu <chasel.chiu@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
* IntelFsp2WrapperPkg: Add a PCD to control if signaling PciEnumerationComplete.Dong, Guo2016-10-281-0/+18
| | | | | | | | | | | | PciEnumerationComplete might be signaled to FSP in Coreboot. So FSP wrapper driver don't need send it again. Add a PCD to control if a FSP API could be skipped from FspWrapperNotifyDxe driver. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Guo Dong <guo.dong@intel.com> Reviewed-by: Maurice Ma <maurice.ma@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com> Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com>
* IntelFsp2WrapperPkg: Add Dymanic PCD capability to PcdFspsBaseAddressSatya Yarlagadda2016-06-161-1/+4
| | | | | | | | | | | Cc: Giri P Mudusuru <giri.p.mudusuru@intel.com> Cc: Maurice Ma <maurice.ma@intel.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Satya Yarlagadda <satya.p.yarlagadda@intel.com> Reviewed by: Maurice Ma <maurice.ma@intel.com> Reviewed by: Jiewen Yao <jiewen.yao@intel.com> Reviewed by: Giri P Mudusuru <giri.p.mudusuru@intel.com>
* IntelFsp2WrapperPkg: Update gFspWrapperTokenSpaceGuid to ↵Jiewen Yao2016-05-231-11/+11
| | | | | | | | | | | | | | | | gIntelFsp2WrapperTokenSpaceGuid. We updated gIntelFspPkgTokenSpaceGuid to gIntelFsp2PkgTokenSpaceGuid in IntelFsp2Pkg, but we miss the update in IntelFsp2WrapperPkg. This patch fixed the issue and made them consistent. Cc: Giri P Mudusuru <giri.p.mudusuru@intel.com> Cc: Satya P Yarlagadda <satya.p.yarlagadda@intel.com> Cc: Maurice Ma <maurice.ma@intel.com> Cc: Ravi P Rangarajan <ravi.p.rangarajan@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jiewen Yao <jiewen.yao@intel.com> Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com>
* Add IntelFsp2Pkg and IntelFsp2WrapperPkg.Jiewen Yao2016-05-131-0/+77
Add FSP2.0 support. This series of patch is to support FSP2.0 specification at https://firmware.intel.com/sites/default/files/FSP_EAS_v2.0_Draft%20External.pdf Some major updates include: 1) One FSP binary is separated to multiple components: FSP-T, FSP-M, FSP-S, and optional FSP-O. Each component has its own configuration data region. 2) All FSP-APIs use same UPD format - FSP_UPD_HEADER. 3) Add EnumInitPhaseEndOfFirmware notifyphase. 4) FSP1.1/FSP1.0 compatibility is NOT maintained. 5) We also add rename Fsp* to FspWrapper* in IntelFsp2WrapperPkg, to indicate that it is for FspWrapper only. IntelFspPkg and IntelFspWrapperPkg will be deprecated. The new Intel platform will follow FSP2.0 and use IntelFsp2Pkg and IntelFsp2WrapperPkg. The old platform can still use IntelFspPkg and IntelFspWrapperPkg for compatibility consideration. Cc: Giri P Mudusuru <giri.p.mudusuru@intel.com> Cc: Maurice Ma <maurice.ma@intel.com> Cc: Ravi P Rangarajan <ravi.p.rangarajan@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jiewen Yao <jiewen.yao@intel.com> Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com> Reviewed-by: Maurice Ma <maurice.ma@intel.com> Reviewed-by: Ravi P Rangarajan <ravi.p.rangarajan@intel.com>
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