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* IntelFsp2WrapperPkg: Fix a typo in the commentGary Lin2016-10-241-1/+1
| | | | | | | | | | | - boundry -> boundary Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Giri P Mudusuru <giri.p.mudusuru@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Gary Lin <glin@suse.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com> Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com>
* IntelFsp2WrapperPkg DSC: Add build option to disable deprecated APIsHao Wu2016-08-081-0/+3
| | | | | | | | | | | | | Add the following definition in the [BuildOptions] section in package DSC files to disable APIs that are deprecated: [BuildOptions] *_*_*_CC_FLAGS = -D DISABLE_NEW_DEPRECATED_INTERFACES Cc: Jiewen Yao <jiewen.yao@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Hao Wu <hao.a.wu@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
* IntelFsp2WrapperPkg: Add missing License.txt.Jiewen Yao2016-07-261-0/+25
| | | | | | | | | Add missing License.txt. Cc: Giri P Mudusuru <giri.p.mudusuru@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jiewen Yao <jiewen.yao@intel.com> Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com>
* IntelFsp2WrapperPkg: Add missing modules in Package DSCLiming Gao2016-07-201-0/+7
| | | | | | | | | | Package DSC is used to verify the module source build. Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Giri Mudusuru <giri.p.mudusuru@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com>
* IntelFsp2WrapperPkg SecFspWrapperPlatformSecLibSample:Update code to pass buildLiming Gao2016-07-203-9/+10
| | | | | | | | | | | 1. Update its library class to PlatformSecLib 2. Update source code to refer to the matched header file Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Giri Mudusuru <giri.p.mudusuru@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com>
* IntelFsp2WrapperPkg: Remove unused header files from Fspm and Fsps WrapperPeimLiming Gao2016-07-142-2/+0
| | | | | | | | | | PlatformSecLib.h is not used and removed. Cc: Giri P Mudusuru <giri.p.mudusuru@intel.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com>
* IntelFsp2WrapperPkg SecFspWrapperPlatformSecLibSample: Remove MASM/GAS filesLiming Gao2016-07-117-1124/+0
| | | | | | | | | | Keep NASM file only for new added modules. Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Giri Mudusuru <giri.p.mudusuru@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com>
* IntelFsp2WrapperPkg BaseFspWrapperApiLib: Remove MASM/GAS filesLiming Gao2016-07-113-462/+0
| | | | | | | | | | Keep NASM file only for new added modules. Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Giri Mudusuru <giri.p.mudusuru@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com>
* IntelFsp2WrapperPkg: Add error handling for possible NULL ptr dereferenceHao Wu2016-07-012-0/+10
| | | | | | | | | | | | | Possible NULL pointer dereference for FspmHeaderPtr/FspsHeaderPtr in module FspmWrapperPeim/FspsWrapperPeim. Add error handling codes to avoid this issue. Cc: Jiewen Yao <jiewen.yao@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Hao Wu <hao.a.wu@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com> Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com>
* IntelFsp2WrapperPkg SecFspWrapperPlatformSecLibSample: Convert ASM to NASMLiming Gao2016-06-284-0/+559
| | | | | | | | Manually converts Ia32/PeiCoreEntry.asm, Ia32/SecEntry.asm and Ia32/Stack.asm to Ia32/PeiCoreEntry.nasm, Ia32/SecEntry.nasm and Ia32/Stack.nasm. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Liming Gao <liming.gao@intel.com>
* IntelFsp2WrapperPkg BaseFspWrapperApiLib: Convert X64/Thunk64To32.asm to NASMLiming Gao2016-06-282-0/+231
| | | | | | | Manually convert X64/Thunk64To32.asm to X64/Thunk64To32.nasm Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Liming Gao <liming.gao@intel.com>
* IntelFsp2WrapperPkg: Add support to handle ResetRequired return Status from FSP.Jiewen Yao2016-06-186-1/+105
| | | | | | | | | | | | | | As per FSP 2.0 spec, FSP shall not trigger system reset and instead it shall return from the FSP API to the BL/Wrapper with the required reset type. The changes are to handle the ResetRequired return code from FSP APIs and provide lib interface for platform to trigger the actual reset. Cc: Giri P Mudusuru <giri.p.mudusuru@intel.com> Cc: Amy Chan <amy.chan@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Satya Yarlagadda <satya.p.yarlagadda@intel.com> Signed-off-by: Jiewen Yao <jiewen.yao@intel.com> Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com>
* IntelFsp2WrapperPkg: Add Dymanic PCD capability to PcdFspsBaseAddressSatya Yarlagadda2016-06-161-1/+4
| | | | | | | | | | | Cc: Giri P Mudusuru <giri.p.mudusuru@intel.com> Cc: Maurice Ma <maurice.ma@intel.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Satya Yarlagadda <satya.p.yarlagadda@intel.com> Reviewed by: Maurice Ma <maurice.ma@intel.com> Reviewed by: Jiewen Yao <jiewen.yao@intel.com> Reviewed by: Giri P Mudusuru <giri.p.mudusuru@intel.com>
* IntelFsp2WrapperPkg: Update gFspWrapperTokenSpaceGuid to ↵Jiewen Yao2016-05-237-25/+25
| | | | | | | | | | | | | | | | gIntelFsp2WrapperTokenSpaceGuid. We updated gIntelFspPkgTokenSpaceGuid to gIntelFsp2PkgTokenSpaceGuid in IntelFsp2Pkg, but we miss the update in IntelFsp2WrapperPkg. This patch fixed the issue and made them consistent. Cc: Giri P Mudusuru <giri.p.mudusuru@intel.com> Cc: Satya P Yarlagadda <satya.p.yarlagadda@intel.com> Cc: Maurice Ma <maurice.ma@intel.com> Cc: Ravi P Rangarajan <ravi.p.rangarajan@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jiewen Yao <jiewen.yao@intel.com> Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com>
* IntelFsp2WrapperPkg/FspmWrapperPeim: Update debug message match code.Jiewen Yao2016-05-201-1/+1
| | | | | | | | | | | | Update function name in debug message to match code. Cc: Giri P Mudusuru <giri.p.mudusuru@intel.com> Cc: Amy Chan <amy.chan@intel.com> Cc: Maurice Ma <maurice.ma@intel.com> Cc: Ravi P Rangarajan <ravi.p.rangarajan@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jiewen Yao <jiewen.yao@intel.com> Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com>
* Add IntelFsp2Pkg and IntelFsp2WrapperPkg.Jiewen Yao2016-05-1344-0/+5286
Add FSP2.0 support. This series of patch is to support FSP2.0 specification at https://firmware.intel.com/sites/default/files/FSP_EAS_v2.0_Draft%20External.pdf Some major updates include: 1) One FSP binary is separated to multiple components: FSP-T, FSP-M, FSP-S, and optional FSP-O. Each component has its own configuration data region. 2) All FSP-APIs use same UPD format - FSP_UPD_HEADER. 3) Add EnumInitPhaseEndOfFirmware notifyphase. 4) FSP1.1/FSP1.0 compatibility is NOT maintained. 5) We also add rename Fsp* to FspWrapper* in IntelFsp2WrapperPkg, to indicate that it is for FspWrapper only. IntelFspPkg and IntelFspWrapperPkg will be deprecated. The new Intel platform will follow FSP2.0 and use IntelFsp2Pkg and IntelFsp2WrapperPkg. The old platform can still use IntelFspPkg and IntelFspWrapperPkg for compatibility consideration. Cc: Giri P Mudusuru <giri.p.mudusuru@intel.com> Cc: Maurice Ma <maurice.ma@intel.com> Cc: Ravi P Rangarajan <ravi.p.rangarajan@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jiewen Yao <jiewen.yao@intel.com> Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com> Reviewed-by: Maurice Ma <maurice.ma@intel.com> Reviewed-by: Ravi P Rangarajan <ravi.p.rangarajan@intel.com>
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