summaryrefslogtreecommitdiffstats
path: root/IntelFspPkg/Library
Commit message (Collapse)AuthorAgeFilesLines
* Add Dual-FSP support (MemoryInitUpd/SiliconInitUpd)Yao, Jiewen2015-08-023-5/+120
| | | | | | | | | | | | | | | Add FspUpdSignatureCheck() API in FspSecPlatformLib, so that FspSecCore can check if UPD data is valid in FSP API. Add Set/GetFspMemoryInitUpdDataPointer() and Set/GetFspSiliconInitUpdDataPointer() API in FspCommonLib, so that core can set this UdpDataPointer and platform code may get UpdDataPointer easily. Add UpdateMemSiUpdInitOffsetValue function in GenCfgOpt.py tool, so that the MemoryInitUpdOffset and SiUpdInitOffset is recorded. Add missing EMBED comment in GenCfgOptUserManual.docx Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: "Yao, Jiewen" <Jiewen.Yao@intel.com> Reviewed-by: "Mudusuru, Giri P" <giri.p.mudusuru@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18123 6f19259b-4bc3-4df7-8a09-765794883524
* IntelFspPkg BaseFspDebugLibSerialPort: Use safe string functionsHao Wu2015-06-301-1/+6
| | | | | | | | Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Hao Wu <hao.a.wu@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17743 6f19259b-4bc3-4df7-8a09-765794883524
* IntelFspPkg: correct comments and rename a labelGuo Dong2015-06-031-1/+1
| | | | | | | | | | | | Corrects a word typo and a comment error. Rename a label to match its function name. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Guo Dong <guo.dong@intel.com> Reviewed-by: Yao Jiewen <Jiewen.Yao@intel.com> Reviewed-by: Haojian Zhuang <haojian.zhuang@linaro.org> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17553 6f19259b-4bc3-4df7-8a09-765794883524
* Add dual FSP binaries support.Ma, Maurice2015-04-293-11/+53
| | | | | | | | | | | | | | | There are two FSP images at different locations in a flash (one factory version is read only and other in updatable version) TempRamInit, FspMemoryInit and TempRamExit are executed from factory version and FspSiliconInit/NotifyPhase will be executed from updatable version. Also update FSP specification version to v1.1. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: "Ma, Maurice" <maurice.ma@intel.com> Reviewed-by: "Yao, Jiewen" <Jiewen.Yao@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17248 6f19259b-4bc3-4df7-8a09-765794883524
* Replace SetPower2 by EDKII baselib - GetPowerOfTwo64.Yao, Jiewen2015-04-281-48/+2
| | | | | | | | | | Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: "Yao, Jiewen" <Jiewen.Yao@intel.com> Reviewed-by: "Ma, Maurice" <Maurice.Ma@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17222 6f19259b-4bc3-4df7-8a09-765794883524
* Update IntelFspPkg to support FSP1.1Yao, Jiewen2015-04-239-28/+480
| | | | | | | | | | | | | | | | | | | | | | | | | -- Add BootLoaderTolumSize support -- Extend FspApiCallingCheck with ApiParam for BootLoaderTolumSize -- Rename all Bootloader to BootLoader as official name -- Rename Ucode to Microcode -- Remove FspSelfCheck API, because it is merged into SecPlatformInit -- Add GetFspVpdDataPointer() in FspCommonLib.h -- Document FspSecPlatformLib.h -- Reorg FSP_PLAT_DATA data structure to let it match FSP spec. -- Move helper function in FspSecCore to reduce platform enabling effort -- Fix LibraryClasses declaration in DEC file. -- Enhance PatchFv to check if it is valid FSP bin. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: "Yao, Jiewen" <Jiewen.Yao@intel.com> Reviewed-by: "Ma, Maurice" <maurice.ma@intel.com> Reviewed-by: "Rangarajan, Ravi P" <ravi.p.rangarajan@intel.com> Reviewed-by: "Mudusuru, Giri P" <giri.p.mudusuru@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17196 6f19259b-4bc3-4df7-8a09-765794883524
* Fix comments format error.Fsp1.1 update.Yao, Jiewen2015-02-121-2/+2
| | | | | | | | | Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: "Yao, Jiewen" <jiewen.yao@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16843 6f19259b-4bc3-4df7-8a09-765794883524
* Fsp1.1 update.Yao, Jiewen2015-02-122-3/+4
| | | | | | | | | | | | | | | | | | | Update ApiEntry.asm to use MACRO instead of direct XMM access. Add sanity parameter check for FSP API. Add sanity return code check for internal API. Call LoadUcode before CarInit to meet silicon requirement. Remove unnecessary VpdBase for PatchTable. Add ASSERT for NULL check FSP1.1 entrypoint. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: "Yao, Jiewen" <jiewen.yao@intel.com> Reviewed-by: "Rangarajan, Ravi P" <ravi.p.rangarajan@intel.com> Reviewed-by: "Ma, Maurice" <maurice.ma@intel.com> Reviewed-by: "Mudusuru, Giri P" <giri.p.mudusuru@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16834 6f19259b-4bc3-4df7-8a09-765794883524
* Update IntelFspPkg according to FSP1.1.Yao, Jiewen2015-02-115-49/+126
| | | | | | | | | Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: "Yao, Jiewen" <jiewen.yao@intel.com> Reviewed-by: "Rangarajan, Ravi P" <ravi.p.rangarajan@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16825 6f19259b-4bc3-4df7-8a09-765794883524
* IntelFspPkg: Update BaseFspDebugLibSerialPort libraryLiming Gao2015-02-062-1/+20
| | | | | | | | | | Implement new API DebugPrintLevelEnabled() to base on PCD PcdFixedDebugPrintErrorLevel. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16795 6f19259b-4bc3-4df7-8a09-765794883524
* IntelFspPkg: Refine the format of meta data files.Shumin Qiu2015-01-197-22/+28
| | | | | | | | | | Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Shumin Qiu <shumin.qiu@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16622 6f19259b-4bc3-4df7-8a09-765794883524
* Added missing gFspBootLoaderTemporaryMemoryGuid to the FspPlatformLib.inf.Yao, Jiewen2014-12-061-0/+3
| | | | | | | | | | Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: "Yao, Jiewen" <jiewen.yao@intel.com> Reviewed-by: "Rangarajan, Ravi P" <ravi.p.rangarajan@intel.com> Reviewed-by: "Ma, Maurice" <maurice.ma@intel.com> Reviewed-by: "Mudusuru, Giri P" <giri.p.mudusuru@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16479 6f19259b-4bc3-4df7-8a09-765794883524
* Fix typo.Yao, Jiewen2014-12-041-16/+16
| | | | | | | | | | Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: "Yao, Jiewen" <jiewen.yao@intel.com> Reviewed-by: "Rangarajan, Ravi P" <ravi.p.rangarajan@intel.com> Reviewed-by: "Ma, Maurice" <maurice.ma@intel.com> Reviewed-by: "Mudusuru, Giri P" <giri.p.mudusuru@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16475 6f19259b-4bc3-4df7-8a09-765794883524
* Fix an issue on FixedMtreProgramming - AND/OR mask incorrect.jyao12014-09-281-1/+1
| | | | | | | | | Contributed-under: TianoCore Contribution Agreement 1.0 signed-off by: Yao, Jiewen <jiewen.yao@intel.com> reviewed by: Rangarajan, Ravi P <ravi.p.rangarajan@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16181 6f19259b-4bc3-4df7-8a09-765794883524
* IntelFspPkg/IntelFspWrapperPkg: Fix some typos.Star Zeng2014-09-031-2/+2
| | | | | | | | Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Star Zeng <star.zeng@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16040 6f19259b-4bc3-4df7-8a09-765794883524
* IntelFspPkg BaseCacheLib: State CacheAsRamLib in its inf, because it ↵Star Zeng2014-08-221-0/+1
| | | | | | | | | | consumes DisableCacheAsRam() that is the interface of CacheAsRamLib. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Star Zeng <star.zeng@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15877 6f19259b-4bc3-4df7-8a09-765794883524
* Correct AsciiStrnCpy.jyao12014-08-081-1/+1
| | | | | | | | | | Contributed-under: TianoCore Contribution Agreement 1.0 Signed off by: Jiewen Yao <jiewen.yao@intel.com> Reviewed by: Eric Dong <eric.dong@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15772 6f19259b-4bc3-4df7-8a09-765794883524
* Eliminate duplicated file GUID.jyao12014-08-063-3/+3
| | | | | | | | | | | | | | | | Eliminate duplicate GUID definition. Do explicit data cast. Use StrnCpy instead of StrCpy. Update GCC assembly. Contributed-under: TianoCore Contribution Agreement 1.0 Signed off by: Jiewen Yao <jiewen.yao@intel.com> Reviewed by: Eric Dong <eric.dong@intel.com> Reviewed by: Liming Gao <liming.gao@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15762 6f19259b-4bc3-4df7-8a09-765794883524
* Eliminate duplicated file GUID.jyao12014-08-052-3/+2
| | | | | | | | | | Contributed-under: TianoCore Contribution Agreement 1.0 Signed off by: Jiewen Yao <jiewen.yao@intel.com> Reviewed by: Eric Dong <eric.dong@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15751 6f19259b-4bc3-4df7-8a09-765794883524
* Add IntelFspPkg to support create FSP bin based on EDKII.jyao12014-07-2922-0/+2418
Contributed-under: TianoCore Contribution Agreement 1.0 Signed off by: Ravi Rangarajan <ravi.p.rangarajan@intel.com> Reviewed by: Maurice Ma <maurice.ma@intel.com> Reviewed by: Jiewen Yao <jiewen.yao@intel.com> Reviewed by: Giri Mudusuru <giri.p.mudusuru@intel.com> Reviewed by: Liming Gao <liming.gao@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15705 6f19259b-4bc3-4df7-8a09-765794883524
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-19 16:04:45 +0000