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* Remove IntelSiliconPkg that has been moved to edk2-platform repoLiming Gao2019-06-258-855/+0
| | | | | | | | | | BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=1890 Signed-off-by: Liming Gao <liming.gao@intel.com> Cc: Ray Ni <ray.ni@intel.com> Cc: Rangasai V Chaganty <rangasai.v.chaganty@intel.com> Reviewed-by: Ray Ni <ray.ni@intel.com> Reviewed-by: Sai Chaganty <rangasai.v.chaganty@intel.com>
* IntelSiliconPkg: Replace BSD License with BSD+Patent LicenseMichael D Kinney2019-04-098-56/+8
| | | | | | | | | | | | | | | | | | | | https://bugzilla.tianocore.org/show_bug.cgi?id=1373 Replace BSD 2-Clause License with BSD+Patent License. This change is based on the following emails: https://lists.01.org/pipermail/edk2-devel/2019-February/036260.html https://lists.01.org/pipermail/edk2-devel/2018-October/030385.html RFCs with detailed process for the license change: V3: https://lists.01.org/pipermail/edk2-devel/2019-March/038116.html V2: https://lists.01.org/pipermail/edk2-devel/2019-March/037669.html V1: https://lists.01.org/pipermail/edk2-devel/2019-March/037500.html Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com> Reviewed-by: Ray Ni <ray.ni@intel.com>
* IntelSiliconPkg\Include\IndustryStandard: Update IGD_OPREGION_MBOX3 StructureSolanki, Digant H2019-01-311-4/+4
| | | | | | | | | | | | BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=1454 Based on latest IGD OpRegion Spec, IGD_OPREGION_MBOX3 needs to be updated with two new members : Physical Address of Raw VBT Data (RVDA) and Size of Raw VBT Data (RVDS) Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Digant H Solanki <digant.h.solanki@intel.com> Cc: Ray Ni <ray.ni@intel.com> Cc: Liming Gao <liming.gao@intel.com> Cc: Rangasai V Chaganty <rangasai.v.chaganty@intel.com> Reviewed-by: Ray Ni <ray.ni@intel.com>
* IntelSiliconPkg: Move MicrocodeUpdate from UefiCpuPkgStar Zeng2017-11-302-0/+60
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=540 To consume FIT table for Microcode update, UefiCpuPkg/Feature/Capsule/MicrocodeUpdateDxe needs to be updated to consume IntelSiliconPkg/Include/IndustryStandard/FirmwareInterfaceTable.h, but UefiCpuPkg could not depend on IntelSiliconPkg. Since the Microcode update feature is specific to Intel, we can first move the Microcode update feature code from UefiCpuPkg to IntelSiliconPkg [first step], then update the code to consume FIT table [second step]. This patch series is for the first step. Note: No any code change in this patch, just move. Next patch will update MicrocodeUpdate to build with the package. Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Eric Dong <eric.dong@intel.com> Cc: Laszlo Ersek <lersek@redhat.com> Regression-tested-by: Yonghong Zhu <yonghong.zhu@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Star Zeng <star.zeng@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com> Reviewed-by: Eric Dong <eric.dong@intel.com> Acked-by: Laszlo Ersek <lersek@redhat.com>
* IntelSiliconPkg/VTdInfoPpi: Let it follow DMAR table.Jiewen Yao2017-09-201-11/+14
| | | | | | | | | | | | | We notice that there is real usage in PEI to show the graphic out. As such we need report RMRR table in PEI to let VTdPmrPei driver skip the IGD UMA region. Now the VTD_INFO PPI uses the same DMAR data structure. Cc: Star Zeng <star.zeng@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Jiewen Yao <jiewen.yao@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com>
* IntelSiliconPkg/include: Add VTD_INFO PPI.Jiewen Yao2017-09-161-0/+40
| | | | | | | | | | | | | This VTD_INFO_PPI is to provide VTD information in PEI. As such, we can have a generic VTd driver. It is a lightweight version DMAR table, but it does not contain PCI device information. Cc: Star Zeng <star.zeng@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Jiewen Yao <jiewen.yao@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com>
* IntelSiliconPkg/Vtd.h: Add definition for PMR.Jiewen Yao2017-09-161-0/+6
| | | | | | | | | Add missing PMR definition in VTd spec. Cc: Star Zeng <star.zeng@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Jiewen Yao <jiewen.yao@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com>
* IntelSiliconPkg/header: update PlatformVtdPolicyJiewen Yao2017-08-281-1/+50
| | | | | | | | | | | | | | Add flexible exception list format: 1) Support Device scope based reporting: Such as, Seg:0/StartBus:0/(Dev:1C|Func:0)/(Dev:0|Func:0) 2) Support PCI VendorId/DeviceId based reporting Such as, VID:8086|DID:9D2F|Rev:21|SVID:8086|SDID:7270 Cc: Star Zeng <star.zeng@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jiewen Yao <jiewen.yao@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com>
* IntelSiliconPkg: Fix VS2015 NOOPT IA32 build failure in IntelVTdDxeStar Zeng2017-08-111-107/+118
| | | | | | | | | | | | | | | There are VS2015 NOOPT IA32 build failure like below in IntelVTdDxe. XXX.lib(XXX.obj) : error LNK2001: unresolved external symbol __allshl XXX.lib(XXX.obj) : error LNK2001: unresolved external symbol __aullshr This patch is to update Vtd.h to use UINT32 instead of UINT64 for bitfields in structure definition, and also update IntelVTdDxe code accordingly. Cc: Jiewen Yao <jiewen.yao@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Star Zeng <star.zeng@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
* IntelSiliconPkg/Include: Add PlatformVtdPolicy ProtocolJiewen Yao2017-07-271-0/+100
| | | | | | | Cc: Star Zeng <star.zeng@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jiewen Yao <jiewen.yao@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com>
* IntelSiliconPkg/Include: Add VTD industry standard.Jiewen Yao2017-07-271-0/+344
| | | | | | | Cc: Star Zeng <star.zeng@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jiewen Yao <jiewen.yao@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com>
* IntelSiliconPkg: Fix format issuesDandan Bi2016-12-203-3/+3
| | | | | | | | | 1. Fix doxygen formt 2. Fix Guid format Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Dandan Bi <dandan.bi@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
* IntelSiliconPkg: Fixed bug in IgdOpregion specGiri P Mudusuru2016-10-181-1/+3
| | | | | | | | | Spec documents Mailbox3 - RM31 size as 0x45(69) instead of 0x46(70) Cc: Jiewen Yao <jiewen.yao@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Giri P Mudusuru <giri.p.mudusuru@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
* IntelSiliconPkg: Add Intel Firmware Version Info (FVI) definitionsGiri P Mudusuru2016-10-131-0/+60
| | | | | | | | | | Adding Intel Firmware Version Info (FVI) related defines & structures. FVI enables reporting the Firmware Versions using SMBIOS OEM Type. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Giri P Mudusuru <giri.p.mudusuru@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com>
* IntelSiliconPkg: Fixing syntax bug in IGD_OPREGION_HEADERGiri P Mudusuru2016-10-121-1/+1
| | | | | | | | Added missing ; for DVER in IGD_OPREGION_HEADER Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Giri P Mudusuru <giri.p.mudusuru@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
* IntelSiliconPkg: Updated IgdOpregion.h based on latest specGiri P Mudusuru2016-10-071-13/+34
| | | | | | | | | | | | | | Updated IgdOpregion.h to align with latest specification https://01.org/sites/default/files/documentation/skl_opregion_rev0p5.pdf 1) Updated Mailbox structures to align with latest spec 2) Added Mailbox 5 structure 3) Added defines for Signature and Mailbox support Reviewed-by: Jiewen Yao <jiewen.yao@intel.com> Reviewed-by: Maurice Ma <maurice.ma@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Giri P Mudusuru <giri.p.mudusuru@intel.com>
* IntelSiliconPkg: Rename IGD structures to make it consistentMudusuru, Giri P2016-09-031-17/+22
| | | | | | | | | | Renamed INTEL_IGD_* to IGD_* and IGD_OPREGION_VBT to IGD_OPREGION_MBOX4 to make it consistent with file name and other mailbox naming. Cc: Jiewen Yao <jiewen.yao@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Giri P Mudusuru <giri.p.mudusuru@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
* IntelSiliconPkg: Add Firmware Interface Table (FIT) definitionsGiri P Mudusuru2016-08-301-0/+75
| | | | | | | | | | | Adding Processor Firmware Interface Table (FIT) related defines & structures Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Michael Kinney <michael.d.kinney@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Giri P Mudusuru <giri.p.mudusuru@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com> Reviewed-by: Michael Kinney <michael.d.kinney@intel.com>
* IntelSiliconPkg: Fixed VBT size bug, typos and updated commentsMudusuru, Giri P2016-08-231-61/+62
| | | | | | | | | | 1) Fixed the VBT size from 0x1C00(7KB) to 0x1800(6KB) and typos, indentation 2) Updated offsets in hex values and offset from start of OPREGION Cc: Jiewen Yao <jiewen.yao@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Giri P Mudusuru <giri.p.mudusuru@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
* IntelSiliconPkg/IgdOpRegion: Add definition for Intel IGDJiewen Yao2016-06-161-0/+7
| | | | | | | | | | | | | | | | OpRegion. Add IGD OpRegion definition from Intel Integrated Graphics Device OpRegion Specification. at https://01.org/sites/default/files/documentation/acpi_igd_opregion_spec_0.pdf Previous submission seems appears to be cut off. I do not know why. Add missing part here. Cc: Giri P Mudusuru <giri.p.mudusuru@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jiewen Yao <jiewen.yao@intel.com> Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com>
* IntelSiliconPkg/IgdOpRegion: Add definition for Intel IGD OpRegion.Jiewen Yao2016-06-151-0/+119
Add IGD OpRegion definition from Intel Integrated Graphics Device OpRegion Specification. at https://01.org/sites/default/files/documentation/acpi_igd_opregion_spec_0.pdf Cc: Giri P Mudusuru <giri.p.mudusuru@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jiewen Yao <jiewen.yao@intel.com> Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com>
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