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* IntelSiliconPkg/dsc: Add IntelVTdPmrPeim.Jiewen Yao2017-09-161-0/+9
| | | | | | | Cc: Star Zeng <star.zeng@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Jiewen Yao <jiewen.yao@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com>
* IntelSiliconPkg: Add IntelVTdPmrPei.Jiewen Yao2017-09-166-0/+1096
| | | | | | | | | | | | | | | This PEIM is to produce IOMMU_PPI, so that PEI device driver can have better DAM management. This PEIM will setup VTD PMR register to protect most DRAM. It allocates a big chunk DMA buffer in the entrypoint, and only use this buffer for DMA. Any other region is DMA protected. Cc: Star Zeng <star.zeng@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Jiewen Yao <jiewen.yao@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com>
* IntelSiliconPkg/dec: Add VTD_INFO PPI GUIDJiewen Yao2017-09-161-0/+3
| | | | | | | Cc: Star Zeng <star.zeng@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Jiewen Yao <jiewen.yao@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com>
* IntelSiliconPkg/include: Add VTD_INFO PPI.Jiewen Yao2017-09-161-0/+40
| | | | | | | | | | | | | This VTD_INFO_PPI is to provide VTD information in PEI. As such, we can have a generic VTd driver. It is a lightweight version DMAR table, but it does not contain PCI device information. Cc: Star Zeng <star.zeng@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Jiewen Yao <jiewen.yao@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com>
* IntelSiliconPkg/VTdDxe: Disable PMRJiewen Yao2017-09-161-1/+50
| | | | | | | | | | When VTd translation is enabled, PMR can be disable. Or the DMA will be blocked by PMR. Cc: Star Zeng <star.zeng@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Jiewen Yao <jiewen.yao@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com>
* IntelSiliconPkg/Vtd.h: Add definition for PMR.Jiewen Yao2017-09-161-0/+6
| | | | | | | | | Add missing PMR definition in VTd spec. Cc: Star Zeng <star.zeng@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Jiewen Yao <jiewen.yao@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com>
* IntelSiliconPkg/IntelVtd: Consume VTd policy PCDJiewen Yao2017-09-073-2/+12
| | | | | | | Cc: Star Zeng <star.zeng@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jiewen Yao <jiewen.yao@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com>
* IntelSiliconPkg/dec: Add VTd policy PCDJiewen Yao2017-09-071-0/+6
| | | | | | | | | | | | | | BIT0: This is to control if a platform wants to enable VTd based protection during boot. BIT1: This is to control if a platform wants to keep VTd enabled at ExitBootService. The default configuration is BIT0:1, BIT1:0. Cc: Star Zeng <star.zeng@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jiewen Yao <jiewen.yao@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com>
* IntelSiliconPkg/VTd: improve debug message.Jiewen Yao2017-09-061-2/+2
| | | | | | | | | | Add /n for debug message to make error more readable. Suggested-by: Star Zeng <star.zeng@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Jiewen Yao <jiewen.yao@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com>
* IntelSiliconPkg/Vtd: Support CSM usage.Jiewen Yao2017-09-062-5/+5
| | | | | | | | | | | | | Remove zero address check in IoMmuMap. The reason is that a CSM legacy driver may use legacy memory for DMA. As such, the legacyBios need allow below 1M to the legacy device. This patch also fixed some typo. Cc: Star Zeng <star.zeng@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Jiewen Yao <jiewen.yao@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com>
* IntelSiliconPkg/PlatformVTdSample: Avoid using constant result 'if'Hao Wu2017-08-301-14/+24
| | | | | | | | | | | | In this sample driver, if (0) {...} else {...} statements were used to illustrate two different using scenarios. This comment refines the coding style by substituting the 'if (0)' statement with comments to select sample codes for different cases. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Hao Wu <hao.a.wu@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
* IntelSiliconPkg/PlatformVTdSample: update ExceptionDeviceJiewen Yao2017-08-281-10/+70
| | | | | | | | | | Add sample for device scope based exception list and PCI vendor id based exception list. Cc: Star Zeng <star.zeng@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jiewen Yao <jiewen.yao@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com>
* IntelSiliconPkg/IntelVTd: update PlatformVtdPolicyJiewen Yao2017-08-287-161/+423
| | | | | | | | | | | | | | | | 1. Handle flexible exception list format. 1.1 Handle DeviceScope based device info. 1.2 Handle PciDeviceId based device info. 2. Reorg the PCI_DEVICE_INFORMATION 2.1 Merge data pointer reduce allocation times 2.2 Add PCI device id to PCI_DEVICE_INFORMATION 2.3 Rename PciDescriptor to avoid confusing. 3. Fix the debug message too long issue. Cc: Star Zeng <star.zeng@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jiewen Yao <jiewen.yao@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com>
* IntelSiliconPkg/header: update PlatformVtdPolicyJiewen Yao2017-08-281-1/+50
| | | | | | | | | | | | | | Add flexible exception list format: 1) Support Device scope based reporting: Such as, Seg:0/StartBus:0/(Dev:1C|Func:0)/(Dev:0|Func:0) 2) Support PCI VendorId/DeviceId based reporting Such as, VID:8086|DID:9D2F|Rev:21|SVID:8086|SDID:7270 Cc: Star Zeng <star.zeng@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jiewen Yao <jiewen.yao@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com>
* IntelSiliconPkg/IntelVTdDxe: Update function commentsBi, Dandan2017-08-172-0/+3
| | | | | | | | | | | In commit 4ad5f597153c7cb20a968236c2c7d6ff01994350, the parameters of some functions have been updated, but miss to update the comments accordingly. This patch is to update the function comments. Cc: Jiewen Yao <jiewen.yao@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Dandan Bi <dandan.bi@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
* IntelSiliconPkg/IntelVTdDxe: Improve performance.Jiewen Yao2017-08-147-216/+189
| | | | | | | | | | | | | | | This patch is to improve IOMMU performance. All WBINVD is removed due to performance issue. CLFLUSH by WriteBackDataCacheRange() is used to only flush the context table or second level page table if they are changed. This patch also removed some unused functions. Cc: Star Zeng <star.zeng@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jiewen Yao <jiewen.yao@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com>
* IntelSiliconPkg/dsc: Add CacheMaintenanceLib.Jiewen Yao2017-08-141-0/+1
| | | | | | | | | It will be used by IntelVTdDxe. Cc: Star Zeng <star.zeng@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jiewen Yao <jiewen.yao@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com>
* IntelSiliconPkg: Fix VS2015 NOOPT IA32 build failure in IntelVTdDxeStar Zeng2017-08-116-132/+152
| | | | | | | | | | | | | | | There are VS2015 NOOPT IA32 build failure like below in IntelVTdDxe. XXX.lib(XXX.obj) : error LNK2001: unresolved external symbol __allshl XXX.lib(XXX.obj) : error LNK2001: unresolved external symbol __aullshr This patch is to update Vtd.h to use UINT32 instead of UINT64 for bitfields in structure definition, and also update IntelVTdDxe code accordingly. Cc: Jiewen Yao <jiewen.yao@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Star Zeng <star.zeng@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
* edk2: Move License.txt file to rootMichael D Kinney2017-08-031-25/+0
| | | | | | | | | | | | | | | | | | | https://bugzilla.tianocore.org/show_bug.cgi?id=642 Add top level License.txt file with the BSD 2-Clause License that is used by the majority of the EKD II open source project content. Merge copyright statements from the BSD 2-Clause License files in each package directory and remove the duplication License.txt file from package directories. Cc: Leif Lindholm <leif.lindholm@linaro.org> Cc: Andrew Fish <afish@apple.com> Cc: Jordan Justen <jordan.l.justen@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com> Reviewed-by: Jordan Justen <jordan.l.justen@intel.com> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
* edk2: Move TianoCore Contribution Agreement to rootMichael D Kinney2017-08-031-218/+0
| | | | | | | | | | | | | | | | | https://bugzilla.tianocore.org/show_bug.cgi?id=629 Move Contributions.txt that contains the TianoCore Contribution Agreement 1.0 to the root of the edk2 repository and remove the duplicate Contributions.txt files from all packages. Cc: Leif Lindholm <leif.lindholm@linaro.org> Cc: Andrew Fish <afish@apple.com> Cc: Jordan Justen <jordan.l.justen@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com> Reviewed-by: Jordan Justen <jordan.l.justen@intel.com> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
* IntelSiliconPkg/IntelVTdDxe: Add explicit NULL pointer checksHao Wu2017-08-021-2/+4
| | | | | | | | Add explicit NULL pointer check to make the codes more straight-forward. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Hao Wu <hao.a.wu@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
* IntelSiliconPkg/IntelVTdDxe: Fix typo for VTd IOTLB domain IDHao Wu2017-08-021-1/+1
| | | | | | Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Hao Wu <hao.a.wu@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
* IntelSiliconPkg/dsc: Add PlatformVtd sample driver.Jiewen Yao2017-07-271-0/+1
| | | | | | | Cc: Star Zeng <star.zeng@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jiewen Yao <jiewen.yao@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com>
* IntelSiliconPkg: Add PlatformVTdSample driver.Jiewen Yao2017-07-274-0/+438
| | | | | | | | | | It provides sample on Platform VTd policy protocol. This protocol is optional. Cc: Star Zeng <star.zeng@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jiewen Yao <jiewen.yao@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com>
* IntelSiliconPkg/dsc: Add Vtd driver.Jiewen Yao2017-07-271-0/+31
| | | | | | | Cc: Star Zeng <star.zeng@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jiewen Yao <jiewen.yao@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com>
* IntelSiliconPkg: Add VTd driver.Jiewen Yao2017-07-2712-0/+4818
| | | | | | | | | | It provides AllocateBuffer/FreeBuffer/Map/Unmap function. It also provides VTd capability yet. Cc: Star Zeng <star.zeng@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jiewen Yao <jiewen.yao@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com>
* IntelSiliconPkg/Dec: Add ProtocolGuid.Jiewen Yao2017-07-271-0/+3
| | | | | | | Cc: Star Zeng <star.zeng@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jiewen Yao <jiewen.yao@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com>
* IntelSiliconPkg/Include: Add PlatformVtdPolicy ProtocolJiewen Yao2017-07-271-0/+100
| | | | | | | Cc: Star Zeng <star.zeng@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jiewen Yao <jiewen.yao@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com>
* IntelSiliconPkg/Include: Add VTD industry standard.Jiewen Yao2017-07-271-0/+344
| | | | | | | Cc: Star Zeng <star.zeng@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jiewen Yao <jiewen.yao@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com>
* IntelSiliconPkg: Add package DSC fileHao Wu2017-06-261-0/+46
| | | | | | | | https://bugzilla.tianocore.org/show_bug.cgi?id=608 Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Hao Wu <hao.a.wu@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
* IntelSiliconPkg: Fix format issuesDandan Bi2016-12-204-4/+4
| | | | | | | | | 1. Fix doxygen formt 2. Fix Guid format Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Dandan Bi <dandan.bi@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
* IntelSiliconPkg: 0468303 caused to breaking the SMBIOS tables generation codeChan, Amy2016-12-201-120/+14
| | | | | | | | | | | | | | | | Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Star Zeng <star.zeng@intel.com> Cc: Chiu, Chasel <chasel.chiu@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Chan, Amy <amy.chan@intel.com> System test: Smbios tables are correctly published on an intel internal platform. .../DxeSmbiosDataHobLib/DxeSmbiosDataHobLib.c | 134 +++------------------ 1 file changed, 14 insertions(+), 120 deletions(-)
* IntelSiliconPkg: Add DxeSmbiosDataHobLibGiri P Mudusuru2016-11-172-0/+237
| | | | | | | | | | | | | Added NULL Library constructor DxeSmbiosDataHobLib which adds SMBIOS records from gIntelSmbiosDataHobGuid HOB to SMBIOS table using SMBIOS protocol. Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Star Zeng <star.zeng@intel.com> Cc: Michael Kinney <michael.d.kinney@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Giri P Mudusuru <giri.p.mudusuru@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
* IntelSiliconPkg/IntelSiliconPkg.dec: drop bogus semicolon from GUID defLaszlo Ersek2016-11-171-1/+1
| | | | | | | | | | | | | | The DEC spec doesn't allow the trailing semicolon: 2.6 [Guids] Usage GuidCName = {C Format Guid Value} # Comment Cc: Giri P Mudusuru <giri.p.mudusuru@intel.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
* IntelSiliconPkg: Add PCD for Graphics VBT FFS GUIDGiri P Mudusuru2016-11-141-0/+12
| | | | | | | | | | | Added PCD PcdIntelGraphicsVbtFileGuid to store raw format Graphics Video BIOS Table (VBT) in FFS. Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Star Zeng <star.zeng@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Giri P Mudusuru <giri.p.mudusuru@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
* IntelSiliconPkg: Add SMBIOS data HOB GUIDMudusuru, Giri P2016-11-011-0/+7
| | | | | | | | | | | | | | | | Add gIntelSmbiosDataHobGuid used to publish SMBIOS data from PEI phase. The HOB data format will be same as SMBIOS spec define formats for Types 0 to 127 and OEM defined types for 128 to 255. Generic library or DXE driver can add SMBIOS records using this HOB(s). Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Star Zeng <star.zeng@intel.com> Cc: Michael Kinney <michael.d.kinney@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Giri P Mudusuru <giri.p.mudusuru@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com>
* IntelSiliconPkg: Fixed bug in IgdOpregion specGiri P Mudusuru2016-10-181-1/+3
| | | | | | | | | Spec documents Mailbox3 - RM31 size as 0x45(69) instead of 0x46(70) Cc: Jiewen Yao <jiewen.yao@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Giri P Mudusuru <giri.p.mudusuru@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
* IntelSiliconPkg: Add Intel Firmware Version Info (FVI) definitionsGiri P Mudusuru2016-10-131-0/+60
| | | | | | | | | | Adding Intel Firmware Version Info (FVI) related defines & structures. FVI enables reporting the Firmware Versions using SMBIOS OEM Type. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Giri P Mudusuru <giri.p.mudusuru@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com>
* IntelSiliconPkg: Fixing syntax bug in IGD_OPREGION_HEADERGiri P Mudusuru2016-10-121-1/+1
| | | | | | | | Added missing ; for DVER in IGD_OPREGION_HEADER Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Giri P Mudusuru <giri.p.mudusuru@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
* IntelSiliconPkg: Updated IgdOpregion.h based on latest specGiri P Mudusuru2016-10-071-13/+34
| | | | | | | | | | | | | | Updated IgdOpregion.h to align with latest specification https://01.org/sites/default/files/documentation/skl_opregion_rev0p5.pdf 1) Updated Mailbox structures to align with latest spec 2) Added Mailbox 5 structure 3) Added defines for Signature and Mailbox support Reviewed-by: Jiewen Yao <jiewen.yao@intel.com> Reviewed-by: Maurice Ma <maurice.ma@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Giri P Mudusuru <giri.p.mudusuru@intel.com>
* IntelSiliconPkg: Rename IGD structures to make it consistentMudusuru, Giri P2016-09-031-17/+22
| | | | | | | | | | Renamed INTEL_IGD_* to IGD_* and IGD_OPREGION_VBT to IGD_OPREGION_MBOX4 to make it consistent with file name and other mailbox naming. Cc: Jiewen Yao <jiewen.yao@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Giri P Mudusuru <giri.p.mudusuru@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
* IntelSiliconPkg: Add Firmware Interface Table (FIT) definitionsGiri P Mudusuru2016-08-301-0/+75
| | | | | | | | | | | Adding Processor Firmware Interface Table (FIT) related defines & structures Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Michael Kinney <michael.d.kinney@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Giri P Mudusuru <giri.p.mudusuru@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com> Reviewed-by: Michael Kinney <michael.d.kinney@intel.com>
* IntelSiliconPkg: Fixed VBT size bug, typos and updated commentsMudusuru, Giri P2016-08-231-61/+62
| | | | | | | | | | 1) Fixed the VBT size from 0x1C00(7KB) to 0x1800(6KB) and typos, indentation 2) Updated offsets in hex values and offset from start of OPREGION Cc: Jiewen Yao <jiewen.yao@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Giri P Mudusuru <giri.p.mudusuru@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
* IntelSiliconPkg/IgdOpRegion: Add definition for Intel IGDJiewen Yao2016-06-161-0/+7
| | | | | | | | | | | | | | | | OpRegion. Add IGD OpRegion definition from Intel Integrated Graphics Device OpRegion Specification. at https://01.org/sites/default/files/documentation/acpi_igd_opregion_spec_0.pdf Previous submission seems appears to be cut off. I do not know why. Add missing part here. Cc: Giri P Mudusuru <giri.p.mudusuru@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jiewen Yao <jiewen.yao@intel.com> Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com>
* IntelSiliconPkg/IgdOpRegion: Add definition for Intel IGD OpRegion.Jiewen Yao2016-06-151-0/+119
| | | | | | | | | | | Add IGD OpRegion definition from Intel Integrated Graphics Device OpRegion Specification. at https://01.org/sites/default/files/documentation/acpi_igd_opregion_spec_0.pdf Cc: Giri P Mudusuru <giri.p.mudusuru@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jiewen Yao <jiewen.yao@intel.com> Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com>
* IntelSiliconPkg: Add initial version.Jiewen Yao2016-06-153-0/+267
This package will include open source common Intel silicon related modules. Cc: Giri P Mudusuru <giri.p.mudusuru@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jiewen Yao <jiewen.yao@intel.com> Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com>
generated by cgit v1.2.3 (git 2.25.1) at 2024-08-11 19:37:46 +0000