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* MdePkg/BaseLib: RISC-V: Add few more helper functionsSunil V L2023-02-165-4/+129
| | | | | | | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4076 Few of the basic helper functions required for any RISC-V CPU were added in edk2-platforms. To support qemu virt, they need to be added in BaseLib. Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Zhiguang Liu <zhiguang.liu@intel.com> Cc: Daniel Schaefer <git@danielschaefer.me> Signed-off-by: Sunil V L <sunilvl@ventanamicro.com> Acked-by: Abner Chang <abner.chang@amd.com> Reviewed-by: Andrei Warkentin <andrei.warkentin@intel.com> Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
* MdePkg: Added Call for AfterReadyToBoot EventRobert Phelps2023-02-152-0/+15
| | | | | | | | | | | In the function EfiSignalEventReadyToBoot, Code was added to also create, signal, and close the AfterReadyToBoot event. Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Zhiguang Liu <zhiguang.liu@intel.com> Signed-off-by: Robert Phelps <robert@ami.com> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
* MdePkg/UnitTestHostBaseLib: Remove HOST_APPLICATION limitationLiu, Zhiguang2022-12-141-3/+6
| | | | | | | | | | | Remove HOST_APPLICATION limitation for UnitTestHostBaseLib, so that this library can be used as BaseLib by Emulator. Also, add some missing files Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Signed-off-by: Ray Ni <ray.ni@intel.com> Signed-off-by: Zhiguang Liu <zhiguang.liu@intel.com>
* MdePkg/BaseCpuLib: Remove assembly for CpuFlushTlbLiu, Zhiguang2022-12-145-97/+5
| | | | | | | | | | | | For different compilers, both IA32 and X64 can use Ia32/CpuFlushTlbGcc.c, which is C code (no inline assembly code). To simplify, remove other assemly file for CpuFlushTlb, and rename Ia32/CpuFlushTlbGcc.c to X86CpuFlushTlb.c. Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Signed-off-by: Ray Ni <ray.ni@intel.com> Signed-off-by: Zhiguang Liu <zhiguang.liu@intel.com>
* BaseSynchronizationLib: Fix RISC-V helper nameSunil V L2022-11-292-4/+2
| | | | | | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4143 Fix the name of InternalSyncCompareExchange64() function. Signed-off-by: Sunil V L <sunilvl@ventanamicro.com> Reported-by: Zhihao Li <zhihao.li@intel.com> Tested-by: Zhihao Li <zhihao.li@intel.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Zhiguang Liu <zhiguang.liu@intel.com> Cc: Daniel Schaefer <git@danielschaefer.me> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
* MdePkg/BaseLib: Fix out-of-bounds reads in SafeStringPedro Falcato2022-11-071-4/+21
| | | | | | | | | | | | | | | | | | There was a OOB access in *StrHexTo* functions, when passed strings like "XDEADBEEF". OpenCore folks established an ASAN-equipped project to fuzz Ext4Dxe, which was able to catch these (mostly harmless) issues. Cc: Vitaly Cheptsov <vit9696@protonmail.com> Cc: Marvin H?user <mhaeuser@posteo.de> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Zhiguang Liu <zhiguang.liu@intel.com> Signed-off-by: Pedro Falcato <pedro.falcato@gmail.com> Acked-by: Michael D Kinney <michael.d.kinney@intel.com> Reviewed-by: Jiewen Yao <Jiewen.yao@Intel.com> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
* MdePkg/ArmTrngLib: Add NULL instance of Arm TRNG LibrarySami Mujawar2022-11-063-0/+163
| | | | | | | | | | | | | | Bugzilla: 3668 (https://bugzilla.tianocore.org/show_bug.cgi?id=3668) The Arm True Random Number Generator (TRNG) library defines an interface to access the entropy source on a platform. On platforms that do not have access to an entropy source, a NULL instance of the TRNG library may be useful to satisfy the build dependency. Therefore, add a NULL instance of the Arm TRNG library. Signed-off-by: Pierre Gondois <pierre.gondois@arm.com> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
* MdePkg/BaseSafeIntLib: Add LoongArch64 architecture for BaseSafeIntLib.Chao Li2022-10-141-4/+5
| | | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4053 Add LoongArch64 architecture for BaseSafeIntLib library. Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Zhiguang Liu <zhiguang.liu@intel.com> Signed-off-by: Chao Li <lichao@loongson.cn> Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
* MdePkg/BaseSynchronizationLib: LoongArch cache related code.Chao Li2022-10-143-0/+361
| | | | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4053 Support LoongArch cache related functions. Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Zhiguang Liu <zhiguang.liu@intel.com> Signed-off-by: Chao Li <lichao@loongson.cn> Co-authored-by: Baoqi Zhang <zhangbaoqi@loongson.cn> Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
* MdePkg/BaseCpuLib: LoongArch Base CPU library implementation.Chao Li2022-10-144-3/+39
| | | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4053 Implement LoongArch CPU related functions in BaseCpuLib. Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Zhiguang Liu <zhiguang.liu@intel.com> Signed-off-by: Chao Li <lichao@loongson.cn> Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
* MdePkg/BasePeCoff: Add LoongArch PE/Coff related code.Chao Li2022-10-144-1/+146
| | | | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4053 Add LoongArch image relocation. Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Zhiguang Liu <zhiguang.liu@intel.com> Signed-off-by: Chao Li <lichao@loongson.cn> Co-authored-by: Baoqi Zhang <zhangbaoqi@loongson.cn> Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
* MdePkg/BaseIoLibIntrinsic: IoLibNoIo for LoongArch architecture.Chao Li2022-10-142-4/+9
| | | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4053 LoongArch MMIO library instance, use the IoLibNoIo. Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Zhiguang Liu <zhiguang.liu@intel.com> Signed-off-by: Chao Li <lichao@loongson.cn> Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
* MdePkg/BaseCacheMaintenanceLib: LoongArch cache maintenance implementation.Chao Li2022-10-142-1/+259
| | | | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4053 Implement LoongArch cache maintenance functions in BaseCacheMaintenanceLib. Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Zhiguang Liu <zhiguang.liu@intel.com> Signed-off-by: Chao Li <lichao@loongson.cn> Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
* MdePkg/BaseLib: BaseLib for LOONGARCH64 architecture.Chao Li2022-10-1411-1/+339
| | | | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4053 Add LoongArch LOONGARCH64 BaseLib functions. Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Zhiguang Liu <zhiguang.liu@intel.com> Signed-off-by: Chao Li <lichao@loongson.cn> Co-authored-by: Baoqi Zhang <zhangbaoqi@loongson.cn> Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
* MdePkg/DxeServicesLib: Add LOONGARCH64 architectureChao Li2022-10-141-2/+2
| | | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4053 Add LOONGARCH64 architecture to MdePkg/DxeServiceLib. Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Zhiguang Liu <zhiguang.liu@intel.com> Signed-off-by: Chao Li <lichao@loongson.cn> Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
* MdePkg/Library/UefiDevicePathLib: Add back StandaloneMm INF fileMichael D Kinney2022-08-101-0/+78
| | | | | | | | | | | | | | | | | | | REF: https://github.com/tianocore/edk2/pull/3130 The above PR removed UefiDevicePathLibStandaloneMm.inf, which is a non-backwards compatible change and does not provide time for downstream platforms to use the UefiDevicePathLibBase.inf. Add UefiDevicePathLibStandaloneMm.inf back, but add comments that it is deprecated and that UefiDevicePathLibBase.inf should be used instead. Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Zhiguang Liu <zhiguang.liu@intel.com> Cc: Mateusz Albecki <mateusz.albecki@intel.com> Cc: Yanbo Huang <yanbo.huang@intel.com> Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
* MdePkg/UefiDevicePathLib: Add support for PEIMsMateusz Albecki2022-07-232-3/+3
| | | | | | | | | | | | | DevicePathLib utilities are useful in PEI to locate the devices which need an opal unlock on S3 resume. This commit reuses the implementation done for standalone MM support and makes the StandaloneMm library Base. Signed-off-by: Mateusz Albecki <mateusz.albecki@intel.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Zhiguang Liu <zhiguang.liu@intel.com> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
* MdePkg/BaseLib: Add CRC16-ANSI and CRC32c implementationsPedro Falcato2022-06-131-0/+144
| | | | | | | | | | | | | | BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3871 Add the CRC16-ANSI and CRC32C implementations previously found at Features/Ext4Pkg/Ext4Dxe/Crc{16,32c}.c to BaseLib. Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Zhiguang Liu <zhiguang.liu@intel.com> Signed-off-by: Pedro Falcato <pedro.falcato@gmail.com> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
* MdePkg: Remove "assert" from SmmCpuRendevousLibNull.cZhihao Li2022-06-131-1/+0
| | | | | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3931 Some drivers will break down when they use SmmWaitForAllProcessor() which from SmmCpuRendezvousLibNull.c. Removing the code "ASSERT(False)" will make consumer work normally if they keep default setting for sync mode. Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Signed-off-by: Zhihao Li <zhihao.li@intel.com> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
* MdePkg: Remove RVCT supportRebecca Cran2022-05-137-30/+0
| | | | | | | | RVCT is obsolete and no longer used. Remove support for it. Signed-off-by: Rebecca Cran <quic_rcran@quicinc.com> Reviewed-by: Ard Biesheuvel <ardb@kernel.org>
* MdePkg: add SmmCpuRendezvousLib.h and SmmCpuRendezvousLibNull implement.Li, Zhihao2022-05-092-0/+55
| | | | | | | | | | | | | | | | | | | | | | | | | | | REF? https://bugzilla.tianocore.org/show_bug.cgi?id=3912 UefiCpuPkg define a new Protocol with the new services SmmWaitForAllProcessor(), which can be used by SMI handler to optionally wait for other APs to complete SMM rendezvous in relaxed AP mode. VariableSmm and VariableStandaloneMM driver in MdeModulePkg need to use this services but MdeModulePkg can't depend on UefiCpuPkg. Thus, the solution is moving SmmCpuRendezvouslib.h from UefiCpuPkg to MdePkg and creating SmmCpuRendezvousLib NullLib version implementation in MdePkg as dependency for the pkg that can't depend on UefiCpuPkg. Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Eric Dong <eric.dong@intel.com> Cc: Ray Ni <ray.ni@intel.com> Cc: Michael Kubacki <mikuback@linux.microsoft.com> Cc: Siyuan Fu <siyuan.fu@intel.com> Signed-off-by: Zhihao Li <zhihao.li@intel.com> Acked-by: Liming Gao <gaoliming@byosoft.com.cn>
* MdePkg: Probe Cc guest in BaseIoLibIntrinsicSevMin Xu2022-04-192-11/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3902 Bad IO performance in SEC phase is observed after TDX features was introduced. (after commit b6b2de884864 - "MdePkg: Support mmio for Tdx guest in BaseIoLibIntrinsic"). This is because IsTdxGuest() will be called in each MMIO operation. It is trying to cache the result of the probe in the efi data segment. However, that doesn't work in SEC, because the data segment is read only (so the write seems to succeed but a read will always return the original value), leading to us calling TdIsEnabled() check for every mmio we do, which is causing the slowdown because it's very expensive. This patch is to call CcProbe instead of TdIsEnabled in IsTdxGuest. Null instance of CcProbe always returns CCGuestTypeNonEncrypted. Its OvmfPkg version returns the guest type in Ovmf work area. Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Zhiguang Liu <zhiguang.liu@intel.com> Cc: James Bottomley <jejb@linux.ibm.com> Cc: James Bottomley <James.Bottomley@HansenPartnership.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Gerd Hoffmann <kraxel@redhat.com> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com> Reviewed-by: Tom Lendacky <thomas.lendacky@amd.com> Signed-off-by: Min Xu <min.m.xu@intel.com>
* MdePkg: Add CcProbeLibNullMin Xu2022-04-192-0/+47
| | | | | | | | | | | | | | | | | | | | | BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3902 CcProbeLib is used to probe the Confidential Computing guest type. This library is designed to run on SEC / PEI / DXE phases. A null instance of the library always returns CCGuestTypeNonEncrypted. A platform specific CcProbeLib will be implemented, for example, in OvmfPkg. Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Zhiguang Liu <zhiguang.liu@intel.com> Cc: James Bottomley <jejb@linux.ibm.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Gerd Hoffmann <kraxel@redhat.com> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com> Reviewed-by: Tom Lendacky <thomas.lendacky@amd.com> Signed-off-by: Min Xu <min.m.xu@intel.com>
* MdePkg: Support IoRead/IoWrite for Tdx guest in BaseIoLibIntrinsicMin Xu2022-04-022-25/+99
| | | | | | | | | | | | | | | | | | | | | | RFC: https://bugzilla.tianocore.org/show_bug.cgi?id=3429 This commit supports IoRead/IoWrite for SEV/TDX/Legacy guest in one binary. It checks the guest type in runtime and then call corresponding functions. Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Zhiguang Liu <zhiguang.liu@intel.com> Cc: Brijesh Singh <brijesh.singh@amd.com> Cc: Erdem Aktas <erdemaktas@google.com> Cc: James Bottomley <jejb@linux.ibm.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Tom Lendacky <thomas.lendacky@amd.com> Cc: Gerd Hoffmann <kraxel@redhat.com> Acked-by: Gerd Hoffmann <kraxel@redhat.com> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com> Signed-off-by: Min Xu <min.m.xu@intel.com>
* MdePkg: Support IoFifo for Tdx guest in BaseIoLibIntrinsicMin Xu2022-04-024-17/+402
| | | | | | | | | | | | | | | | | | | | | | | RFC: https://bugzilla.tianocore.org/show_bug.cgi?id=3429 Previously IoFifo functions are in X64/IoFifoSev.nasm which supports both SEV guest and Legacy guest. IoLibFifo.c is introduced to support SEV/TDX/Legacy guest in one binary. It checks the guest type in runtime and call corresponding functions then. Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Zhiguang Liu <zhiguang.liu@intel.com> Cc: Brijesh Singh <brijesh.singh@amd.com> Cc: Erdem Aktas <erdemaktas@google.com> Cc: James Bottomley <jejb@linux.ibm.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Tom Lendacky <thomas.lendacky@amd.com> Cc: Gerd Hoffmann <kraxel@redhat.com> Acked-by: Gerd Hoffmann <kraxel@redhat.com> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com> Signed-off-by: Min Xu <min.m.xu@intel.com>
* MdePkg: Support mmio for Tdx guest in BaseIoLibIntrinsicMin Xu2022-04-023-8/+78
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | RFC: https://bugzilla.tianocore.org/show_bug.cgi?id=3429 TDVF access MMIO with TDG.VP.VMCALL to invoke VMM provided emulation functions. If the access to MMIO fails, it fall backs to the direct access. BaseIoLibIntrinsic.inf is the IoLib used by other packages. It will not support I/O in Td guest. But some files are shared between BaseIoLibIntrinsic and BaseIoLibIntrinsicSev (IoLib.c is the example). So IoLibInternalTdxNull.c (which holds the null stub of the Td I/O routines) is included in BaseIoLibIntrinsic.inf. BaseIoLibIntrinsic.inf doesn't import TdxLib so that the Pkgs which include BaseIoLibIntrinsic.inf need not include TdxLib. Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Zhiguang Liu <zhiguang.liu@intel.com> Cc: Brijesh Singh <brijesh.singh@amd.com> Cc: Erdem Aktas <erdemaktas@google.com> Cc: James Bottomley <jejb@linux.ibm.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Tom Lendacky <thomas.lendacky@amd.com> Cc: Gerd Hoffmann <kraxel@redhat.com> Acked-by: Gerd Hoffmann <kraxel@redhat.com> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com> Signed-off-by: Min Xu <min.m.xu@intel.com>
* MdePkg: Add helper functions for Tdx guest in BaseIoLibIntrinsicMin Xu2022-04-024-0/+1583
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | RFC: https://bugzilla.tianocore.org/show_bug.cgi?id=3429 Intel TDX architecture does not prescribe a specific software convention to perform I/O from the guest TD. Guest TD providers have many choices to provide I/O to the guest. The common I/O models are emulated devices, para-virtualized devices, SRIOV devices and Direct Device assignments. TDVF chooses para-virtualized I/O (Choice-A) which use the TDG.VP.VMCALL function to invoke the funtions provided by the host VMM to perform I/O. Another choice (Choice-B) is the emulation performed by the #VE handler. There are 2 benefits of para-virtualized I/O: 1. Performance. VMEXIT/VMENTRY is skipped so that the performance is better than #VE handler. 2. De-couple with #VE handler. Choice-B depends on the #VE handler which means I/O is not available until #VE handler is installed. For example, in PEI phase #VE handler is installed in CpuMpPei, while communication with Qemu (via I/O port) happen earlier than it. IoLibInternalTdx.c provides the helper functions for Tdx guest. IoLibInternalTdxNull.c provides the null version of the helper functions. It is included in the Non-X64 IoLib so that the build will not be broken. Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Zhiguang Liu <zhiguang.liu@intel.com> Cc: Brijesh Singh <brijesh.singh@amd.com> Cc: Erdem Aktas <erdemaktas@google.com> Cc: James Bottomley <jejb@linux.ibm.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Tom Lendacky <thomas.lendacky@amd.com> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com> Signed-off-by: Min Xu <min.m.xu@intel.com>
* MdePkg: Add TdxLib to wrap Tdx operationsMin Xu2022-04-025-0/+523
| | | | | | | | | | | | | | | | | | | | | | | | | | | | RFC: https://bugzilla.tianocore.org/show_bug.cgi?id=3429 TdxLib is created with functions to perform the related Tdx operation. This includes functions for: - TdAcceptPages : Accept pending private pages and initialize the pages to all-0 using the TD ephemeral private key. - TdExtendRtmr : Extend measurement to one of the RTMR registers. - TdSharedPageMask: Get the Td guest shared page mask which indicates it is a Shared or Private page. - TdMaxVCpuNum : Get the maximum number of virtual CPUs. - TdVCpuNum : Get the number of virtual CPUs. Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Zhiguang Liu <zhiguang.liu@intel.com> Cc: Brijesh Singh <brijesh.singh@amd.com> Cc: Erdem Aktas <erdemaktas@google.com> Cc: James Bottomley <jejb@linux.ibm.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Tom Lendacky <thomas.lendacky@amd.com> Cc: Gerd Hoffmann <kraxel@redhat.com> Acked-by: Gerd Hoffmann <kraxel@redhat.com> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com> Signed-off-by: Min Xu <min.m.xu@intel.com>
* MdePkg: Introduce basic Tdx functions in BaseLibMin Xu2022-04-025-0/+380
| | | | | | | | | | | | | | | | | | | | | | | RFC: https://bugzilla.tianocore.org/show_bug.cgi?id=3429 Introduce basic Tdx functions in BaseLib: - TdCall () - TdVmCall () - TdIsEnabled () Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Zhiguang Liu <zhiguang.liu@intel.com> Cc: Brijesh Singh <brijesh.singh@amd.com> Cc: Erdem Aktas <erdemaktas@google.com> Cc: James Bottomley <jejb@linux.ibm.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Tom Lendacky <thomas.lendacky@amd.com> Cc: Gerd Hoffmann <kraxel@redhat.com> Acked-by: Gerd Hoffmann <kraxel@redhat.com> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com> Signed-off-by: Min Xu <min.m.xu@intel.com>
* MdePkg: Replace Opcode with the corresponding instructions.Jason2022-03-0142-175/+116
| | | | | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3790 Replace Opcode with the corresponding instructions. The code changes have been verified with CompareBuild.py tool, which can be used to compare the results of two different EDK II builds to determine if they generate the same binaries. (tool link: https://github.com/mdkinney/edk2/tree/sandbox/CompareBuild) Signed-off-by: Jason Lou <yun.lou@intel.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn> Cc: Zhiguang Liu <zhiguang.liu@intel.com>
* MdePkg: Apply uncrustify changesMichael Kubacki2021-12-07420-14829/+15329
| | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3737 Apply uncrustify changes to .c/.h files in the MdePkg package Cc: Andrew Fish <afish@apple.com> Cc: Leif Lindholm <leif@nuviainc.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
* MdePkg: Change complex DEBUG_CODE() to DEBUG_CODE_BEGIN/END()Michael D Kinney2021-12-071-2/+2
| | | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3767 Update use of DEBUG_CODE(Expression) if Expression is a complex code block with if/while/for/case statements that use {}. Cc: Andrew Fish <afish@apple.com> Cc: Leif Lindholm <leif@nuviainc.com> Cc: Michael Kubacki <michael.kubacki@microsoft.com> Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
* MdePkg: Change OPTIONAL keyword usage styleMichael D Kinney2021-12-0749-236/+227
| | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3760 Update all use of ', OPTIONAL' to ' OPTIONAL,' for function params. Cc: Andrew Fish <afish@apple.com> Cc: Leif Lindholm <leif@nuviainc.com> Cc: Michael Kubacki <michael.kubacki@microsoft.com> Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
* MdePkg: Change use of EFI_D_* to DEBUG_*Michael D Kinney2021-12-075-30/+28
| | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3739 Update all use of EFI_D_* defines in DEBUG() macros to DEBUG_* defines. Cc: Andrew Fish <afish@apple.com> Cc: Leif Lindholm <leif@nuviainc.com> Cc: Michael Kubacki <michael.kubacki@microsoft.com> Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
* MdePkg: Reproduce builds across source format changesMichael D Kinney2021-11-081-1/+1
| | | | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3688 * Use DEBUG_LINE_NUMBER instead of __LINE__. * Use DEBUG_EXPRESSION_STRING instead of #Expression. Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Zhiguang Liu <zhiguang.liu@intel.com> Cc: Michael Kubacki <michael.kubacki@microsoft.com> Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com> Tested-by: Michael Kubacki <michael.kubacki@microsoft.com> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
* MdePkg/BaseLib: Add QuickSort function on BaseLibIanX Kuo2021-10-133-1/+119
| | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3675 Add QuickSort function into BaseLib Reviewed-by: Ray Ni <ray.ni@intel.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn> Cc: Zhiguang Liu <zhiguang.liu@intel.com> Signed-off-by: IanX Kuo <ianx.kuo@intel.com>
* MdePkg/BaseLib: Add MemoryFence implementation for RiscV64Abner Chang2021-07-212-1/+24
| | | | | | | | | | | Cc: Abner Chang <abner.chang@hpe.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Zhiguang Liu <zhiguang.liu@intel.com> Cc: Leif Lindholm <leif@nuviainc.com> Signed-off-by: Daniel Schaefer <daniel.schaefer@hpe.com> Reviewed-by: Abner Chang <abner.chang@hpe.com> Acked-by: Liming Gao <gaoliming@byosoft.com.cn>
* MdePkg/BaseLib: Fix AsmReadSs() with GCC toolchainSatoshi Tanda2021-06-042-2/+2
| | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3405 AsmReadSs() in Ia32/GccInlinePriv.c and X64/GccInlinePriv.c return the DS segment selector value instead of SS. Signed-off-by: Satoshi Tanda <tanda.sat@gmail.com> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn> Reviewed-by: Laszlo Ersek <lersek@redhat.com>
* MdePkg/BaseLib: add support for RMPADJUST instructionTom Lendacky2021-05-292-0/+41
| | | | | | | | | | | | | | | | | | | | | | | | | BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3275 The RMPADJUST instruction will be used by the SEV-SNP guest to modify the RMP permissions for a guest page. See AMD APM volume 3 for further details. Cc: James Bottomley <jejb@linux.ibm.com> Cc: Min Xu <min.m.xu@intel.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Tom Lendacky <thomas.lendacky@amd.com> Cc: Jordan Justen <jordan.l.justen@intel.com> Cc: Ard Biesheuvel <ardb+tianocore@kernel.org> Cc: Laszlo Ersek <lersek@redhat.com> Cc: Erdem Aktas <erdemaktas@google.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Zhiguang Liu <zhiguang.liu@intel.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn> Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com> Signed-off-by: Brijesh Singh <brijesh.singh@amd.com> Message-Id: <20210519181949.6574-9-brijesh.singh@amd.com>
* MdePkg/BaseLib: add support for PVALIDATE instructionBrijesh Singh2021-05-292-0/+43
| | | | | | | | | | | | | | | | | | | | | | | | | | | | BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3275 The PVALIDATE instruction validates or rescinds validation of a guest page RMP entry. Upon completion, a return code is stored in EAX, rFLAGS bits OF, ZF, AF, PF and SF are set based on this return code. If the instruction completed succesfully, the rFLAGS bit CF indicates if the contents of the RMP entry were changed or not. For more information about the instruction see AMD APM volume 3. Cc: James Bottomley <jejb@linux.ibm.com> Cc: Min Xu <min.m.xu@intel.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Tom Lendacky <thomas.lendacky@amd.com> Cc: Jordan Justen <jordan.l.justen@intel.com> Cc: Ard Biesheuvel <ardb+tianocore@kernel.org> Cc: Laszlo Ersek <lersek@redhat.com> Cc: Erdem Aktas <erdemaktas@google.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Zhiguang Liu <zhiguang.liu@intel.com> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Signed-off-by: Brijesh Singh <brijesh.singh@amd.com> Message-Id: <20210519181949.6574-8-brijesh.singh@amd.com>
* MdePkg/BaseRngLib: Add support for ARMv8.5 RNG instructionsRebecca Cran2021-05-1111-50/+594
| | | | | | | | | | Make BaseRngLib more generic by moving x86-specific functionality into 'Rand' and adding files under 'AArch64' to support the optional ARMv8.5 RNG instruction RNDR that is a part of FEAT_RNG. Signed-off-by: Rebecca Cran <rebecca@nuviainc.com> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
* MdePkg: Fix AsmReadMsr64() and AsmWriteMsr64() with GCC toolchainTakuto Naito2021-04-141-4/+3
| | | | | | | | | | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3325 1. AsmReadMsr64() in X64/GccInlinePriv.c AsmReadMsr64 can return uninitialized value if FilterBeforeMsrRead returns False. This causes build error with the CLANG toolchain. 2. AsmWriteMsr64() in X64/GccInlinePriv.c In the case that FilterBeforeMsrWrite changes Value and returns True, The original Value, not the changed Value, is written to the MSR. This behavior is different from the one of AsmWriteMsr64() in X64/WriteMsr64.c for the MSFT toolchain. Signed-off-by: Takuto Naito <naitaku@gmail.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Zhiguang Liu <zhiguang.liu@intel.com> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
* MdePkg/Baseib: Filter/trace MSR access for IA32/X64Dandan Bi2021-04-087-43/+129
| | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3246 Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Zhiguang Liu <zhiguang.liu@intel.com> Signed-off-by: Dandan Bi <dandan.bi@intel.com> Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn> Acked-by: Ard Biesheuvel <ardb@kernel.org>
* MdePkg/IoLib: Filter/trace port IO/MMIO accessDandan Bi2021-04-089-73/+329
| | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3246 Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Zhiguang Liu <zhiguang.liu@intel.com> Signed-off-by: Dandan Bi <dandan.bi@intel.com> Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn> Acked-by: Ard Biesheuvel <ardb@kernel.org>
* MdePkg/BaseLib: Add support for the XSETBV instructionJiaxin Wu2021-04-063-1/+71
| | | | | | | | | | | | | | | | | | | | | | | *v2: refine the coding format. https://bugzilla.tianocore.org/show_bug.cgi?id=3284 This patch is to support XSETBV instruction so as to support Extended Control Register(XCR) write. Extended Control Register(XCR) read has already been supported by below commit to support XGETBV instruction: 9b3ca509abd4e45439bbdfe2c2fa8780c950320a Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Zhiguang Liu <zhiguang.liu@intel.com> Cc: Ni Ray <ray.ni@intel.com> Cc: Yao Jiewen <jiewen.yao@intel.com> Signed-off-by: Jiaxin Wu <Jiaxin.wu@intel.com> Signed-off-by: Zhang Hongbin1 <hongbin1.zhang@intel.com> Reviewed-by: Ray Ni <ray.ni@intel.com> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
* MdePkg: Add RegisterFilterLib class and NULL instanceDandan Bi2021-03-303-0/+307
| | | | | | | | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3246 1. Add a new library class (RegisterFilterLib) to filter and trace port IO/MMIO/MSR access. 2. Add a NULL instance (RegisterFilterLibNull) can be used to keep current behavior. Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Zhiguang Liu <zhiguang.liu@intel.com> Signed-off-by: Dandan Bi <dandan.bi@intel.com> Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com> Acked-by: Ard Biesheuvel <ardb@kernel.org> Reviewed-by: Abner Chang <abner.chang@hpe.com>
* MdePkg: use CpuPause() in CpuDeadLoop()Ankur Arora2021-03-251-1/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CpuPause() might allow the CPU to go into a lower power state state while we spin. On X86, CpuPause() executes a PAUSE instruction which the Intel and AMD specs describe as follows: Intel: "PAUSE: An additional function of the PAUSE instruction is to reduce the power consumed by a processor while executing a spin loop. A processor can execute a spin-wait loop extremely quickly, causing the processor to consume a lot of power while it waits for the resource it is spinning on to become available. Inserting a pause instruction in a spin-wait loop greatly reduces the processor?s power consumption." AMD: "PAUSE: Improves the performance of spin loops, by providing a hint to the processor that the current code is in a spin loop. The processor may use this to optimize power consumption while in the spin loop. Architecturally, this instruction behaves like a NOP instruction." On RISC-V and ARM64, CpuPause() executes a NOP, which is no worse than the tight loop we have. Cc: Liming Gao <gaoliming@byosoft.com.cn> Signed-off-by: Ankur Arora <ankur.a.arora@oracle.com> Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
* MdePkg: Support standalone MM Driver Unload capabilityJiaxin Wu2021-03-182-2/+59
| | | | | | | | | | | | | | https://bugzilla.tianocore.org/show_bug.cgi?id=3240 This patch is to support standalone MM Driver Unload capability by providing _DriverUnloadHandler() function. Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Zhiguang Liu <zhiguang.liu@intel.com> Cc: Siyuan Fu <siyuan.fu@intel.com> Signed-off-by: Jiaxin Wu <Jiaxin.wu@intel.com> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
* MdePkg/UefiLib: Correct the arguments passed to IsLanguageSupported()Chandramohan Akula2021-03-171-2/+2
| | | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3211 Correct the arguments passed to the IsLanguageSupported() function in AddUnicodeString2() and LookupUnicodeString2() as expected by the function Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Zhiguang Liu <zhiguang.liu@intel.com> Signed-off-by: Chandramohan Akula <chandramohan.akula@broadcom.com> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
* MdePkg: MmUnblockMemoryLib: Added definition and null instanceKun Qin2021-03-053-0/+99
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3168 This interface provides an abstration layer to allow MM modules to access requested areas that are outside of MMRAM. On MM model that blocks all non-MMRAM accesses, areas requested through this API will be mapped or unblocked for accessibility inside MM environment. For MM modules that need to access regions outside of MMRAMs, the agents that set up these regions are responsible for invoking this API in order for these memory areas to be accessible from inside MM. Example usages: 1. To enable runtime cache feature for variable service, Variable MM module will need to access the allocated runtime buffer. Thus the agent sets up these buffers, VariableSmmRuntimeDxe, will need to invoke this API to make these regions accessible by Variable MM. 2. For TPM ACPI table to communicate to physical presence handler, the corresponding NVS region has to be accessible from inside MM. Once the NVS region are assigned, it needs to be unblocked thourgh this API. Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Zhiguang Liu <zhiguang.liu@intel.com> Cc: Hao A Wu <hao.a.wu@intel.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Laszlo Ersek <lersek@redhat.com> Signed-off-by: Kun Qin <kun.q@outlook.com> Acked-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn> Message-Id: <MWHPR06MB31028AF0D0785B93E4E7CF63F3969@MWHPR06MB3102.namprd06.prod.outlook.com>
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