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* MdePkg/BaseLib: RISC-V: Add few more helper functionsSunil V L2023-02-166-4/+179
| | | | | | | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4076 Few of the basic helper functions required for any RISC-V CPU were added in edk2-platforms. To support qemu virt, they need to be added in BaseLib. Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Zhiguang Liu <zhiguang.liu@intel.com> Cc: Daniel Schaefer <git@danielschaefer.me> Signed-off-by: Sunil V L <sunilvl@ventanamicro.com> Acked-by: Abner Chang <abner.chang@amd.com> Reviewed-by: Andrei Warkentin <andrei.warkentin@intel.com> Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
* MdePkg/Register: Add register definition header files for RISC-VSunil V L2023-02-162-0/+144
| | | | | | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4076 Add register definitions and access routines for RISC-V. These headers are leveraged from opensbi repo. Cc: Daniel Schaefer <git@danielschaefer.me> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Zhiguang Liu <zhiguang.liu@intel.com> Signed-off-by: Sunil V L <sunilvl@ventanamicro.com> Acked-by: Abner Chang <abner.chang@amd.com> Reviewed-by: Andrei Warkentin <andrei.warkentin@intel.com> Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
* MdePkg: Added Call for AfterReadyToBoot EventRobert Phelps2023-02-152-0/+15
| | | | | | | | | | | In the function EfiSignalEventReadyToBoot, Code was added to also create, signal, and close the AfterReadyToBoot event. Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Zhiguang Liu <zhiguang.liu@intel.com> Signed-off-by: Robert Phelps <robert@ami.com> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
* MdePkg: Add After Ready To Boot Event Definition from UEFI 2.9Robert Phelps2023-02-152-0/+8
| | | | | | | | | | Add After Ready To Boot Event Definitions Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Zhiguang Liu <zhiguang.liu@intel.com> Signed-off-by: Robert Phelps <robert@ami.com> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
* MdePkg: Add NVMe boot partition header definitionWeipu Zhu2023-02-101-0/+13
| | | | | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4304 Add NVMe boot partition header definition to NVMe.h according to NVMe spec 2.0. Cc: Hao Wu <hao.a.wu@intel.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Zhiguang Liu <zhiguang.liu@intel.com> Signed-off-by: Weipu Zhu <weipu.zhu@intel.com> Reviewed-by: Hao A Wu <hao.a.wu@intel.com> Acked-by: Michael D Kinney <michael.d.kinney@intel.com>
* MdePkg: Add RPMB related commands and DCB definition for NVMeWeipu Zhu2023-02-101-1/+45
| | | | | | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4303 Add RPMB(Replay Protected Memory Block) access commands, result and DCB(Device Configuration Block) definition for NVMe according to the NVMe spec 2.0. Cc: Hao Wu <hao.a.wu@intel.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Zhiguang Liu <zhiguang.liu@intel.com> Signed-off-by: Weipu Zhu <weipu.zhu@intel.com> Reviewed-by: Hao A Wu <hao.a.wu@intel.com> Acked-by: Michael D Kinney <michael.d.kinney@intel.com>
* MdePkg:IORT header update for IORT Rev E.e specSwatisri Kantamsetti2023-02-071-0/+4
| | | | | | | | | | | | | | The IO Remapping Table, Platform Design Document, Revision E.e, Sept 2022 (https://developer.arm.com/documentation/den0049/ee) added flags in SMMUv3 node for validity of ID mappings for MSIs related to control interrupts. Therefore, update the IORT header file to: - increment IORT table revision to 6 - add support for DeviceId valid flag Signed-off-by: Swatisri Kantamsetti <swatisrik@nvidia.com> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
* MdePkg: Label CreateEvent NotifyFunction and NotifyContext optionalRebecca Cran2023-02-031-2/+2
| | | | | | | | | | | | | | | | | | | | | According to the UEFI 2.10 Specification, the EFI_BOOT_SERVICES_TABLE CreateEvent function has the following signature: typedef EFI_STATUS (EFIAPI *EFI_CREATE_EVENT) ( IN UINT32 Type, IN EFI_TPL NotifyTpl, IN EFI_EVENT_NOTIFY NotifyFunction, OPTIONAL IN VOID *NotifyContext, OPTIONAL OUT EFI_EVENT *Event ); Fix the prototype in UefiSpec.h to match, by labeling the NotifyFunction and NotifyContext parameters as OPTIONAL. Signed-off-by: Rebecca Cran <rebecca@bsdio.com> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
* MdePkg: Fix UINT64 and INT64 word length for LoongArch64Chao Li2023-02-011-11/+11
| | | | | | | | | | | | | | The UINT64 and INT64 should be defined as unsigned long long and long long in the linux64 bit environment, but now defined as unsigned long and long, so fix it. BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4330 Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Zhiguang Liu <zhiguang.liu@intel.com> Signed-off-by: Chao Li <lichao@loongson.cn> Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
* MdePkg: Added serveral tables to MATD used by LoongArch64Chao Li2023-01-311-1/+94
| | | | | | | | | | | | | Add CORE_PIC, LIO_PIC, HT_PIC, EIO_PIC, MSI_PIC, BIO_PIC and LPC_PIC tables for LoongArch64 as defined in ACPI SPEC 6.5. BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4306 Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Zhiguang Liu <zhiguang.liu@intel.com> Signed-off-by: Chao Li <lichao@loongson.cn> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
* MdePkg: Add ACPI 6.5 headerChao Li2023-01-312-1/+3165
| | | | | | | | | | | | | | | | | Create Acpi65.h, which is copied from Acpi64.h, and make the following changes: 1. Replace all occurences of "6.4/6_4" with "6.5/6_5". 2. Incremented FADT minor revision. 3. Make Acpi65.h the latest ACPI definitions that Acpi.h contains. BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4306 Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Zhiguang Liu <zhiguang.liu@intel.com> Signed-off-by: Chao Li <lichao@loongson.cn> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
* MdePkg: Add Acpi65.h to IgnoreFiles areaChao Li2023-01-311-0/+2
| | | | | | | | | | | | | Acpi65.h will causes ECC errors when CI uses Ubuntu GCC5 PR, add it to MdePkg.ci.yaml in "IgnreFiles" area to fix the ECC errors. BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4306 Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Zhiguang Liu <zhiguang.liu@intel.com> Signed-off-by: Chao Li <lichao@loongson.cn> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
* MdeModulePkg: Correct memory type in PrePiDxeCis.hDionna Glaze via groups.io2023-01-301-1/+1
| | | | | | | | | | | | | | The enumeration in MdePkg/Include/Pi/PiDxeCis.h has a duplicated entry, so the 8th position in the list doesn't count as index 7. The value EfiGcdMemoryTypeUnaccepted will have when added before EfiGcdMemoryTypeMaximum will be 6. Cc: Min M Xu <min.m.xu@intel.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Signed-off-by: Dionna Glaze <dionnaglaze@google.com> Reviewed-by: Min Xu <min.m.xu@intel.com> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
* MdePkg/IndustryStandard: Update IPMI definitionsAbner Chang2023-01-193-4/+82
| | | | | | | | | | | | | | | | | | | | | This change updates IPMI header files to support build up SMBIOS 42 Redfish Host Interface record using the information retrieved via IPMI App/Net Function. In IpmiNetFnApp.h, we also remove the duplicate definition of IPMI_APP_GET_CHANNEL_INFO. Signed-off-by: Abner Chang <abner.chang@amd.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Zhiguang Liu <zhiguang.liu@intel.com> Cc: Nickle Wang <nicklew@nvidia.com> Cc: Igor Kulchytskyy <igork@ami.com> Cc: Isaac Oram <isaac.w.oram@intel.com> Cc: Nate DeSimone <nathaniel.l.desimone@intel.com> Reviewed-by: Isaac Oram <isaac.w.oram@intel.com> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
* MdePkg: Add EFI_EVENT_BEFORE_EXIT_BOOT_SERVICES_GUIDDionna Glaze2023-01-122-1/+9
| | | | | | | | | | | | | | | | | Event group as defined in UEFI standard v2.9. Cc: Ard Biescheuvel <ardb@kernel.org> Cc: "Min M. Xu" <min.m.xu@intel.com> Cc: Gerd Hoffmann <kraxel@redhat.com> Cc: James Bottomley <jejb@linux.ibm.com> Cc: Tom Lendacky <Thomas.Lendacky@amd.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Erdem Aktas <erdemaktas@google.com> Acked-by: Jiewen Yao <Jiewen.yao@intel.com> Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com> Signed-off-by: Dionna Glaze <dionnaglaze@google.com> Message-Id: <20221108164616.3251967-3-dionnaglaze@google.com>
* MdePkg: Fix typos and spacing in Library/PerformanceLib.hRebecca Cran2022-12-211-31/+31
| | | | | | | | | | | | - Fix typos of "disable". - Fix typos of "performance". - Fix missing spaces. - Use comma instead of period when the sentence continues on the next line. - Fix typo of "PERF_CORE_LOAD_IMAGE". Signed-off-by: Rebecca Cran <rebecca@quicinc.com> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
* MdePkg: Fix typo of EFI_INVALID_PARAMETER in Protocol/UsbIo.hRebecca Cran2022-12-211-2/+2
| | | | | | | | Fix typo of EFI_INVALID_PARAMETER in Protocol/UsbIo.h by adding a missing 'R'. Signed-off-by: Rebecca Cran <rebecca@quicinc.com> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
* MdePkg/UnitTestHostBaseLib: Remove HOST_APPLICATION limitationLiu, Zhiguang2022-12-141-3/+6
| | | | | | | | | | | Remove HOST_APPLICATION limitation for UnitTestHostBaseLib, so that this library can be used as BaseLib by Emulator. Also, add some missing files Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Signed-off-by: Ray Ni <ray.ni@intel.com> Signed-off-by: Zhiguang Liu <zhiguang.liu@intel.com>
* MdePkg/BaseCpuLib: Remove assembly for CpuFlushTlbLiu, Zhiguang2022-12-145-97/+5
| | | | | | | | | | | | For different compilers, both IA32 and X64 can use Ia32/CpuFlushTlbGcc.c, which is C code (no inline assembly code). To simplify, remove other assemly file for CpuFlushTlb, and rename Ia32/CpuFlushTlbGcc.c to X86CpuFlushTlb.c. Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Signed-off-by: Ray Ni <ray.ni@intel.com> Signed-off-by: Zhiguang Liu <zhiguang.liu@intel.com>
* MdePkg/IndustryStandard: add definitions for ACPI APMTJeff Brasen2022-12-132-0/+74
| | | | | | | | | | This adds #defines and struct typedefs for the various node types in the ACPI Arm Performance Monitoring Unit (APMT) table. Signed-off-by: Jeff Brasen <jbrasen@nvidia.com> Reviewed-by: Zhichao Gao <zhichao.gao@intel.com> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
* BaseSynchronizationLib: Fix RISC-V helper nameSunil V L2022-11-292-4/+2
| | | | | | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4143 Fix the name of InternalSyncCompareExchange64() function. Signed-off-by: Sunil V L <sunilvl@ventanamicro.com> Reported-by: Zhihao Li <zhihao.li@intel.com> Tested-by: Zhihao Li <zhihao.li@intel.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Zhiguang Liu <zhiguang.liu@intel.com> Cc: Daniel Schaefer <git@danielschaefer.me> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
* MdePkg/Test: Add port of BaseSafeIntLib unit tests to GoogleTestMichael D Kinney2022-11-116-0/+3179
| | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4134 Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Zhiguang Liu <zhiguang.liu@intel.com> Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
* MdePkg/Include/Library: Undefine _ASSERT() if already definedMichael D Kinney2022-11-111-0/+3
| | | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4134 When unit testing is enabled, make sure _ASSERT() is not already defined by the host environment before defining _ASSERT(). This avoids conflicts with VS20xx builds of GoogleTest based unit tests. Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Zhiguang Liu <zhiguang.liu@intel.com> Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
* MdePkg/Include: Update Base.h to improve C++ compatibilityMichael D Kinney2022-11-111-2/+10
| | | | | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4134 * Map NULL to nullptr or __null when c++ compiler is used. * Map STATIC_ASSERT to static_assert when a c++ compiler is used. * Typecast RETURN_SUCCESS to type RETURN_STATUS to match type used by all return error/warning status codes. C++ has stricter type checking and found this inconsistency. Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Zhiguang Liu <zhiguang.liu@intel.com> Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
* MdePkg/BaseLib: Fix out-of-bounds reads in SafeStringPedro Falcato2022-11-071-4/+21
| | | | | | | | | | | | | | | | | | There was a OOB access in *StrHexTo* functions, when passed strings like "XDEADBEEF". OpenCore folks established an ASAN-equipped project to fuzz Ext4Dxe, which was able to catch these (mostly harmless) issues. Cc: Vitaly Cheptsov <vit9696@protonmail.com> Cc: Marvin H?user <mhaeuser@posteo.de> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Zhiguang Liu <zhiguang.liu@intel.com> Signed-off-by: Pedro Falcato <pedro.falcato@gmail.com> Acked-by: Michael D Kinney <michael.d.kinney@intel.com> Reviewed-by: Jiewen Yao <Jiewen.yao@Intel.com> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
* MdePkg/ArmTrngLib: Add NULL instance of Arm TRNG LibrarySami Mujawar2022-11-065-0/+165
| | | | | | | | | | | | | | Bugzilla: 3668 (https://bugzilla.tianocore.org/show_bug.cgi?id=3668) The Arm True Random Number Generator (TRNG) library defines an interface to access the entropy source on a platform. On platforms that do not have access to an entropy source, a NULL instance of the TRNG library may be useful to satisfy the build dependency. Therefore, add a NULL instance of the Arm TRNG library. Signed-off-by: Pierre Gondois <pierre.gondois@arm.com> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
* MdePkg/ArmTrngLib: Definition for Arm TRNG library class interfaceSami Mujawar2022-11-062-0/+111
| | | | | | | | | | | | | | | | | | | | Bugzilla: 3668 (https://bugzilla.tianocore.org/show_bug.cgi?id=3668) The NIST Special Publications 800-90A, 800-90B and 800-90C provide recommendations for random number generation. The NIST 800-90C, Recommendation for Random Bit Generator (RBG) Constructions, defines the GetEntropy() interface that is used to access the entropy source. The GetEntropy() interface is further used by Deterministic Random Bit Generators (DRBG) to generate random numbers. The Arm True Random Number Generator (TRNG) library defines an interface to access the entropy source on a platform, following the 'Arm True Random Number Generator Firmware Interface' specification. Signed-off-by: Pierre Gondois <pierre.gondois@arm.com> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
* MdePkg: The prototype definition of EdkiiMemoryAcceptProtocolJiaqi Gao2022-11-012-0/+40
| | | | | | | | | | | | | | | | | | | | | | | | RFC: https://bugzilla.tianocore.org/show_bug.cgi?id=3937 EdkiiMemoryAcceptProtocol is defined in MdePkg, the method AcceptMemory() can be called when memory needs to be accepted. EdkiiMemoryAcceptProtocol can be installed by architecture-specific drivers such as TdxDxe. This allows different isolation architectures to realize their own low-level methods to accept memory. Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Zhiguang Liu <zhiguang.liu@intel.com> Cc: Erdem Aktas <erdemaktas@google.com> Cc: Gerd Hoffmann <kraxel@redhat.com> Cc: James Bottomley <jejb@linux.ibm.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Tom Lendacky <thomas.lendacky@amd.com> Acked-by: Gerd Hoffmann <kraxel@redhat.com> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn> Signed-off-by: Jiaqi Gao <jiaqi.gao@intel.com> Signed-off-by: Min Xu <min.m.xu@intel.com>
* MdePkg: Add UEFI Unaccepted memory definitionMin M Xu2022-11-012-1/+14
| | | | | | | | | | | | | | | | | | | | RFC: https://bugzilla.tianocore.org/show_bug.cgi?id=3937 Plase refer to: UEFI Spec v2.9 Table 7-5 Memory Type Usage before ExitBootServices() Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Zhiguang Liu <zhiguang.liu@intel.com> Cc: Erdem Aktas <erdemaktas@google.com> Cc: Gerd Hoffmann <kraxel@redhat.com> Cc: James Bottomley <jejb@linux.ibm.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Tom Lendacky <thomas.lendacky@amd.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com> Acked-by: Gerd Hoffmann <kraxel@redhat.com> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn> Signed-off-by: Min Xu <min.m.xu@intel.com>
* MdePkg: Increase EFI_RESOURCE_MAX_MEMORY_TYPEMin M Xu2022-11-011-1/+10
| | | | | | | | | | | | | | | | | | | | | | | RFC: https://bugzilla.tianocore.org/show_bug.cgi?id=3937 BZ3937_EFI_RESOURCE_MEMORY_UNACCEPTED is defined for unaccepted memory. But this defitinion has not been officially in the PI spec. Base on the code-first we define EFI_RESOURCE_MEMORY_UNACCEPTED at MdeModulePkg/Include/Pi/PrePiHob.h and update EFI_RESOURCE_MAX_MEMORY_TYPE to 8. After BZ3937_EFI_RESOURCE_MEMORY_UNACCEPTED is officially published in PI spec, we will re-visit here. Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Zhiguang Liu <zhiguang.liu@intel.com> Cc: Erdem Aktas <erdemaktas@google.com> Cc: Gerd Hoffmann <kraxel@redhat.com> Cc: James Bottomley <jejb@linux.ibm.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Tom Lendacky <thomas.lendacky@amd.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn> Signed-off-by: Min Xu <min.m.xu@intel.com>
* MdePkg/BaseSafeIntLib: Add LoongArch64 architecture for BaseSafeIntLib.Chao Li2022-10-141-4/+5
| | | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4053 Add LoongArch64 architecture for BaseSafeIntLib library. Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Zhiguang Liu <zhiguang.liu@intel.com> Signed-off-by: Chao Li <lichao@loongson.cn> Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
* MdePkg/BaseSynchronizationLib: LoongArch cache related code.Chao Li2022-10-143-0/+361
| | | | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4053 Support LoongArch cache related functions. Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Zhiguang Liu <zhiguang.liu@intel.com> Signed-off-by: Chao Li <lichao@loongson.cn> Co-authored-by: Baoqi Zhang <zhangbaoqi@loongson.cn> Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
* MdePkg/BaseCpuLib: LoongArch Base CPU library implementation.Chao Li2022-10-144-3/+39
| | | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4053 Implement LoongArch CPU related functions in BaseCpuLib. Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Zhiguang Liu <zhiguang.liu@intel.com> Signed-off-by: Chao Li <lichao@loongson.cn> Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
* MdePkg/BasePeCoff: Add LoongArch PE/Coff related code.Chao Li2022-10-144-1/+146
| | | | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4053 Add LoongArch image relocation. Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Zhiguang Liu <zhiguang.liu@intel.com> Signed-off-by: Chao Li <lichao@loongson.cn> Co-authored-by: Baoqi Zhang <zhangbaoqi@loongson.cn> Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
* MdePkg/BaseIoLibIntrinsic: IoLibNoIo for LoongArch architecture.Chao Li2022-10-142-4/+9
| | | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4053 LoongArch MMIO library instance, use the IoLibNoIo. Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Zhiguang Liu <zhiguang.liu@intel.com> Signed-off-by: Chao Li <lichao@loongson.cn> Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
* MdePkg/BaseCacheMaintenanceLib: LoongArch cache maintenance implementation.Chao Li2022-10-142-1/+259
| | | | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4053 Implement LoongArch cache maintenance functions in BaseCacheMaintenanceLib. Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Zhiguang Liu <zhiguang.liu@intel.com> Signed-off-by: Chao Li <lichao@loongson.cn> Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
* MdePkg/BaseLib: BaseLib for LOONGARCH64 architecture.Chao Li2022-10-1412-1/+363
| | | | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4053 Add LoongArch LOONGARCH64 BaseLib functions. Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Zhiguang Liu <zhiguang.liu@intel.com> Signed-off-by: Chao Li <lichao@loongson.cn> Co-authored-by: Baoqi Zhang <zhangbaoqi@loongson.cn> Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
* MdePkg/Include: LoongArch definitions.Chao Li2022-10-145-13/+136
| | | | | | | | | | | | | | | | | | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4053 Add LoongArch processor related definitions. For the Http boot and PXE boot types seeing this URL section "Processor Architecture Type" for the LOONGARCH values: https://www.iana.org/assignments/dhcpv6-parameters/dhcpv6-parameters.xhtml For definitions of PE/COFF and LOONGARCH relocation types, see the "Machine Types" and "Basic Relocation Types" sections of this URL for LOONGARCH values: https://docs.microsoft.com/en-us/windows/win32/debug/pe-format For the register definitions of exceptions context, see the UEFI V2.10 18.2.2, 18.2.4 and 18.2.5 sections of this URL for LOONGARCH definitions: https://uefi.org/specs/UEFI/2.10/18_Protocols_Debugger_Support.html Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Zhiguang Liu <zhiguang.liu@intel.com> Signed-off-by: Chao Li <lichao@loongson.cn> Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
* MdePkg: Add LoongArch LOONGARCH64 bindingChao Li2022-10-143-1/+126
| | | | | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4053 Add LOONGARCH64 sections in MdePkg.dec and LOONGARCH64 ProcessorBind.h Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Zhiguang Liu <zhiguang.liu@intel.com> Signed-off-by: Chao Li <lichao@loongson.cn> Co-authored-by: Baoqi Zhang <zhangbaoqi@loongson.cn> Co-authored-by: Dongyan Qian <qiandongyan@loongson.cn> Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
* MdePkg/DxeServicesLib: Add LOONGARCH64 architectureChao Li2022-10-141-2/+2
| | | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4053 Add LOONGARCH64 architecture to MdePkg/DxeServiceLib. Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Zhiguang Liu <zhiguang.liu@intel.com> Signed-off-by: Chao Li <lichao@loongson.cn> Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
* MdePkg/Include: Add LOONGARCH related definitions EDK2 CI.Chao Li2022-10-141-20/+25
| | | | | | | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4053 HTTP/PXE boot LOONGARCH64 related definitions for EDK2 CI. For the LOONGARCH values, please seeing following URL section "Processor Architecture Types": https://www.iana.org/assignments/dhcpv6-parameters/dhcpv6-parameters.xhtml Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Zhiguang Liu <zhiguang.liu@intel.com> Signed-off-by: Chao Li <lichao@loongson.cn> Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
* MdePkg: Added LoongArch jump buffer register definition to MdePkg.ci.yamlChao Li2022-10-141-0/+12
| | | | | | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4053 If the new Arch register is defined in BaseLib.h when running the CI tests, it will give an ECC check error. Add the LoongArch register defined in the ExceptionList field to make the CI ECC check pass. Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Zhiguang Liu <zhiguang.liu@intel.com> Signed-off-by: Chao Li <lichao@loongson.cn> Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
* MdePkg: Added file of DebugSupport.h to MdePkg.ci.yamlChao Li2022-10-141-0/+1
| | | | | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4053 DebugSupport.h is all defined by UEFI Spec, most of the code doesn't fit EDKII coding style, add it to IgnoreFiles field to make CI ECC check pass. Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Zhiguang Liu <zhiguang.liu@intel.com> Signed-off-by: Chao Li <lichao@loongson.cn> Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
* MdePkg: Add Tls configuration related defineYi Li2022-10-101-37/+75
| | | | | | | | | | | | REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3892 Consumed by TlsSetEcCurve and TlsSetSignatureAlgoList. Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Signed-off-by: Yi Li <yi1.li@intel.com> Acked-by: Michael D Kinney <michael.d.kinney@intel.com>
* MdePkg: Added support for SMBIOS spec v3.6.0 to Smbios.hSainadh Nagolu2022-08-181-32/+66
| | | | | | | | | | Updated SmBios.h with new fields added as part of SMBIOS 3.6.0 spec update. Signed-off-by: Sainadh Nagolu <sainadhn@ami.com> Cc: Vasudevan Sambandan <vasudevans@ami.com> Cc: Sundaresan S <sundaresans@ami.com> Reviewed-by: Samer El-Haj-Mahmoud <Samer.El-Haj-Mahmoud@arm.com> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
* MdePkg: Improved Smbios Type9 table and Smbios spec v3.5.0 ChangesSainadh Nagolu2022-08-181-31/+40
| | | | | | | | | | In Type9 structure since PeerGroups has a variable number of entries, must not define new fields in the structure.So added an extended structure and defined new fields added after PeerGroups. Also done some improvements to Smbios 3.5.0 spec changes. Signed-off-by: Sainadh Nagolu <sainadhn@ami.com> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
* MdePkg/Library/UefiDevicePathLib: Add back StandaloneMm INF fileMichael D Kinney2022-08-102-0/+79
| | | | | | | | | | | | | | | | | | | REF: https://github.com/tianocore/edk2/pull/3130 The above PR removed UefiDevicePathLibStandaloneMm.inf, which is a non-backwards compatible change and does not provide time for downstream platforms to use the UefiDevicePathLibBase.inf. Add UefiDevicePathLibStandaloneMm.inf back, but add comments that it is deprecated and that UefiDevicePathLibBase.inf should be used instead. Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Zhiguang Liu <zhiguang.liu@intel.com> Cc: Mateusz Albecki <mateusz.albecki@intel.com> Cc: Yanbo Huang <yanbo.huang@intel.com> Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
* MdePkg: IORT header update for IORT Rev E.d specSami Mujawar2022-07-291-8/+78
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Bugzilla: 3458 - Add support IORT Rev E.d specification updates (https://bugzilla.tianocore.org/show_bug.cgi?id=3458) The IO Remapping Table, Platform Design Document, Revision E.d, Feb 2022 (https://developer.arm.com/documentation/den0049/) introduces the following updates, collectively including the updates and errata fixes to Rev E, Rev E.a, Rev E.b, Rev E.c: - increments the IORT table revision to 5. - updates the node definition to add an 'Identifier' field. - adds definition of node type 6 - Reserved Memory Range node. - adds definition for Memory Range Descriptors. - adds flag to indicate PRI support for root complexes. - adds flag to indicate if the root complex supports forwarding of PASID information on translated transactions to the SMMU. - adds flag to indicate if the root complex supports PASID. - adds flags to define access privilege and attributes for the memory ranges. Therefore, update the IORT header file to reflect these changes, and also rename the EFI_ACPI_IO_REMAPPING_TABLE_REVISION macro to EFI_ACPI_IO_REMAPPING_TABLE_REVISION_00. Also update the IORT generator in DynamicTablesPkg to fix the compilation errors so that Git Bisect can work. Signed-off-by: Sami Mujawar <sami.mujawar@arm.com> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn> Reviewed-by: Pierre Gondois <pierre.gondois@arm.com> Reviewed-by: Zhichao Gao <zhichao.gao@intel.com>
* MdePkg/UefiDevicePathLib: Add support for PEIMsMateusz Albecki2022-07-233-4/+4
| | | | | | | | | | | | | DevicePathLib utilities are useful in PEI to locate the devices which need an opal unlock on S3 resume. This commit reuses the implementation done for standalone MM support and makes the StandaloneMm library Base. Signed-off-by: Mateusz Albecki <mateusz.albecki@intel.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Zhiguang Liu <zhiguang.liu@intel.com> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
* NetworkPkg/HttpBootDxe: Add Support for HTTP Boot Basic AuthenticationSaloni Kasbekar2022-07-192-1/+13
| | | | | | | | | | | | | REF:https://bugzilla.tianocore.org/show_bug.cgi?id=2504 Add support for TLS Client Authentication using Basic Authentication for HTTP Boot Cc: Maciej Rabeda <maciej.rabeda@linux.intel.com> Cc: Wu Jiaxin <jiaxin.wu@intel.com> Cc: Siyuan Fu <siyuan.fu@intel.com> Signed-off-by: Saloni Kasbekar <saloni.kasbekar@intel.com> Reviewed-by: Maciej Rabeda <maciej.rabeda@linux.intel.com>
generated by cgit v1.2.3 (git 2.25.1) at 2024-07-02 13:22:20 +0000