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* MdePkg/Library/BaseLib: Add BaseLib instance for host based unit testsMichael D Kinney2020-07-158-1/+4005
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2800 Add a new version of BaseLib that is safe for use from host based unit test applications. Host based unit test applications may need to provide implementations of some BaseLib functions that provide simple emulation to exercise the code under test. The structure UNIT_TEST_HOST_BASE_LIB is filled in with services that provide default emulation for BaseLib APIs that would normally generate exceptions in a host based unit test application. This structure allows an individual unit test to replace the default emulation of a BaseLib service with an alternate version that is required by a specific unit test. A global variable of type UNIT_TEST_HOST_BASE_LIB is provided through the new UnitTestHostBaseLib library class. Normally cmocka would be used to mock services the code under test calls. However, the BaseLib is used by the Unit Test Framework itself, so using a mocked interface is not possible. The use of a structure to provide hooks for unit test is not expected to be a common feature. It should only be required for libraries that are used by both the Unit Test Framework and the code under test where the code under test requires a different behavior than the Unit Test Framework. Cc: Liming Gao <liming.gao@intel.com> Cc: Sean Brogan <sean.brogan@microsoft.com> Cc: Bret Barkelew <Bret.Barkelew@microsoft.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
* MdePkg/BaseLib: Break out IA32/X64 GCC inline privileged functionsMichael D Kinney2020-07-155-2420/+2409
| | | | | | | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2800 Break out the IA32/X64 GCC inline functions that can not be used in a unit test host application into their own source file. This does not make any changes to the BaseLib library instance. This is in preparation for a new BaseLib instances that is safe to use with host-based unit test applications. Cc: Liming Gao <liming.gao@intel.com> Cc: Sean Brogan <sean.brogan@microsoft.com> Cc: Bret Barkelew <Bret.Barkelew@microsoft.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
* MdePkg/BaseCacheMaintenanceLibNull: Add Null instance for host testingMichael D Kinney2020-07-154-0/+267
| | | | | | | | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2799 The services in CacheMaintenanceLib usually generate exceptions in a unit test host application. Provide a Null instance that can be safely used. This Null instance can also be used as a template for implementing new instances of CacheMaintenanceLib. Cc: Liming Gao <liming.gao@intel.com> Cc: Sean Brogan <sean.brogan@microsoft.com> Cc: Bret Barkelew <Bret.Barkelew@microsoft.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
* MdePkg/BaseCpuLibNull: Add Null version of CpuLib for host testingMichael D Kinney2020-07-154-1/+76
| | | | | | | | | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2798 The services in CpuLib usually generate exceptions in a unit test host application. Provide a Null instance that can be safely used. This Null instance can also be used as a template for implementing new instances of CpuLib. Cc: Liming Gao <liming.gao@intel.com> Cc: Sean Brogan <sean.brogan@microsoft.com> Cc: Bret Barkelew <Bret.Barkelew@microsoft.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Sean Brogan <sean.brogan@microsoft.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
* MdePkg: Add Serial Terminal Device Type GuidOleksiy Yakovlev2020-07-032-0/+9
| | | | | | | | | | Add definition of EFI_SERIAL_TERMINAL_DEVICE_TYPE_GUID. It was miseed in "Extend SERIAL_IO with DeviceTypeGuid" patch. (UEFI 2.8, mantis 1832) Signed-off-by: Oleksiy Yakovlev <oleksiyy@ami.com> Reviewed-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Zhiguang Liu <zhiguang.liu@intel.com>
* MdePkg/PciSegmentInfoLib: Add missing EFIAPI to GetPciSegmentInfo()Ray Ni2020-06-242-2/+4
| | | | | | | | | | | | All public APIs should have EFIAPI modifier. Somehow PciSegmentInfoLib missed the EFIAPI modifier. The patch updates the library header file and NULL instance in MdePkg to add the missing EFIAPI. Signed-off-by: Ray Ni <ray.ni@intel.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com> Cc: Zhiguang Liu <zhiguang.liu@intel.com>
* MdePkg: Include Acpi header fileWasim Khan2020-06-191-0/+2
| | | | | | | | | | ACPI memory mapped configuration space access (MCFG) table requires defination of EFI_ACPI_DESCRIPTION_HEADER. Signed-off-by: Wasim Khan <wasim.khan@nxp.com> Reviewed-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Philippe Mathieu-Daude <philmd@redhat.com> Reviewed-by: Zhiguang Liu <zhiguang.liu@intel.com>
* MdePkg/BasePrintLib: avoid absolute addresses for error stringsArd Biesheuvel2020-06-161-3/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The mStatusString[] array is constructed as an array of pointer-to-char, which means that on X64 or AARCH64, it is emitted as a single linear list of 64-bit quantities, each containing the absolute address of one of the string literals in memory. This means that each string takes up 8 bytes of additional space, along with 2 bytes of relocation data. It also means that extra work needs to be done at runtime to process these relocations, every time a module is loaded that incorporates this library. So fix both issues, by splitting mStatusString into two arrays of char arrays. The memory footprint decreases from 955 to 843 bytes, and given that in the latter case, the overhead consists of 278 NUL characters rather than 390 bytes worth of absolute addresses and relocation records, the size of a compressed image is reduced even further. For example, when building ArmVirtQemu.dsc in RELEASE mode for AARCH64 with the GCC5 profile, I get: Before FV Space Information FVMAIN [100%Full] 5329920 total, 5329920 used, 0 free FVMAIN_COMPACT [38%Full] 2093056 total, 811840 used, 1281216 free After FV Space Information FVMAIN [100%Full] 5321728 total, 5321728 used, 0 free FVMAIN_COMPACT [38%Full] 2093056 total, 809696 used, 1283360 free So the uncompressed contents of the compressed image are 8 KB smaller, whereas the resulting flash image (consisting of the compressed image along with SEC, PEI_CORE and a set of PEIMs that execute in place) is 2 KB smaller. Signed-off-by: Ard Biesheuvel <ard.biesheuvel@arm.com> Reviewed-by: Zhiguang Liu <zhiguang.liu@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
* MdePkg/UnitTestLib.h: Drop FrameworkHandle param from SaveFrameworkState()Michael Kubacki2020-06-141-6/+3
| | | | | | | | | | | | | | | | REF:https://bugzilla.tianocore.org/show_bug.cgi?id=2612 The framework handle can be retrieved from GetActiveFrameworkHandle() internal to SaveFrameworkState() so this change removes the parameter from the function signature. Cc: Bret Barkelew <brbarkel@microsoft.com> Cc: Liming Gao <liming.gao@intel.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com> Reviewed-by: Bret Barkelew <bret.barkelew@microsoft.com> Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com> Reviewed-by: Zhiguang Liu <zhiguang.liu@intel.com>
* MdePkg/Test/BaseLib: Add SAFE_STRING_CONSTRAINT_CHECK unit testMichael D Kinney2020-05-221-0/+107
| | | | | | | | | | | | | | | | | | | | | | | | | Use the safe string function StrCpyS() in BaseLib to test the SAFE_STRING_CONSTRAINT_CHECK() macro. Cc: Andrew Fish <afish@apple.com> Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org> Cc: Bret Barkelew <bret.barkelew@microsoft.com> Cc: Brian J. Johnson <brian.johnson@hpe.com> Cc: Chasel Chiu <chasel.chiu@intel.com> Cc: Jordan Justen <jordan.l.justen@intel.com> Cc: Laszlo Ersek <lersek@redhat.com> Cc: Leif Lindholm <leif@nuviainc.com> Cc: Liming Gao <liming.gao@intel.com> Cc: Marvin Häuser <mhaeuser@outlook.de> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Vincent Zimmer <vincent.zimmer@intel.com> Cc: Zhichao Gao <zhichao.gao@intel.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Vitaly Cheptsov <vit9696@protonmail.com> Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com> Reviewed-by: Philippe Mathieu-Daude <philmd@redhat.com> Reviewed-by: Vitaly Cheptsov <vit9696@protonmail.com> Acked-by: Liming Gao <liming.gao@intel.com>
* MdePkg: Fix SafeString performing assertions on runtime checksVitaly Cheptsov2020-05-222-223/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2054 Runtime checks returned via status return code should not work as assertions to permit parsing not trusted data with SafeString interfaces. Replace ASSERT() with a DEBUG_VERBOSE message. Cc: Andrew Fish <afish@apple.com> Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org> Cc: Bret Barkelew <bret.barkelew@microsoft.com> Cc: Brian J. Johnson <brian.johnson@hpe.com> Cc: Chasel Chiu <chasel.chiu@intel.com> Cc: Jordan Justen <jordan.l.justen@intel.com> Cc: Laszlo Ersek <lersek@redhat.com> Cc: Leif Lindholm <leif@nuviainc.com> Cc: Liming Gao <liming.gao@intel.com> Cc: Marvin Häuser <mhaeuser@outlook.de> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Vincent Zimmer <vincent.zimmer@intel.com> Cc: Zhichao Gao <zhichao.gao@intel.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Signed-off-by: Vitaly Cheptsov <vit9696@protonmail.com> Reviewed-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Bret Barkelew <bret.barkelew@microsoft.com> Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
* MdePkg: add definitions for ACPI NVDIMM Device PathLiu, Zhiguang2020-05-211-0/+15
| | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2716 Add definitions for ACPI NVDIMM Device Path following UEFI spec. Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <liming.gao@intel.com> Signed-off-by: James Anandraj <james.sushanth.anandraj@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
* MdePkg: Add FMP Capsule Image Header extensionOleksiy Yakovlev2020-05-201-1/+10
| | | | | | | | | Add bitmask to structure which gives a binary-inspectable mechanism to determine if a capsule contains an authentication section or depex section. (UEFI 2.8 errata a, mantis 2026) Signed-off-by: Oleksiy Yakovlev <oleksiyy@ami.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
* MdePkg: Add EFI_RT_PROPERTIES_TABLELiming Gao2020-05-202-0/+74
| | | | | | | | | | Define Guid & data structure for EFI_RT_PROPERTIES_TABLE, designed to be published by a platform if it no longer supports all EFI runtime services once ExitBootServices() has been called by the OS. (UEFI 2.8 errata a, mantis 2049) Signed-off-by: Oleksiy Yakovlev <oleksiyy@ami.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
* MdePkg: Fix OUT parameters marked as IN OUTOleksiy Yakovlev2020-05-209-17/+17
| | | | | | | | | | | | | | | | | | | | Some OUT parameters in the specification were mistakenly marked as IN OUT. "IN OUT" replaced with "OUT" in the following interfaces EFI_BOOT_SERVICES.GetMemoryMap():MemoryMap EFI_BOOT_SERVICES.LocateHandleBuffer():NoHandles EFI_SIMPLE_POINTER_PROTOCOL.GetState():State EFI_ABSOLUTE_POINTER_PROTOCOL.GetState():State EFI_EDID_OVERRIDE_PROTOCOL.GetEdid():EdidSize and Edid EFI_ATA_PASS_THRU_PROTOCOL.BuildDevicePath():DevicePath EFI_NVM_EXPRESS_PASS_THRU_PROTOCOL.BuildDevicePath():DevicePath EFI_SD_MMC_PASS_THRU_PROTOCOL.BuildDevicePath():DevicePath EFI_EXT_SCSI_PASS_THRU_PROTOCOL.BuildDevicePath():DevicePath EFI_FIRMWARE_MANAGEMENT_PROTOCOL.GetImage():Image (UEFI 2.8 errata a, mantis 2035) Signed-off-by: Oleksiy Yakovlev <oleksiyy@ami.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
* MdePkg: Add new CPER Notification typesOleksiy Yakovlev2020-05-202-0/+24
| | | | | | | | Add SEA, SEI, and PEI CPER Notification types defined in UEFI 2.8 errata a. (UEFI 2.8 errata a, mantis 2026) Signed-off-by: Oleksiy Yakovlev <oleksiyy@ami.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
* MdePkg: Update structures for MpServices ProtocolRobert Phelps2020-05-151-0/+50
| | | | | | | | | | Added EXTENDED_PROCESSOR_INFORMATION structure and supporting structures and definitions. The intent is to support updated topology layout for CPUs. (PI 1.7a Mantis 2071) Signed-off-by: Robert Phelps <robert@ami.com> Reviewed-by: Ray Ni <ray.ni@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
* MdePkg: Added header file for Delayed Dispatch PPIRobert Phelps2020-05-152-0/+88
| | | | | | | | | Created new header file for the new EFI_DELAYED_DISPATCH_PPI PPI (PI 1.7 Mantis 1891) Signed-off-by: Robert Phelps <robert@ami.com> Reviewed-by: Zhiguang Liu <zhiguang.liu@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
* MdePkg: Updates to PI 1.7 Revision numbersRobert Phelps2020-05-152-4/+4
| | | | | | | | | Revision number defines and MACROs were incorrect for the current version of the Specification (PI 1.7 Mantis 1892) Signed-off-by: Robert Phelps <robert@ami.com> Reviewed-by: Zhiguang Liu <zhiguang.liu@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
* MdePkg: New Status CodesRobert Phelps2020-05-151-2/+15
| | | | | | | | | Updated PiStatusCodes to reflect changes to PI 1.7 Specification (PI 1.7 Mantis 1889) Signed-off-by: Robert Phelps <robert@ami.com> Reviewed-by: Zhiguang Liu <zhiguang.liu@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
* MdePkg: UEFI JSON Capsule SupportOleksiy Yakovlev2020-05-154-0/+134
| | | | | | | | | | Added Guids and structures, that defines the work flow to perform capsule update using JSON objects. (UEFI 2.8 mantis 1935) Signed-off-by: Oleksiy Yakovlev <oleksiyy@ami.com> Reviewed-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Zhiguang Liu <zhiguang.liu@intel.com>
* MdePkg: Add UEFI Spec Revision 2.8Oleksiy Yakovlev2020-05-151-0/+1
| | | | | | | | | | Added entrie in the EFI_SYSTEM_TABLE related definitions section, to signify UEFI 2.8 spec revision. (UEFI 2.8 mantis 1926) Signed-off-by: Oleksiy Yakovlev <oleksiyy@ami.com> Reviewed-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Zhiguang Liu <zhiguang.liu@intel.com>
* MdePkg: Bootable NVDIMM namespacesOleksiy Yakovlev2020-05-151-0/+12
| | | | | | | | | | | | Provided a mechanism for UEFI FW to identify and hand off bootable NVDIMM namespaces to the OS by standardizing the EFI device path. EFI device path for physical NVDIMM devices changed from an ACPI _ADR device to an ACPI NVDIMM device for correctness. (UEFI 2.8 mantis 1858) Signed-off-by: Oleksiy Yakovlev <oleksiyy@ami.com> Reviewed-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Zhiguang Liu <zhiguang.liu@intel.com>
* MdePkg: REST style formsetOleksiy Yakovlev2020-05-153-0/+10
| | | | | | | | | | New ClassGuid EFI_HII_REST_STYLE_FORMSET_GUID is defined. In question level, a new flag EFI_IFR_FLAG_REST_STYLE is defined. (UEFI 2.8 mantis 1853) Signed-off-by: Oleksiy Yakovlev <oleksiyy@ami.com> Reviewed-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Zhiguang Liu <zhiguang.liu@intel.com>
* MdePkg: Extend SERIAL_IO with DeviceTypeGuidOleksiy Yakovlev2020-05-151-0/+9
| | | | | | | | | | EFI_SERIAL_IO_PROTOCOL_REVISION incremented to 0x00010001. CONST EFI_GUID *DeviceTypeGuid field added to the protocol structure. UEFI 2.8 mantis 1832. Signed-off-by: Oleksiy Yakovlev <oleksiyy@ami.com> Reviewed-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Zhiguang Liu <zhiguang.liu@intel.com>
* MdePkg: introduce MM communicate 2 protocolArd Biesheuvel2020-05-122-0/+76
| | | | | | | | | Add the protocol definition of the MM communicate 2 protocol, which has been introduced by version 1.7 errata A of the PI spec. Signed-off-by: Ard Biesheuvel <ard.biesheuvel@arm.com> Reviewed-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
* MdePkg/BaseSafeIntLib: Add RISCV64 arch for BaseSafeIntLib.Abner Chang2020-05-071-2/+4
| | | | | | | | | | | | | | | | Add RISCV64 arch for BaseSafeIntLib library. REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2672 Signed-off-by: Abner Chang <abner.chang@hpe.com> Reviewed-by: Leif Lindholm <leif@nuviainc.com> Reviewed-by: Zhiguang Liu <zhiguang.liu@intel.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <liming.gao@intel.com> Cc: Leif Lindholm <leif.lindholm@linaro.org> Cc: Gilbert Chen <gilbert.chen@hpe.com> Cc: Daniel Helmut Schaefer <daniel.schaefer@hpe.com>
* MdePkg/BaseSynchronizationLib: RISC-V cache related code.Abner Chang2020-05-072-0/+83
| | | | | | | | | | | | | | | | | Support RISC-V cache related functions. REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2672 Signed-off-by: Abner Chang <abner.chang@hpe.com> Co-authored-by: Gilbert Chen <gilbert.chen@hpe.com> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org> Reviewed-by: Zhiguang Liu <zhiguang.liu@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <liming.gao@intel.com> Cc: Leif Lindholm <leif.lindholm@linaro.org> Cc: Gilbert Chen <gilbert.chen@hpe.com>
* MdePkg/BaseCpuLib: RISC-V Base CPU libraryAbner Chang2020-05-073-3/+27
| | | | | | | | | | | | | | | | | | implementation. Implement RISC-V CPU related functions in BaseCpuLib. REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2672 Signed-off-by: Abner Chang <abner.chang@hpe.com> Co-authored-by: Gilbert Chen <gilbert.chen@hpe.com> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org> Reviewed-by: Zhiguang Liu <zhiguang.liu@intel.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <liming.gao@intel.com> Cc: Leif Lindholm <leif.lindholm@linaro.org> Cc: Gilbert Chen <gilbert.chen@hpe.com>
* MdePkg/BasePeCoff: Add RISC-V PE/Coff related code.Abner Chang2020-05-075-1/+151
| | | | | | | | | | | | | | | | Support RISC-V image relocation. REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2672 Signed-off-by: Abner Chang <abner.chang@hpe.com> Co-authored-by: Gilbert Chen <gilbert.chen@hpe.com> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org> Reviewed-by: Zhiguang Liu <zhiguang.liu@intel.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <liming.gao@intel.com> Cc: Leif Lindholm <leif.lindholm@linaro.org> Cc: Gilbert Chen <gilbert.chen@hpe.com>
* MdePkg/BaseIoLibIntrinsic: Rename IoLibArm.c=>IoLibNoIo.cAbner Chang2020-05-072-5/+12
| | | | | | | | | | | | | | | | | | RISC-V MMIO library instance. IoLibArm.c in fact implements a generic Mmio-only (and ANSI C compliant), so rename it to better reflect this. REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2672 Signed-off-by: Abner Chang <abner.chang@hpe.com> Co-authored-by: Gilbert Chen <gilbert.chen@hpe.com> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org> Reviewed-by: Zhiguang Liu <zhiguang.liu@intel.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <liming.gao@intel.com> Cc: Leif Lindholm <leif.lindholm@linaro.org> Cc: Gilbert Chen <gilbert.chen@hpe.com>
* MdePkg/BaseCacheMaintenanceLib:Abner Chang2020-05-072-0/+254
| | | | | | | | | | | | | | | | | | | RISC-V cache maintenance implementation. Implement RISC-V cache maintenance functions in BaseCacheMaintenanceLib. REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2672 Signed-off-by: Abner Chang <abner.chang@hpe.com> Co-authored-by: Gilbert Chen <gilbert.chen@hpe.com> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org> Reviewed-by: Zhiguang Liu <zhiguang.liu@intel.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <liming.gao@intel.com> Cc: Leif Lindholm <leif.lindholm@linaro.org> Cc: Gilbert Chen <gilbert.chen@hpe.com>
* MdePkg/BaseLib: BaseLib for RISCV64 architectureAbner Chang2020-05-0713-1/+374
| | | | | | | | | | | | | | | | Add RISC-V RV64 BaseLib functions. REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2672 Signed-off-by: Abner Chang <abner.chang@hpe.com> Co-authored-by: Gilbert Chen <gilbert.chen@hpe.com> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org> Reviewed-by: Zhiguang Liu <zhiguang.liu@intel.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <liming.gao@intel.com> Cc: Leif Lindholm <leif.lindholm@linaro.org> Cc: Gilbert Chen <gilbert.chen@hpe.com>
* MdePkg/Include: RISC-V definitions.Abner Chang2020-05-075-0/+89
| | | | | | | | | | | | | | | | Add RISC-V processor related definitions. REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2672 Signed-off-by: Abner Chang <abner.chang@hpe.com> Co-authored-by: Gilbert Chen <gilbert.chen@hpe.com> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org> Reviewed-by: Zhiguang Liu <zhiguang.liu@intel.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <liming.gao@intel.com> Cc: Leif Lindholm <leif.lindholm@linaro.org> Cc: Gilbert Chen <gilbert.chen@hpe.com>
* MdePkg: Add RISC-V RISCV64 bindingAbner Chang2020-05-073-2/+179
| | | | | | | | | | | | | | | | Add RISCV64 sections in MdePkg.dec and RISCV64 ProcessorBind.h REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2672 Signed-off-by: Abner Chang <abner.chang@hpe.com> Co-authored-by: Gilbert Chen <gilbert.chen@hpe.com> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org> Reviewed-by: Zhiguang Liu <zhiguang.liu@intel.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <liming.gao@intel.com> Cc: Leif Lindholm <leif.lindholm@linaro.org> Cc: Gilbert Chen <gilbert.chen@hpe.com>
* MdePkg/Security2: Mark the File parameter as OPTIONAL.Guomin Jiang2020-04-221-1/+1
| | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2652 According to the description, the File is OPTIONAL and can be NULL. Signed-off-by: Guomin Jiang <guomin.jiang@intel.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <liming.gao@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
* MdePkg/BaseLib: Add linked list iteration macrosMichael Kubacki2020-04-211-0/+27
| | | | | | | | | | | | | | | | | | | | REF:https://bugzilla.tianocore.org/show_bug.cgi?id=1959 The macros EFI_LIST_FOR_EACH and EFI_LIST_FOR_EACH_SAFE have been duplicated across several drivers. These macros have proven useful and established a commonly used pattern for linked list iteration. This change defines the macros in BaseLib.h alongside other generic linked list macros and functions. Cc: Dandan Bi <dandan.bi@intel.com> Cc: Hao A Wu <hao.a.wu@intel.com> Cc: Jian J Wang <jian.j.wang@intel.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com> Reviewed-by: Guomin Jiang <guomin.jiang@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Bret Barkelew <bret.barkelew@microsoft.com>
* MdePkg: Add AML FieldList OpCode definitionsPierre Gondois2020-04-171-0/+8
| | | | | | | | | | | | | | | | | | | | | The ACPI specification, version 6.3, January 2019, defines the Named Objects Encoding for FieldElements in section '20.2.5.2 Named Objects Encoding'. FieldElements can be one of the following: NamedField | ReservedField | AccessField | ExtendedAccessField | ConnectField Some of these keywords are starting with an opcode, allowing to identify their type. E.g.: ReservedField := 0x00 PkgLength This patch adds these FieldElement opcodes definitions to the list of AML Opcode definitions. Reviewed-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com> Reviewed-by: Zhiguang Liu <zhiguang.liu@intel.com> Signed-off-by: Pierre Gondois <pierre.gondois@arm.com>
* MdePkg/UefiScsiLib: Set FUA bit for synchronous SCSI Write operationsZurcher, Christopher J2020-04-152-7/+15
| | | | | | | | | | | | | | The FUA (Force Unit Access) bit forces data to be written directly to disk instead of the write cache. This prevents data from being lost if a shutdown or reset is requested immediately after a SCSI write operation. Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Jian J Wang <jian.j.wang@intel.com> Cc: Liming Gao <liming.gao@intel.com> Cc: Zhiguang Liu <zhiguang.liu@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Zhiguang Liu <zhiguang.liu@intel.com> Signed-off-by: Christopher J Zurcher <christopher.j.zurcher@intel.com>
* MdePkg DebugLib: Enable FILE NAME as DEBUG ASSERT for CLANGZhiguang Liu2020-04-131-1/+5
| | | | | | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1548 For clang compiler, This change will make the generated image not include the absolute file path. If so, the generated debug image can be reproduced in the different root directory. Also, it will reduce the size of debug image size. To do so, use __FILE_NAME__ macro to replace __FILE__. __FILE_NAME__ is Clang-specific extension that functions similar to __FILE__ but only renders the last path component (the filename) instead of an invocation dependent full path to that file, and __FILE_NAME__ is introduced since clang 9. Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <liming.gao@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com> Signed-off-by: Zhiguang Liu <zhiguang.liu@intel.com>
* MdePkg: remove PropertiesTable GUIDArd Biesheuvel2020-04-072-34/+0
| | | | | | | | | | | | | Remove the GUID definition that describes the deprecated properties table, which is no longer generated by the DXE core. Link: https://bugzilla.tianocore.org/show_bug.cgi?id=2633 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@arm.com> Reviewed-by: Bret Barkelew <bret.barkelew@microsoft.com> Acked-by: Jiewen Yao <Jiewen.yao@intel.com> Acked-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Dandan Bi <dandan.bi@intel.com> Reviewed-by: Jian J Wang <jian.j.wang@intel.com>
* MdePkg/DxeServicesLib: Add RISC-V architectureDaniel Schaefer2020-04-031-2/+2
| | | | | | | | | | | | | | BZ:2562: https://bugzilla.tianocore.org/show_bug.cgi?id=2562 Signed-off-by: Daniel Schaefer <daniel.schaefer@hpe.com> Reviewed-by: Liming Gao <liming.gao@intel.com> Cc: Abner Chang <abner.chang@hpe.com> Cc: Gilbert Chen <gilbert.chen@hpe.com> Cc: Leif Lindholm <leif@nuviainc.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <liming.gao@intel.com>
* MdePkg/Include: Add RISC-V related definitions EDK2 CI.Abner Chang2020-04-031-0/+7
| | | | | | | | | | | | | | | | HTTP/PXE boot RISC-V related definitions for EDK2 CI. BZ:2562: https://bugzilla.tianocore.org/show_bug.cgi?id=2562 Signed-off-by: Abner Chang <abner.chang@hpe.com> Reviewed-by: Maciej Rabeda <maciej.rabeda@linux.intel.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <liming.gao@intel.com> Cc: Leif Lindholm <leif@nuviainc.com> Cc: Gilbert Chen <gilbert.chen@hpe.com> Cc: Daniel Schaefer <daniel.schaefer@hpe.com>
* MdeModulePkg: Remove gEfiFormBrowserExProtocolGuid Protocol GuidGuoMinJ2020-03-301-1/+0
| | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2145 Replace the gEfiFormBrowserExProtocolGuid with gEdkiiFormBrowserExProtocolGuid, remove the unnecessary declaration. Signed-off-by: GuoMinJ <newexplorerj@gmail.com> Acked-by: Hao A Wu <hao.a.wu@intel.com>
* MdePkg/UnitTestBaseLib: Add check for pointer BinDataGuomin Jiang2020-03-271-1/+3
| | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2531 AllocatePool may fail and BinData may be invalid, check it before use. Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <liming.gao@intel.com> Signed-off-by: Guomin Jiang <guomin.jiang@intel.com> Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com> Reviewed-by: Bret Barkelew <bret.barkelew@microsoft.com>
* MdePkg/PciExpress40.h: DVSEC definition missingJaveed, Ashraf2020-03-191-0/+28
| | | | | | | | | | | | | | BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=2598 All registers definition of DVSEC are defined as per the PCI Express Base Specification 4.0 chapter 7.9.6. Signed-off-by: Ashraf Javeed <ashraf.javeed@intel.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <liming.gao@intel.com> Cc: Zhiguang Liu <zhiguang.liu@intel.com> Reviewed-by: Zhiguang Liu <zhiguang.liu@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
* MdePkg: Remove FIT table industry standard header file.Siyuan Fu2020-02-141-76/+0
| | | | | | | | | | | | | | Commit c7c964b and dd01704 add header file for FIT table and update MpInitLib to support FIT based microcode shadow operation. There are comments that FIT is Intel specific specification instead of industry standard, which should not be placed in EDK2 MdePkg and UefiCpuPkg. This patch removes the header file added by c7c964b. Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <liming.gao@intel.com> Signed-off-by: Siyuan Fu <siyuan.fu@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
* MdePkg: Add PCCT table signature definitionKrzysztof Koch2020-02-136-1/+36
| | | | | | | | | | | | | | | The Platform Communications Channel Table (PCCT) was defined in: ACPI Specification Version 5.0, Errata A - Published Nov. 13, 2013. Starting from the Acpi50.h header file, there are definitions describing the table but a macro with the table's signature is missing. This patch adds the definition of Platform Communications Channel Table's signature to the relevant ACPI header files. Signed-off-by: Krzysztof Koch <krzysztof.koch@arm.com> Reviewed-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
* MdePkg/BaseSafeIntLib: Fix VS20xx IA32 link failuresMichael D Kinney2020-02-131-3/+3
| | | | | | | | | | | | | | | | | | | | | | https://bugzilla.tianocore.org/show_bug.cgi?id=2525 SafeUint64Mult() looks for 64-bit overflows and performs several 32-bit multiples with 64-bit results to check for all possible overflow conditions. IA32 builds using VS20xx with optimizations enabled are producing a reference to the _allmull intrinsic. The fix is to use MultU64x64() instead of '*' for these operations. These are safe because the inputs are guaranteed to have the upper 32-bits clear, which means MultU64x64() can never overflow with those inputs. Cc: Liming Gao <liming.gao@intel.com> Cc: Sean Brogan <sean.brogan@microsoft.com> Cc: Bret Barkelew <Bret.Barkelew@microsoft.com> Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com> Reviewed-by: Bret Barkelew <bret.barkelew@microsoft.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
* MdePkg: Add PCI Express 5.0 Header FileFelix Polyudov2020-02-121-0/+136
| | | | | | | | The header includes Physical Layer PCI Express Extended Capability definitions based on section 7.7.6 of PCI Express Base Specification 5.0. Signed-off-by: Felix Polyudov <felixp@ami.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
generated by cgit v1.2.3 (git 2.25.1) at 2024-06-19 21:03:02 +0000