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* MdePkg/BaseLib: Fix out-of-bounds reads in SafeStringPedro Falcato2022-11-071-4/+21
| | | | | | | | | | | | | | | | | | There was a OOB access in *StrHexTo* functions, when passed strings like "XDEADBEEF". OpenCore folks established an ASAN-equipped project to fuzz Ext4Dxe, which was able to catch these (mostly harmless) issues. Cc: Vitaly Cheptsov <vit9696@protonmail.com> Cc: Marvin H?user <mhaeuser@posteo.de> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Zhiguang Liu <zhiguang.liu@intel.com> Signed-off-by: Pedro Falcato <pedro.falcato@gmail.com> Acked-by: Michael D Kinney <michael.d.kinney@intel.com> Reviewed-by: Jiewen Yao <Jiewen.yao@Intel.com> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
* MdePkg/ArmTrngLib: Add NULL instance of Arm TRNG LibrarySami Mujawar2022-11-065-0/+165
| | | | | | | | | | | | | | Bugzilla: 3668 (https://bugzilla.tianocore.org/show_bug.cgi?id=3668) The Arm True Random Number Generator (TRNG) library defines an interface to access the entropy source on a platform. On platforms that do not have access to an entropy source, a NULL instance of the TRNG library may be useful to satisfy the build dependency. Therefore, add a NULL instance of the Arm TRNG library. Signed-off-by: Pierre Gondois <pierre.gondois@arm.com> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
* MdePkg/ArmTrngLib: Definition for Arm TRNG library class interfaceSami Mujawar2022-11-062-0/+111
| | | | | | | | | | | | | | | | | | | | Bugzilla: 3668 (https://bugzilla.tianocore.org/show_bug.cgi?id=3668) The NIST Special Publications 800-90A, 800-90B and 800-90C provide recommendations for random number generation. The NIST 800-90C, Recommendation for Random Bit Generator (RBG) Constructions, defines the GetEntropy() interface that is used to access the entropy source. The GetEntropy() interface is further used by Deterministic Random Bit Generators (DRBG) to generate random numbers. The Arm True Random Number Generator (TRNG) library defines an interface to access the entropy source on a platform, following the 'Arm True Random Number Generator Firmware Interface' specification. Signed-off-by: Pierre Gondois <pierre.gondois@arm.com> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
* MdePkg: The prototype definition of EdkiiMemoryAcceptProtocolJiaqi Gao2022-11-012-0/+40
| | | | | | | | | | | | | | | | | | | | | | | | RFC: https://bugzilla.tianocore.org/show_bug.cgi?id=3937 EdkiiMemoryAcceptProtocol is defined in MdePkg, the method AcceptMemory() can be called when memory needs to be accepted. EdkiiMemoryAcceptProtocol can be installed by architecture-specific drivers such as TdxDxe. This allows different isolation architectures to realize their own low-level methods to accept memory. Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Zhiguang Liu <zhiguang.liu@intel.com> Cc: Erdem Aktas <erdemaktas@google.com> Cc: Gerd Hoffmann <kraxel@redhat.com> Cc: James Bottomley <jejb@linux.ibm.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Tom Lendacky <thomas.lendacky@amd.com> Acked-by: Gerd Hoffmann <kraxel@redhat.com> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn> Signed-off-by: Jiaqi Gao <jiaqi.gao@intel.com> Signed-off-by: Min Xu <min.m.xu@intel.com>
* MdePkg: Add UEFI Unaccepted memory definitionMin M Xu2022-11-012-1/+14
| | | | | | | | | | | | | | | | | | | | RFC: https://bugzilla.tianocore.org/show_bug.cgi?id=3937 Plase refer to: UEFI Spec v2.9 Table 7-5 Memory Type Usage before ExitBootServices() Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Zhiguang Liu <zhiguang.liu@intel.com> Cc: Erdem Aktas <erdemaktas@google.com> Cc: Gerd Hoffmann <kraxel@redhat.com> Cc: James Bottomley <jejb@linux.ibm.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Tom Lendacky <thomas.lendacky@amd.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com> Acked-by: Gerd Hoffmann <kraxel@redhat.com> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn> Signed-off-by: Min Xu <min.m.xu@intel.com>
* MdePkg: Increase EFI_RESOURCE_MAX_MEMORY_TYPEMin M Xu2022-11-011-1/+10
| | | | | | | | | | | | | | | | | | | | | | | RFC: https://bugzilla.tianocore.org/show_bug.cgi?id=3937 BZ3937_EFI_RESOURCE_MEMORY_UNACCEPTED is defined for unaccepted memory. But this defitinion has not been officially in the PI spec. Base on the code-first we define EFI_RESOURCE_MEMORY_UNACCEPTED at MdeModulePkg/Include/Pi/PrePiHob.h and update EFI_RESOURCE_MAX_MEMORY_TYPE to 8. After BZ3937_EFI_RESOURCE_MEMORY_UNACCEPTED is officially published in PI spec, we will re-visit here. Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Zhiguang Liu <zhiguang.liu@intel.com> Cc: Erdem Aktas <erdemaktas@google.com> Cc: Gerd Hoffmann <kraxel@redhat.com> Cc: James Bottomley <jejb@linux.ibm.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Tom Lendacky <thomas.lendacky@amd.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn> Signed-off-by: Min Xu <min.m.xu@intel.com>
* MdePkg/BaseSafeIntLib: Add LoongArch64 architecture for BaseSafeIntLib.Chao Li2022-10-141-4/+5
| | | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4053 Add LoongArch64 architecture for BaseSafeIntLib library. Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Zhiguang Liu <zhiguang.liu@intel.com> Signed-off-by: Chao Li <lichao@loongson.cn> Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
* MdePkg/BaseSynchronizationLib: LoongArch cache related code.Chao Li2022-10-143-0/+361
| | | | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4053 Support LoongArch cache related functions. Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Zhiguang Liu <zhiguang.liu@intel.com> Signed-off-by: Chao Li <lichao@loongson.cn> Co-authored-by: Baoqi Zhang <zhangbaoqi@loongson.cn> Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
* MdePkg/BaseCpuLib: LoongArch Base CPU library implementation.Chao Li2022-10-144-3/+39
| | | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4053 Implement LoongArch CPU related functions in BaseCpuLib. Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Zhiguang Liu <zhiguang.liu@intel.com> Signed-off-by: Chao Li <lichao@loongson.cn> Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
* MdePkg/BasePeCoff: Add LoongArch PE/Coff related code.Chao Li2022-10-144-1/+146
| | | | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4053 Add LoongArch image relocation. Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Zhiguang Liu <zhiguang.liu@intel.com> Signed-off-by: Chao Li <lichao@loongson.cn> Co-authored-by: Baoqi Zhang <zhangbaoqi@loongson.cn> Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
* MdePkg/BaseIoLibIntrinsic: IoLibNoIo for LoongArch architecture.Chao Li2022-10-142-4/+9
| | | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4053 LoongArch MMIO library instance, use the IoLibNoIo. Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Zhiguang Liu <zhiguang.liu@intel.com> Signed-off-by: Chao Li <lichao@loongson.cn> Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
* MdePkg/BaseCacheMaintenanceLib: LoongArch cache maintenance implementation.Chao Li2022-10-142-1/+259
| | | | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4053 Implement LoongArch cache maintenance functions in BaseCacheMaintenanceLib. Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Zhiguang Liu <zhiguang.liu@intel.com> Signed-off-by: Chao Li <lichao@loongson.cn> Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
* MdePkg/BaseLib: BaseLib for LOONGARCH64 architecture.Chao Li2022-10-1412-1/+363
| | | | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4053 Add LoongArch LOONGARCH64 BaseLib functions. Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Zhiguang Liu <zhiguang.liu@intel.com> Signed-off-by: Chao Li <lichao@loongson.cn> Co-authored-by: Baoqi Zhang <zhangbaoqi@loongson.cn> Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
* MdePkg/Include: LoongArch definitions.Chao Li2022-10-145-13/+136
| | | | | | | | | | | | | | | | | | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4053 Add LoongArch processor related definitions. For the Http boot and PXE boot types seeing this URL section "Processor Architecture Type" for the LOONGARCH values: https://www.iana.org/assignments/dhcpv6-parameters/dhcpv6-parameters.xhtml For definitions of PE/COFF and LOONGARCH relocation types, see the "Machine Types" and "Basic Relocation Types" sections of this URL for LOONGARCH values: https://docs.microsoft.com/en-us/windows/win32/debug/pe-format For the register definitions of exceptions context, see the UEFI V2.10 18.2.2, 18.2.4 and 18.2.5 sections of this URL for LOONGARCH definitions: https://uefi.org/specs/UEFI/2.10/18_Protocols_Debugger_Support.html Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Zhiguang Liu <zhiguang.liu@intel.com> Signed-off-by: Chao Li <lichao@loongson.cn> Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
* MdePkg: Add LoongArch LOONGARCH64 bindingChao Li2022-10-143-1/+126
| | | | | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4053 Add LOONGARCH64 sections in MdePkg.dec and LOONGARCH64 ProcessorBind.h Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Zhiguang Liu <zhiguang.liu@intel.com> Signed-off-by: Chao Li <lichao@loongson.cn> Co-authored-by: Baoqi Zhang <zhangbaoqi@loongson.cn> Co-authored-by: Dongyan Qian <qiandongyan@loongson.cn> Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
* MdePkg/DxeServicesLib: Add LOONGARCH64 architectureChao Li2022-10-141-2/+2
| | | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4053 Add LOONGARCH64 architecture to MdePkg/DxeServiceLib. Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Zhiguang Liu <zhiguang.liu@intel.com> Signed-off-by: Chao Li <lichao@loongson.cn> Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
* MdePkg/Include: Add LOONGARCH related definitions EDK2 CI.Chao Li2022-10-141-20/+25
| | | | | | | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4053 HTTP/PXE boot LOONGARCH64 related definitions for EDK2 CI. For the LOONGARCH values, please seeing following URL section "Processor Architecture Types": https://www.iana.org/assignments/dhcpv6-parameters/dhcpv6-parameters.xhtml Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Zhiguang Liu <zhiguang.liu@intel.com> Signed-off-by: Chao Li <lichao@loongson.cn> Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
* MdePkg: Added LoongArch jump buffer register definition to MdePkg.ci.yamlChao Li2022-10-141-0/+12
| | | | | | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4053 If the new Arch register is defined in BaseLib.h when running the CI tests, it will give an ECC check error. Add the LoongArch register defined in the ExceptionList field to make the CI ECC check pass. Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Zhiguang Liu <zhiguang.liu@intel.com> Signed-off-by: Chao Li <lichao@loongson.cn> Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
* MdePkg: Added file of DebugSupport.h to MdePkg.ci.yamlChao Li2022-10-141-0/+1
| | | | | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4053 DebugSupport.h is all defined by UEFI Spec, most of the code doesn't fit EDKII coding style, add it to IgnoreFiles field to make CI ECC check pass. Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Zhiguang Liu <zhiguang.liu@intel.com> Signed-off-by: Chao Li <lichao@loongson.cn> Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
* MdePkg: Add Tls configuration related defineYi Li2022-10-101-37/+75
| | | | | | | | | | | | REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3892 Consumed by TlsSetEcCurve and TlsSetSignatureAlgoList. Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Signed-off-by: Yi Li <yi1.li@intel.com> Acked-by: Michael D Kinney <michael.d.kinney@intel.com>
* MdePkg: Added support for SMBIOS spec v3.6.0 to Smbios.hSainadh Nagolu2022-08-181-32/+66
| | | | | | | | | | Updated SmBios.h with new fields added as part of SMBIOS 3.6.0 spec update. Signed-off-by: Sainadh Nagolu <sainadhn@ami.com> Cc: Vasudevan Sambandan <vasudevans@ami.com> Cc: Sundaresan S <sundaresans@ami.com> Reviewed-by: Samer El-Haj-Mahmoud <Samer.El-Haj-Mahmoud@arm.com> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
* MdePkg: Improved Smbios Type9 table and Smbios spec v3.5.0 ChangesSainadh Nagolu2022-08-181-31/+40
| | | | | | | | | | In Type9 structure since PeerGroups has a variable number of entries, must not define new fields in the structure.So added an extended structure and defined new fields added after PeerGroups. Also done some improvements to Smbios 3.5.0 spec changes. Signed-off-by: Sainadh Nagolu <sainadhn@ami.com> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
* MdePkg/Library/UefiDevicePathLib: Add back StandaloneMm INF fileMichael D Kinney2022-08-102-0/+79
| | | | | | | | | | | | | | | | | | | REF: https://github.com/tianocore/edk2/pull/3130 The above PR removed UefiDevicePathLibStandaloneMm.inf, which is a non-backwards compatible change and does not provide time for downstream platforms to use the UefiDevicePathLibBase.inf. Add UefiDevicePathLibStandaloneMm.inf back, but add comments that it is deprecated and that UefiDevicePathLibBase.inf should be used instead. Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Zhiguang Liu <zhiguang.liu@intel.com> Cc: Mateusz Albecki <mateusz.albecki@intel.com> Cc: Yanbo Huang <yanbo.huang@intel.com> Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
* MdePkg: IORT header update for IORT Rev E.d specSami Mujawar2022-07-291-8/+78
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Bugzilla: 3458 - Add support IORT Rev E.d specification updates (https://bugzilla.tianocore.org/show_bug.cgi?id=3458) The IO Remapping Table, Platform Design Document, Revision E.d, Feb 2022 (https://developer.arm.com/documentation/den0049/) introduces the following updates, collectively including the updates and errata fixes to Rev E, Rev E.a, Rev E.b, Rev E.c: - increments the IORT table revision to 5. - updates the node definition to add an 'Identifier' field. - adds definition of node type 6 - Reserved Memory Range node. - adds definition for Memory Range Descriptors. - adds flag to indicate PRI support for root complexes. - adds flag to indicate if the root complex supports forwarding of PASID information on translated transactions to the SMMU. - adds flag to indicate if the root complex supports PASID. - adds flags to define access privilege and attributes for the memory ranges. Therefore, update the IORT header file to reflect these changes, and also rename the EFI_ACPI_IO_REMAPPING_TABLE_REVISION macro to EFI_ACPI_IO_REMAPPING_TABLE_REVISION_00. Also update the IORT generator in DynamicTablesPkg to fix the compilation errors so that Git Bisect can work. Signed-off-by: Sami Mujawar <sami.mujawar@arm.com> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn> Reviewed-by: Pierre Gondois <pierre.gondois@arm.com> Reviewed-by: Zhichao Gao <zhichao.gao@intel.com>
* MdePkg/UefiDevicePathLib: Add support for PEIMsMateusz Albecki2022-07-233-4/+4
| | | | | | | | | | | | | DevicePathLib utilities are useful in PEI to locate the devices which need an opal unlock on S3 resume. This commit reuses the implementation done for standalone MM support and makes the StandaloneMm library Base. Signed-off-by: Mateusz Albecki <mateusz.albecki@intel.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Zhiguang Liu <zhiguang.liu@intel.com> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
* NetworkPkg/HttpBootDxe: Add Support for HTTP Boot Basic AuthenticationSaloni Kasbekar2022-07-192-1/+13
| | | | | | | | | | | | | REF:https://bugzilla.tianocore.org/show_bug.cgi?id=2504 Add support for TLS Client Authentication using Basic Authentication for HTTP Boot Cc: Maciej Rabeda <maciej.rabeda@linux.intel.com> Cc: Wu Jiaxin <jiaxin.wu@intel.com> Cc: Siyuan Fu <siyuan.fu@intel.com> Signed-off-by: Saloni Kasbekar <saloni.kasbekar@intel.com> Reviewed-by: Maciej Rabeda <maciej.rabeda@linux.intel.com>
* MdePkg/include: Update DMAR definitions to Intel VT-d spec ver4.0Robert Kowalewski2022-07-111-8/+38
| | | | | | | | | | | | | | | | | | | | | | | | | Updated DMAR definitions accordingly to changes in Intel(R) Virtualization Technology for Directed I/O (VT-D) Architecture Specification ver4.0. Added new definition of remapping structure - SIDP. The SoC Integrated Device Property (SIDP) reporting structure identifies devices that have special properties and that may put restrictions on how system software must configure remapping structures that govern such devices in a platform where remapping hardware is enabled. Updated DRHD definition - field 'reserved' is replaced with 'Size'. REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3978 Signed-off-by: Robert Kowalewski <robert.kowalewski@intel.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Zhiguang Liu <zhiguang.liu@intel.com> Cc: Jenny Huang <jenny.huang@intel.com> Cc: Sheng Wei <w.sheng@intel.com> Reviewed-by: Sheng Wei <w.sheng@intel.com> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
* MdePkg/Acpi62: Add bit definitions to NFIT Platform Capabilities StructureMiki Shindo2022-07-013-0/+12
| | | | | | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3915 This commit adds each capability bit definition for NFIT Platform Capabilities Structure. The type has been added since ACPI Specification Version 6.2A. Signed-off-by: Miki Shindo <miki.shindo@intel.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Zhiguang Liu <zhiguang.liu@intel.com> Cc: Ray Ni <ray.ni@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
* MdePkg/Acpi62: Add type 7 NFIT Platform Capabilities Structure supportMiki Shindo2022-06-293-0/+39
| | | | | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3915 This commit adds a definition type 7 Platform Capabilities Structure and the struct definition for NFIT Table Structure Types. The type has been added since ACPI Specification Version 6.2A. Signed-off-by: Miki Shindo <miki.shindo@intel.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Zhiguang Liu <zhiguang.liu@intel.com> Cc: Ray Ni <ray.ni@intel.com> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
* MdePkg/BaseLib: Add CRC16-ANSI and CRC32c implementationsPedro Falcato2022-06-132-1/+178
| | | | | | | | | | | | | | BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3871 Add the CRC16-ANSI and CRC32C implementations previously found at Features/Ext4Pkg/Ext4Dxe/Crc{16,32c}.c to BaseLib. Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Zhiguang Liu <zhiguang.liu@intel.com> Signed-off-by: Pedro Falcato <pedro.falcato@gmail.com> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
* MdePkg: Remove "assert" from SmmCpuRendevousLibNull.cZhihao Li2022-06-131-1/+0
| | | | | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3931 Some drivers will break down when they use SmmWaitForAllProcessor() which from SmmCpuRendezvousLibNull.c. Removing the code "ASSERT(False)" will make consumer work normally if they keep default setting for sync mode. Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Signed-off-by: Zhihao Li <zhihao.li@intel.com> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
* MdePkg: Define CC Measure EventLog ACPI TableMin Xu2022-06-031-0/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | RFC: https://bugzilla.tianocore.org/show_bug.cgi?id=3853 TDVF set up an ACPI table (EFI_CC_EVENTLOG_ACPI_TABLE) to pass the event-log information. The event log created by the TD owner contains the hashes to reconstruct the MRTD and RTMR registers. Please refer to Sec 4.3.3 in blow link: https://www.intel.com/content/dam/develop/external/us/en/documents/ intel-tdx-guest-hypervisor-communication-interface-1.0-344426-002.pdf Please be noted, the definition of EFI_CC_EVENTLOG_ACPI_TABLE is a little different from the above document. This difference is based on below discussion: - https://edk2.groups.io/g/devel/message/87396 - https://edk2.groups.io/g/devel/message/87402 This change will be reflected in the next version of the above document. Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Zhiguang Liu <zhiguang.liu@intel.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Jian J Wang <jian.j.wang@intel.com> Cc: Ken Lu <ken.lu@intel.com> Cc: Sami Mujawar <sami.mujawar@arm.com> Cc: Gerd Hoffmann <kraxel@redhat.com> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com> Signed-off-by: Min Xu <min.m.xu@intel.com>
* MdePkg: Remove RVCT supportRebecca Cran2022-05-139-73/+3
| | | | | | | | RVCT is obsolete and no longer used. Remove support for it. Signed-off-by: Rebecca Cran <quic_rcran@quicinc.com> Reviewed-by: Ard Biesheuvel <ardb@kernel.org>
* MdePkg: add SmmCpuRendezvousLib.h and SmmCpuRendezvousLibNull implement.Li, Zhihao2022-05-096-3/+90
| | | | | | | | | | | | | | | | | | | | | | | | | | | REF? https://bugzilla.tianocore.org/show_bug.cgi?id=3912 UefiCpuPkg define a new Protocol with the new services SmmWaitForAllProcessor(), which can be used by SMI handler to optionally wait for other APs to complete SMM rendezvous in relaxed AP mode. VariableSmm and VariableStandaloneMM driver in MdeModulePkg need to use this services but MdeModulePkg can't depend on UefiCpuPkg. Thus, the solution is moving SmmCpuRendezvouslib.h from UefiCpuPkg to MdePkg and creating SmmCpuRendezvousLib NullLib version implementation in MdePkg as dependency for the pkg that can't depend on UefiCpuPkg. Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Eric Dong <eric.dong@intel.com> Cc: Ray Ni <ray.ni@intel.com> Cc: Michael Kubacki <mikuback@linux.microsoft.com> Cc: Siyuan Fu <siyuan.fu@intel.com> Signed-off-by: Zhihao Li <zhihao.li@intel.com> Acked-by: Liming Gao <gaoliming@byosoft.com.cn>
* MdePkg: Add CpuLib to module INFs that depend on UefiCpuLib.Yu Pu2022-05-061-0/+1
| | | | | | | | | | | | There are two libraries: MdePkg/CpuLib and UefiCpuPkg/UefiCpuLib and UefiCpuPkg/UefiCpuLib will be merged to MdePkg/CpuLib. To avoid build failure, add CpuLib dependency to all modules that depend on UefiCpuLib. Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Zhiguang Liu <zhiguang.liu@intel.com> Signed-off-by: Yu Pu <yu.pu@intel.com> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
* MdePkg: Update smbiosview type 9 with SMBIOS 3.5 fieldsBo Chang Ke2022-04-221-65/+112
| | | | | | | | | | | | | | | REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3896 update smbiosview type 9 related fileds. Signed-off-by: Bo Chang Ke <bo-changx.ke@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Zhiguang Liu <zhiguang.liu@intel.com> Cc: Zhichao Gao <zhichao.gao@intel.com> Cc: Dandan Bi <dandan.bi@intel.com> Cc: Star Zeng <star.zeng@intel.com> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
* MdePkg: Probe Cc guest in BaseIoLibIntrinsicSevMin Xu2022-04-192-11/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3902 Bad IO performance in SEC phase is observed after TDX features was introduced. (after commit b6b2de884864 - "MdePkg: Support mmio for Tdx guest in BaseIoLibIntrinsic"). This is because IsTdxGuest() will be called in each MMIO operation. It is trying to cache the result of the probe in the efi data segment. However, that doesn't work in SEC, because the data segment is read only (so the write seems to succeed but a read will always return the original value), leading to us calling TdIsEnabled() check for every mmio we do, which is causing the slowdown because it's very expensive. This patch is to call CcProbe instead of TdIsEnabled in IsTdxGuest. Null instance of CcProbe always returns CCGuestTypeNonEncrypted. Its OvmfPkg version returns the guest type in Ovmf work area. Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Zhiguang Liu <zhiguang.liu@intel.com> Cc: James Bottomley <jejb@linux.ibm.com> Cc: James Bottomley <James.Bottomley@HansenPartnership.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Gerd Hoffmann <kraxel@redhat.com> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com> Reviewed-by: Tom Lendacky <thomas.lendacky@amd.com> Signed-off-by: Min Xu <min.m.xu@intel.com>
* MdePkg: Add CcProbeLibNullMin Xu2022-04-195-0/+79
| | | | | | | | | | | | | | | | | | | | | BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3902 CcProbeLib is used to probe the Confidential Computing guest type. This library is designed to run on SEC / PEI / DXE phases. A null instance of the library always returns CCGuestTypeNonEncrypted. A platform specific CcProbeLib will be implemented, for example, in OvmfPkg. Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Zhiguang Liu <zhiguang.liu@intel.com> Cc: James Bottomley <jejb@linux.ibm.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Gerd Hoffmann <kraxel@redhat.com> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com> Reviewed-by: Tom Lendacky <thomas.lendacky@amd.com> Signed-off-by: Min Xu <min.m.xu@intel.com>
* MdePkg: Add CC_GUEST_TYPE in ConfidentialComputingGuestAttr.hMin Xu2022-04-191-1/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3902 The confidential computing guest type (GUEST_TYPE) was defined in OvmfPkg/Include/WorkArea.h. Now it is to be moved to MdePkg/Include/ConfidentialComputingGuestAttr.h and renamed as CC_GUEST_TYPE. There are 2 reasons for this change. 1. CC_GUEST_TYPE is a generic definition and will be used in CcProbeLib which is defined in MdePkg. 2. Based on the latest edk2 coding style: - First character should be upper case - Must contain lower case characters - No white space characters - Global variable name must start with a 'g' As the first step CC_GUEST_TYPE is defined in this patch. In the next patch GUEST_TYPE will be deleted. This is to make sure the bisect work correctly. Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Zhiguang Liu <zhiguang.liu@intel.com> Cc: James Bottomley <jejb@linux.ibm.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Gerd Hoffmann <kraxel@redhat.com> Cc: Brijesh Singh <brijesh.singh@amd.com> Cc: Erdem Aktas <erdemaktas@google.com> Cc: Tom Lendacky <thomas.lendacky@amd.com> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com> Reviewed-by: Tom Lendacky <thomas.lendacky@amd.com> Signed-off-by: Min Xu <min.m.xu@intel.com>
* MdePkg: Add macro to check SEV / TDX guestMin Xu2022-04-021-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | RFC: https://bugzilla.tianocore.org/show_bug.cgi?id=3429 Add macros CC_GUEST_IS_SEV / CC_GUEST_IS_TDX to check SEV / TDX guest. Cc: Michael Roth <michael.roth@amd.com> Cc: Ray Ni <ray.ni@intel.com> Cc: Rahul Kumar <rahul1.kumar@intel.com> Cc: Eric Dong <eric.dong@intel.com> Cc: James Bottomley <jejb@linux.ibm.com> Cc: Min Xu <min.m.xu@intel.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Tom Lendacky <thomas.lendacky@amd.com> Cc: Jordan Justen <jordan.l.justen@intel.com> Cc: Ard Biesheuvel <ardb+tianocore@kernel.org> Cc: Erdem Aktas <erdemaktas@google.com> Cc: Gerd Hoffmann <kraxel@redhat.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Zhiguang Liu <zhiguang.liu@intel.com> Acked-by: Gerd Hoffmann <kraxel@redhat.com> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com> Signed-off-by: Min Xu <min.m.xu@intel.com>
* MdePkg: Support IoRead/IoWrite for Tdx guest in BaseIoLibIntrinsicMin Xu2022-04-022-25/+99
| | | | | | | | | | | | | | | | | | | | | | RFC: https://bugzilla.tianocore.org/show_bug.cgi?id=3429 This commit supports IoRead/IoWrite for SEV/TDX/Legacy guest in one binary. It checks the guest type in runtime and then call corresponding functions. Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Zhiguang Liu <zhiguang.liu@intel.com> Cc: Brijesh Singh <brijesh.singh@amd.com> Cc: Erdem Aktas <erdemaktas@google.com> Cc: James Bottomley <jejb@linux.ibm.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Tom Lendacky <thomas.lendacky@amd.com> Cc: Gerd Hoffmann <kraxel@redhat.com> Acked-by: Gerd Hoffmann <kraxel@redhat.com> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com> Signed-off-by: Min Xu <min.m.xu@intel.com>
* MdePkg: Support IoFifo for Tdx guest in BaseIoLibIntrinsicMin Xu2022-04-024-17/+402
| | | | | | | | | | | | | | | | | | | | | | | RFC: https://bugzilla.tianocore.org/show_bug.cgi?id=3429 Previously IoFifo functions are in X64/IoFifoSev.nasm which supports both SEV guest and Legacy guest. IoLibFifo.c is introduced to support SEV/TDX/Legacy guest in one binary. It checks the guest type in runtime and call corresponding functions then. Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Zhiguang Liu <zhiguang.liu@intel.com> Cc: Brijesh Singh <brijesh.singh@amd.com> Cc: Erdem Aktas <erdemaktas@google.com> Cc: James Bottomley <jejb@linux.ibm.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Tom Lendacky <thomas.lendacky@amd.com> Cc: Gerd Hoffmann <kraxel@redhat.com> Acked-by: Gerd Hoffmann <kraxel@redhat.com> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com> Signed-off-by: Min Xu <min.m.xu@intel.com>
* MdePkg: Support mmio for Tdx guest in BaseIoLibIntrinsicMin Xu2022-04-023-8/+78
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | RFC: https://bugzilla.tianocore.org/show_bug.cgi?id=3429 TDVF access MMIO with TDG.VP.VMCALL to invoke VMM provided emulation functions. If the access to MMIO fails, it fall backs to the direct access. BaseIoLibIntrinsic.inf is the IoLib used by other packages. It will not support I/O in Td guest. But some files are shared between BaseIoLibIntrinsic and BaseIoLibIntrinsicSev (IoLib.c is the example). So IoLibInternalTdxNull.c (which holds the null stub of the Td I/O routines) is included in BaseIoLibIntrinsic.inf. BaseIoLibIntrinsic.inf doesn't import TdxLib so that the Pkgs which include BaseIoLibIntrinsic.inf need not include TdxLib. Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Zhiguang Liu <zhiguang.liu@intel.com> Cc: Brijesh Singh <brijesh.singh@amd.com> Cc: Erdem Aktas <erdemaktas@google.com> Cc: James Bottomley <jejb@linux.ibm.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Tom Lendacky <thomas.lendacky@amd.com> Cc: Gerd Hoffmann <kraxel@redhat.com> Acked-by: Gerd Hoffmann <kraxel@redhat.com> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com> Signed-off-by: Min Xu <min.m.xu@intel.com>
* MdePkg: Add helper functions for Tdx guest in BaseIoLibIntrinsicMin Xu2022-04-024-0/+1583
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | RFC: https://bugzilla.tianocore.org/show_bug.cgi?id=3429 Intel TDX architecture does not prescribe a specific software convention to perform I/O from the guest TD. Guest TD providers have many choices to provide I/O to the guest. The common I/O models are emulated devices, para-virtualized devices, SRIOV devices and Direct Device assignments. TDVF chooses para-virtualized I/O (Choice-A) which use the TDG.VP.VMCALL function to invoke the funtions provided by the host VMM to perform I/O. Another choice (Choice-B) is the emulation performed by the #VE handler. There are 2 benefits of para-virtualized I/O: 1. Performance. VMEXIT/VMENTRY is skipped so that the performance is better than #VE handler. 2. De-couple with #VE handler. Choice-B depends on the #VE handler which means I/O is not available until #VE handler is installed. For example, in PEI phase #VE handler is installed in CpuMpPei, while communication with Qemu (via I/O port) happen earlier than it. IoLibInternalTdx.c provides the helper functions for Tdx guest. IoLibInternalTdxNull.c provides the null version of the helper functions. It is included in the Non-X64 IoLib so that the build will not be broken. Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Zhiguang Liu <zhiguang.liu@intel.com> Cc: Brijesh Singh <brijesh.singh@amd.com> Cc: Erdem Aktas <erdemaktas@google.com> Cc: James Bottomley <jejb@linux.ibm.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Tom Lendacky <thomas.lendacky@amd.com> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com> Signed-off-by: Min Xu <min.m.xu@intel.com>
* MdePkg: Add TdxLib to wrap Tdx operationsMin Xu2022-04-028-0/+619
| | | | | | | | | | | | | | | | | | | | | | | | | | | | RFC: https://bugzilla.tianocore.org/show_bug.cgi?id=3429 TdxLib is created with functions to perform the related Tdx operation. This includes functions for: - TdAcceptPages : Accept pending private pages and initialize the pages to all-0 using the TD ephemeral private key. - TdExtendRtmr : Extend measurement to one of the RTMR registers. - TdSharedPageMask: Get the Td guest shared page mask which indicates it is a Shared or Private page. - TdMaxVCpuNum : Get the maximum number of virtual CPUs. - TdVCpuNum : Get the number of virtual CPUs. Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Zhiguang Liu <zhiguang.liu@intel.com> Cc: Brijesh Singh <brijesh.singh@amd.com> Cc: Erdem Aktas <erdemaktas@google.com> Cc: James Bottomley <jejb@linux.ibm.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Tom Lendacky <thomas.lendacky@amd.com> Cc: Gerd Hoffmann <kraxel@redhat.com> Acked-by: Gerd Hoffmann <kraxel@redhat.com> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com> Signed-off-by: Min Xu <min.m.xu@intel.com>
* MdePkg: Introduce basic Tdx functions in BaseLibMin Xu2022-04-026-0/+446
| | | | | | | | | | | | | | | | | | | | | | | RFC: https://bugzilla.tianocore.org/show_bug.cgi?id=3429 Introduce basic Tdx functions in BaseLib: - TdCall () - TdVmCall () - TdIsEnabled () Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Zhiguang Liu <zhiguang.liu@intel.com> Cc: Brijesh Singh <brijesh.singh@amd.com> Cc: Erdem Aktas <erdemaktas@google.com> Cc: James Bottomley <jejb@linux.ibm.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Tom Lendacky <thomas.lendacky@amd.com> Cc: Gerd Hoffmann <kraxel@redhat.com> Acked-by: Gerd Hoffmann <kraxel@redhat.com> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com> Signed-off-by: Min Xu <min.m.xu@intel.com>
* MdePkg: Update Cpuid.h for TdxMin Xu2022-04-021-2/+33
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | RFC: https://bugzilla.tianocore.org/show_bug.cgi?id=3429 Guest software can be designed to run either as a TD, as a legacy virtual machine, or directly on the CPU, based on enumeration of its run-time environment. [TDX-Module] Chap 10.2 defines the flow and the new CPUID leaf 0x21. [TDX-Module] Architecture Specification: Intel(R) Trust Domain Extensions Module, Chap 10.2, 344425-003US, August 2021 https://www.intel.com/content/dam/develop/external/us/en/documents/ tdx-module-1.0-public-spec-v0.931.pdf Cc: Ray Ni <ray.ni@intel.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Zhiguang Liu <zhiguang.liu@intel.com> Cc: Brijesh Singh <brijesh.singh@amd.com> Cc: Erdem Aktas <erdemaktas@google.com> Cc: James Bottomley <jejb@linux.ibm.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Tom Lendacky <thomas.lendacky@amd.com> Cc: Gerd Hoffmann <kraxel@redhat.com> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com> Acked-by: Gerd Hoffmann <kraxel@redhat.com> Signed-off-by: Min Xu <min.m.xu@intel.com>
* MdePkg: Add Tdx.hMin Xu2022-04-021-0/+203
| | | | | | | | | | | | | | | | | | | | RFC: https://bugzilla.tianocore.org/show_bug.cgi?id=3429 Tdx.h includes the Intel Trust Domain Extension definitions. Detailed information can be found in below document: https://software.intel.com/content/dam/develop/external/us/en/ documents/tdx-module-1eas-v0.85.039.pdf Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Zhiguang Liu <zhiguang.liu@intel.com> Cc: Gerd Hoffmann <kraxel@redhat.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Acked-by: Gerd Hoffmann <kraxel@redhat.com> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com> Signed-off-by: Min Xu <min.m.xu@intel.com>
* MdePkg/AcpiXX.h: Update Error Severity type for Generic Error Status BlockHao A Wu2022-03-218-14/+52
| | | | | | | | | | | | | | | | | | | | | | | | | Starting from ACPI Specification Version 5.1 Errata B, the term 'Correctable' is no longer being used as an error severity of the reported error in Chapter 18 APEI. This commit will a) For Acpi40.h & Acpi50.h Add new macro EFI_ACPI_X_X_ERROR_SEVERITY_RECOVERABLE, since both the terms 'Correctable' and 'Recoverable' are used to denote the same error severity. b) Header files starting from Acpi51.h to Acpi64.h Add new macro EFI_ACPI_X_X_ERROR_SEVERITY_RECOVERABLE. Keeps the origin EFI_ACPI_X_X_ERROR_SEVERITY_CORRECTABLE for compatibility consideration, but add comments to mark it as deprecated and should no longer be used. Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Zhiguang Liu <zhiguang.liu@intel.com> Cc: Ray Ni <ray.ni@intel.com> Signed-off-by: Hao A Wu <hao.a.wu@intel.com> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
* MdePkg/Include: Smbios Specification 3.5.0 changesAbdul Lateef Attar via groups.io2022-03-181-4/+140
| | | | | | | | | | | | | | | | | | | | | | Adds following changes 1) Added support for manufacturing mode in BIOS Characteristics Extension Byte 2. 2) Added support for slot height in System Slot Table (type 9). 3) Updated Built-in pointing device interface with USB, I2C and SPI. 4) Updates Onboard Devices Extended Information with wireless LAN, bluetooth, WWAN, eMMC, NVMe and UFC. 5) Added new table Firmware Inventory Information (Type 45) and its corresponding enum values. 6) Added new table String Property Table (Type 46) and its corresponding enum values. Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Zhiguang Liu <zhiguang.liu@intel.com> Signed-off-by: Abdul Lateef Attar <abdattar@amd.com> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-24 20:03:55 +0000