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* OvmfPkg: Replace BSD License with BSD+Patent LicenseMichael D Kinney2019-04-093-21/+3
| | | | | | | | | | | | | | | | | | | | https://bugzilla.tianocore.org/show_bug.cgi?id=1373 Replace BSD 2-Clause License with BSD+Patent License. This change is based on the following emails: https://lists.01.org/pipermail/edk2-devel/2019-February/036260.html https://lists.01.org/pipermail/edk2-devel/2018-October/030385.html RFCs with detailed process for the license change: V3: https://lists.01.org/pipermail/edk2-devel/2019-March/038116.html V2: https://lists.01.org/pipermail/edk2-devel/2019-March/037669.html V1: https://lists.01.org/pipermail/edk2-devel/2019-March/037500.html Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com>
* OvmfPkg/Virtio10Dxe: convert to PciCapLibLaszlo Ersek2018-05-242-88/+51
| | | | | | | | | | | | | | | | | Replace the manual capability list parsing in OvmfPkg/Virtio10Dxe with PciCapLib and PciCapPciIoLib API calls. The VIRTIO_PCI_CAP_LINK structure type is now superfluous. (Well, it always has been; we should have used EFI_PCI_CAPABILITY_HDR.) Also, EFI_PCI_CAPABILITY_VENDOR_HDR is now included at the front of VIRTIO_PCI_CAP. No driver other than Virtio10Dxe relies on VIRTIO_PCI_CAP. Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org> Cc: Jordan Justen <jordan.l.justen@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
* OvmfPkg/Virtio10Dxe: list "Virtio10.h" in the INF fileLaszlo Ersek2018-03-131-0/+1
| | | | | | | | | | | | | | The header file defines macros and types that are private to the driver and are used by the sole C file of the driver. Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org> Cc: Jordan Justen <jordan.l.justen@intel.com> Suggested-by: Michael Kinney <michael.d.kinney@intel.com> Ref: http://mid.mail-archive.com/E92EE9817A31E24EB0585FDF735412F56327F7D3@ORSMSX113.amr.corp.intel.com Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
* OvmfPkg/Virtio10Dxe: add the RingBaseShift offsetBrijesh Singh2017-08-251-2/+3
| | | | | | | | | | | | | | | | virtio drivers use VIRTIO_DEVICE_PROTOCOL.MapSharedBuffer() to map the ring buffer host address to a device address. If an IOMMU is present then RingBaseShift contains the offset from the host address. Suggested-by: Laszlo Ersek <lersek@redhat.com> Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org> Cc: Jordan Justen <jordan.l.justen@intel.com> Cc: Tom Lendacky <thomas.lendacky@amd.com> Cc: Laszlo Ersek <lersek@redhat.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Brijesh Singh <brijesh.singh@amd.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Regression-tested-by: Laszlo Ersek <lersek@redhat.com>
* OvmfPkg/Virtio: take RingBaseShift in SetQueueAddress()Brijesh Singh2017-08-251-1/+4
| | | | | | | | | | | | | | | | | | | | | | | | | For the case when an IOMMU is used for translating system physical addresses to DMA bus master addresses, the transport-independent virtio device drivers will be required to map their VRING areas to bus addresses with VIRTIO_DEVICE_PROTOCOL.MapSharedBuffer() calls. - MMIO and legacy virtio transport do not support IOMMU to translate the addresses hence RingBaseShift will always be set to zero. - modern virtio transport supports IOMMU to translate the address, in next patch we will update the Virtio10Dxe to use RingBaseShift offset. Suggested-by: Laszlo Ersek <lersek@redhat.com> Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org> Cc: Jordan Justen <jordan.l.justen@intel.com> Cc: Tom Lendacky <thomas.lendacky@amd.com> Cc: Laszlo Ersek <lersek@redhat.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Brijesh Singh <brijesh.singh@amd.com> [lersek@redhat.com: remove commit msg paragraph with VirtioLib reference] [lersek@redhat.com: fix typo in VIRTIO_SET_QUEUE_ADDRESS comment block] Reviewed-by: Laszlo Ersek <lersek@redhat.com> Regression-tested-by: Laszlo Ersek <lersek@redhat.com>
* OvmfPkg/Virtio10Dxe: implement IOMMU-like member functionsBrijesh Singh2017-08-251-2/+120
| | | | | | | | | | | | | | | | | | | | | | | | | | | The patch implements the newly added IOMMU-like member functions by respectively delegating the job to: - VIRTIO_DEVICE_PROTOCOL.AllocateSharedPages() -> EFI_PCI_IO_PROTOCOL.AllocateBuffer() - VIRTIO_DEVICE_PROTOCOL.FreeSharedPages() -> EFI_PCI_IO_PROTOCOL.FreeBuffer() - VIRTIO_DEVICE_PROTOCOL.MapSharedBuffer() -> EFI_PCI_IO_PROTOCOL.Map() - VIRTIO_DEVICE_PROTOCOL.UnmapSharedBuffer() -> EFI_PCI_IO_PROTOCOL.Unmap() Suggested-by: Laszlo Ersek <lersek@redhat.com> Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org> Cc: Jordan Justen <jordan.l.justen@intel.com> Cc: Tom Lendacky <thomas.lendacky@amd.com> Cc: Laszlo Ersek <lersek@redhat.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Brijesh Singh <brijesh.singh@amd.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Regression-tested-by: Laszlo Ersek <lersek@redhat.com>
* OvmfPkg/Virtio10Dxe: supply missing BUS_MASTER attributeBrijesh Singh2017-08-151-1/+1
| | | | | | | | | | | | | | | | | Virtio devices read and write guest RAM (they don't just decode their IO and/or MMIO BARs), which translates to "bus master". Suggested-by: Laszlo Ersek <lersek@redhat.com> Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org> Cc: Jordan Justen <jordan.l.justen@intel.com> Cc: Tom Lendacky <thomas.lendacky@amd.com> Cc: Laszlo Ersek <lersek@redhat.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Brijesh Singh <brijesh.singh@amd.com> [lersek@redhat.com: expand commit message body] [lersek@redhat.com: remove superfluous whitespace in assignment] Reviewed-by: Laszlo Ersek <lersek@redhat.com> Regression-tested-by: Laszlo Ersek <lersek@redhat.com>
* OvmfPkg/Virtio10Dxe: don't bind virtio-vgaLaszlo Ersek2016-09-011-3/+15
| | | | | | | | | | | | | | | | | | | | | | Commit 9399f68ae359 ("OvmfPkg: Virtio10Dxe: non-transitional driver for virtio-1.0 PCI devices") created a "competition" between Virtio10Dxe and QemuVideoDxe for virtio-vga devices. The binding order between these drivers is unspecified, and the wrong order effectively breaks commit 94210dc95e9f ("OvmfPkg: QemuVideoDxe: add virtio-vga support"). Thus, never bind virtio-vga in Virtio10Dxe; QemuVideoDxe provides better compatibility for guest OSes that insist on inheriting a linear framebuffer. Users who prefer the VirtIo GPU interface at boot time should specify virtio-gpu-pci, which is exactly virtio-vga, minus the VGA compatibility (such as the framebuffer). Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org> Cc: Jordan Justen <jordan.l.justen@intel.com> Ref: https://tianocore.acgmultimedia.com/show_bug.cgi?id=66 Fixes: 9399f68ae359234b142c293ad1bef75f470ced30 Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
* OvmfPkg: Virtio10Dxe: non-transitional driver for virtio-1.0 PCI devicesLaszlo Ersek2016-04-063-0/+1157
This driver implements the VIRTIO_DEVICE_PROTOCOL for non-transitional PCI devices, based on the virtio-1.0 specification (csprd05). Non-transitional means that it only binds QEMU's virtio-xxx-pci devices that receive the ",disable-legacy=on,disable-modern=off" properties on the QEMU command line. These devices have distinct PCI Device IDs from those that are bound by VirtioPciDeviceDxe. The central abstraction of this driver is the VIRTIO_1_0_CONFIG type. It is practically a "fat pointer" to a register block. The pointed-to register block - may or may not exist (the latter being mostly useful for virtio-1.0 devices that have no device-specific registers), - lives in one of the device's BARs, - lives in an IO or MMIO BAR, - lives at an offset relative to the BAR start, - has its size also maintained. Such VIRTIO_1_0_CONFIG "fat pointers" (i.e., the locations of the register blocks) are parsed from vendor capabilities that reside in the device's standard PCI capabilities list (in PCI config space). Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org> Cc: Jordan Justen <jordan.l.justen@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Tested-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Acked-by: Jordan Justen <jordan.l.justen@intel.com>
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