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* OvmfPkg/Virtio10Dxe: don't bind virtio-vgaLaszlo Ersek2016-09-011-3/+15
| | | | | | | | | | | | | | | | | | | | | | Commit 9399f68ae359 ("OvmfPkg: Virtio10Dxe: non-transitional driver for virtio-1.0 PCI devices") created a "competition" between Virtio10Dxe and QemuVideoDxe for virtio-vga devices. The binding order between these drivers is unspecified, and the wrong order effectively breaks commit 94210dc95e9f ("OvmfPkg: QemuVideoDxe: add virtio-vga support"). Thus, never bind virtio-vga in Virtio10Dxe; QemuVideoDxe provides better compatibility for guest OSes that insist on inheriting a linear framebuffer. Users who prefer the VirtIo GPU interface at boot time should specify virtio-gpu-pci, which is exactly virtio-vga, minus the VGA compatibility (such as the framebuffer). Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org> Cc: Jordan Justen <jordan.l.justen@intel.com> Ref: https://tianocore.acgmultimedia.com/show_bug.cgi?id=66 Fixes: 9399f68ae359234b142c293ad1bef75f470ced30 Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
* OvmfPkg: Virtio10Dxe: non-transitional driver for virtio-1.0 PCI devicesLaszlo Ersek2016-04-063-0/+1157
This driver implements the VIRTIO_DEVICE_PROTOCOL for non-transitional PCI devices, based on the virtio-1.0 specification (csprd05). Non-transitional means that it only binds QEMU's virtio-xxx-pci devices that receive the ",disable-legacy=on,disable-modern=off" properties on the QEMU command line. These devices have distinct PCI Device IDs from those that are bound by VirtioPciDeviceDxe. The central abstraction of this driver is the VIRTIO_1_0_CONFIG type. It is practically a "fat pointer" to a register block. The pointed-to register block - may or may not exist (the latter being mostly useful for virtio-1.0 devices that have no device-specific registers), - lives in one of the device's BARs, - lives in an IO or MMIO BAR, - lives at an offset relative to the BAR start, - has its size also maintained. Such VIRTIO_1_0_CONFIG "fat pointers" (i.e., the locations of the register blocks) are parsed from vendor capabilities that reside in the device's standard PCI capabilities list (in PCI config space). Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org> Cc: Jordan Justen <jordan.l.justen@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Tested-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Acked-by: Jordan Justen <jordan.l.justen@intel.com>