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* OvmfPkg/RiscVVirt: Update README for CLANGDWARF supportSunil V L2023-07-311-3/+25
| | | | | | | | | | | | | | | | Update the README with instruction to build using CLANGDWARF toolchain. Cc: Ard Biesheuvel <ardb+tianocore@kernel.org> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Jordan Justen <jordan.l.justen@intel.com> Cc: Gerd Hoffmann <kraxel@redhat.com> Cc: Andrei Warkentin <andrei.warkentin@intel.com> Signed-off-by: Sunil V L <sunilvl@ventanamicro.com> Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com> Acked-by: Ard Biesheuvel <ardb@kernel.org> Tested-by: Ard Biesheuvel <ardb@kernel.org> # Debian clang version 14.0.6
* OvmfPkg/RiscVVirt: SecEntry: Remove unnecessary assembly directivesSunil V L2023-07-311-3/+0
| | | | | | | | | | | | | | | llvm fails to resolve _ModuleEntry when these extra directives are present. ASM_FUNC already takes care what is required. Cc: Ard Biesheuvel <ardb+tianocore@kernel.org> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Jordan Justen <jordan.l.justen@intel.com> Cc: Gerd Hoffmann <kraxel@redhat.com> Cc: Andrei Warkentin <andrei.warkentin@intel.com> Signed-off-by: Sunil V L <sunilvl@ventanamicro.com> Acked-by: Ard Biesheuvel <ardb@kernel.org> Tested-by: Ard Biesheuvel <ardb@kernel.org> # Debian clang version 14.0.6
* OvmfPkg/RiscVVirt: use 'auto' alignment and FIXED for XIP modulesSunil V L2023-07-311-24/+10
| | | | | | | | | | | | | | | | | | | | | Use auto alignment and FIXED FFS attribute for XIP modules similar to [1]. Without this change, the CLANGDWARF toolchain will fail to build with below error. GenFfs: ERROR 1000: Unknown option SectionAlign option must be specified with section file. [1] - https://github.com/tianocore/edk2/commit/7669f7349829f0e4755552ba0d6e600492fd8170 Cc: Ard Biesheuvel <ardb+tianocore@kernel.org> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Jordan Justen <jordan.l.justen@intel.com> Cc Gerd Hoffmann <kraxel@redhat.com> Cc: Andrei Warkentin <andrei.warkentin@intel.com> Signed-off-by: Sunil V L <sunilvl@ventanamicro.com> Acked-by: Ard Biesheuvel <ardb@kernel.org> Tested-by: Ard Biesheuvel <ardb@kernel.org> # Debian clang version 14.0.6
* OvmfPkg/BhyvePkg: enable bus enumerationCorvin Köhne2023-07-311-1/+0
| | | | | | | | | | | | | | | | bhyve supports adding a ROM to PCI devices. It was added to support GPU passthrough of dedicated AMD GPUs. At the moment, this ROM file is mostly useless as it's not shadowed and executed by firmware. Change that by enabling bus enumeration. Signed-off-by: Corvin Köhne <corvink@FreeBSD.org> Acked-by: Peter Grehan <grehan@freebsd.org> Reviewed-by: Rebecca Cran <rebecca@bsdio.com> Cc: Ard Biesheuvel <ardb+tianocore@kernel.org> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Jordan Justen <jordan.l.justen@intel.com> Cc: Gerd Hoffmann <kraxel@redhat.com> Cc: Rebecca Cran <rebecca@bsdio.com>
* Revert "OvmfPkg/Bhyve: remove IncompatiblePciDeviceSupport DXE driver"Corvin Köhne2023-07-312-0/+2
| | | | | | | | | | | | | | | | We like to enable bus enumeration for bhyve. Therefore, this patch needs to be reverted. This reverts commit 8c8f886f27556f2fb6e8b502d32aa9ccee930acc. Signed-off-by: Corvin Köhne <corvink@FreeBSD.org> Acked-by: Peter Grehan <grehan@freebsd.org> Reviewed-by: Rebecca Cran <rebecca@bsdio.com> Cc: Ard Biesheuvel <ardb+tianocore@kernel.org> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Jordan Justen <jordan.l.justen@intel.com> Cc: Gerd Hoffmann <kraxel@redhat.com> Cc: Rebecca Cran <rebecca@bsdio.com>
* Revert "OvmfPkg/Bhyve: consume PciHostBridgeLibScan"Corvin Köhne2023-07-311-1/+1
| | | | | | | | | | | | | | | | We like to enable bus enumartion for bhyve. Therefore, this patch needs to be reverted. This reverts commit c2f24ba3218ae91a8d5a1a31c31dad3417850d0c. Signed-off-by: Corvin Köhne <corvink@FreeBSD.org> Acked-by: Peter Grehan <grehan@freebsd.org> Reviewed-by: Rebecca Cran <rebecca@bsdio.com> Cc: Ard Biesheuvel <ardb+tianocore@kernel.org> Cc: Gerd Hoffmann <kraxel@redhat.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Jordan Justen <jordan.l.justen@intel.com> Cc: Rebecca Cran <rebecca@bsdio.com>
* OvmfPkg/RiscVVirt: Avoid printing hard coded timeout valueSunil V L2023-07-211-1/+1
| | | | | | | | | | | | | | Print the timeout value set in the PCD variable instead of hard coded 10 seconds. Cc: Ard Biesheuvel <ardb+tianocore@kernel.org> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Jordan Justen <jordan.l.justen@intel.com> Cc: Gerd Hoffmann <kraxel@redhat.com> Cc: Andrei Warkentin <andrei.warkentin@intel.com> Signed-off-by: Sunil V L <sunilvl@ventanamicro.com> Reviewed-by: Andrei Warkentin <andrei.warkentin@intel.com>
* OvmfPkg/RiscVVirt: Check "no-map" and mark EfiReservedMemoryTypeSunil V L2023-07-211-20/+17
| | | | | | | | | | | | | | | OpenSBI now marks PMP regions with "no-map" attribute. So, remove the workaround and add the ReservedMemory only when no-map is set so that it follows DT spec. Cc: Ard Biesheuvel <ardb+tianocore@kernel.org> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Jordan Justen <jordan.l.justen@intel.com> Cc: Gerd Hoffmann <kraxel@redhat.com> Cc: Andrei Warkentin <andrei.warkentin@intel.com> Signed-off-by: Sunil V L <sunilvl@ventanamicro.com> Reviewed-by: Ranbir Singh <rsingh@ventanamicro.com>
* OvmfPkg/IoMmuDxe: add locking to IoMmuAllocateBounceBufferGerd Hoffmann2023-07-191-0/+7
| | | | | | | | | | | | | | | | | | | Searching for an unused bounce buffer in mReservedMemBitmap and reserving the buffer by flipping the bit is a critical section which must not be interrupted. Raise the TPL level to ensure that. Without this fix it can happen that IoMmuDxe hands out the same bounce buffer twice, causing trouble down the road. Seen happening in practice with VirtioNetDxe setting up the network interface (and calling into IoMmuDxe from a polling timer callback) in parallel with Boot Manager doing some disk I/O. An ASSERT() in VirtioNet caught the buffer inconsistency. Full story with lots of details and discussions is available here: https://bugzilla.redhat.com/show_bug.cgi?id=2211060 Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
* OvmfPkg/PeilessStartupLib: Updated with PcdSecureBootSupportedCeping Sun2023-07-172-3/+4
| | | | | | | | | | | | | | | | | | | | SECURE_BOOT_FEATURE_ENABLED was dropped by the commit(92da8a154f), but the PeilessStartupLib was not updated with PcdSecureBootSupported, that made SecureBoot no longer work in IntelTdxX64. Fix this by replacing SECURE_BOOT_FEATURE_ENABLED with PcdSecureBootSupported in PeilessStartupLib. Cc: Erdem Aktas <erdemaktas@google.com> Cc: James Bottomley <jejb@linux.ibm.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Gerd Hoffmann <kraxel@redhat.com> Cc: Min Xu <min.m.xu@intel.com> Cc: Tom Lendacky <thomas.lendacky@amd.com> Cc: Michael Roth <michael.roth@amd.com> Signed-off-by: Ceping Sun <cepingx.sun@intel.com> Acked-by: Gerd Hoffmann <kraxel@redhat.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
* UefiCpuPkg: RISC-V: Support MMU with SV39/48/57 modeTuan Phan2023-07-151-0/+1
| | | | | | | | | During CpuDxe initialization, MMU will be setup with the highest mode that HW supports. Signed-off-by: Tuan Phan <tphan@ventanamicro.com> Reviewed-by: Andrei Warkentin <andrei.warkentin@intel.com> Reviewed-by: Sunil V L <sunilvl@ventanamicro.com>
* OvmfPkg: RiscVVirt: Remove satp bare mode settingTuan Phan2023-07-151-16/+2
| | | | | | | | | There is no point to set satp to bare mode as that should be the default mode when booting edk2. Signed-off-by: Tuan Phan <tphan@ventanamicro.com> Reviewed-by: Andrei Warkentin <andrei.warkentin@intel.com> Reviewed-by: Sunil V L <sunilvl@ventanamicro.com>
* OvmfPkg/RiscVVirt: Add VirtNorFlashDxe to APRIORI listTuan Phan2023-07-151-0/+10
| | | | | | | | Make sure VirtNorFlashDxe loaded before VariableRuntimeDxe as it is the backend flash driver. Signed-off-by: Tuan Phan <tphan@ventanamicro.com> Reviewed-by: Sunil V L <sunilvl@ventanamicro.com>
* OvmfPkg/RiscVVirt: SEC: Add IO memory resource hob for platform devicesTuan Phan2023-07-151-0/+62
| | | | | | | | | | | | | Normally, DXE driver would add device resource to GCD before start using. But some key resources such as uart used for printing info at very early stage. Those resources should be populated to HOB in SEC phase so they are added to GCD before MMU enabled. Signed-off-by: Tuan Phan <tphan@ventanamicro.com> Reviewed-by: Andrei Warkentin <andrei.warkentin@intel.com> Reviewed-by: Sunil V L <sunilvl@ventanamicro.com>
* OvmfPkg/RiscVVirt: VirtNorFlashPlatformLib: Fix wrong flash sizeTuan Phan2023-07-151-1/+2
| | | | | | | | The size should be for single region, not the whole firmware FD. Signed-off-by: Tuan Phan <tphan@ventanamicro.com> Reviewed-by: Andrei Warkentin <andrei.warkentin@intel.com> Reviewed-by: Sunil V L <sunilvl@ventanamicro.com>
* OvmfPkg/ResetVector: Fix assembler bit test flag checkTom Lendacky2023-07-141-1/+1
| | | | | | | | | | | | | Commit 63c50d3ff2854a76432b752af4f2a76f33ff1974 changed the check that is used to determine if SEV-ES is active. Originally, a CMP instruction with a supporting JZ instruction was used for the check. It was changed to use the BT instruction but not JZ instruction. The result of a BT instruction changes the the carry flag (CF) and not the zero flag (ZF). As a result, the wrong condition is being checked. Update the JZ to a JNC to properly detect if SEV-ES is active. Fixes: 63c50d3ff285 ("OvmfPkg/ResetVector: cache the SEV status MSR...") Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com>
* OvmfPkg/PlatformCI: Skip GCC5_OVMF_IA32X64_FULL_NOOPT buildYi Li2023-07-051-7/+10
| | | | | | | | | | | | | | The effect of LTO is limited with optimization turned off, and blocked the upgrade of Openssl3.0. We already skipped this build with VS2019, skip the GCC NOOPT build also. Signed-off-by: Yi Li <yi1.li@intel.com> Cc: Ard Biesheuvel <ardb+tianocore@kernel.org> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Jordan Justen <jordan.l.justen@intel.com> Cc: Gerd Hoffmann <kraxel@redhat.com> Acked-by: Gerd Hoffmann <kraxel@redhat.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
* OvmfPkg: Uses MmSaveStateLib libraryAbdul Lateef Attar2023-07-034-767/+5
| | | | | | | | | | | | | | | | | | BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4182 Uses new MmSaveStateLib library instance. Cc: Paul Grimes <paul.grimes@amd.com> Cc: Abner Chang <abner.chang@amd.com> Cc: Eric Dong <eric.dong@intel.com> Cc: Ray Ni <ray.ni@intel.com> Cc: Rahul Kumar <rahul1.kumar@intel.com> Cc: Gerd Hoffmann <kraxel@redhat.com> Cc: Ard Biesheuvel <ardb+tianocore@kernel.org> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Jordan Justen <jordan.l.justen@intel.com> Signed-off-by: Abdul Lateef Attar <abdattar@amd.com> Acked-by: Jiewen Yao <Jiewen.yao@intel.com>
* OvmfPkg:Remove code that apply AddressEncMask to non-leaf entryDun Tan2023-06-301-4/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Remove code that sets AddressEncMask for non-leaf entries when modifing smm page table by MemEncryptSevLib. In FvbServicesSmm driver, it calls MemEncryptSevClearMmioPageEncMask to clear AddressEncMask bit in page table for a specific range. In AMD SEV feature, this AddressEncMask bit in page table is used to indicate if the memory is guest private memory or shared memory. But all memory accessed by the hardware page table walker is treated as encrypted, regardless of whether the encryption bit is present. So remove the code to set the EncMask bit for smm non-leaf entries doesn't impact AMD SEV feature. The reason encryption mask should not be set for non-leaf entries is because CpuPageTableLib doesn't consume encryption mask PCD. In PiSmmCpuDxeSmm module, it will use CpuPageTableLib to modify smm page table in next patch. The encryption mask is overlapped with the PageTableBaseAddress field of non-leaf page table entries. If the encryption mask is set for smm non-leaf page table entries, issue happens when CpuPageTableLib code use the non-leaf entry PageTableBaseAddress field with the encryption mask set to find the next level page table. Signed-off-by: Dun Tan <dun.tan@intel.com> Cc: Ard Biesheuvel <ardb+tianocore@kernel.org> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Jordan Justen <jordan.l.justen@intel.com> Cc: Gerd Hoffmann <kraxel@redhat.com> Reviewed-by: Tom Lendacky <thomas.lendacky@amd.com> Reviewed-by: Ray Ni <ray.ni@intel.com>
* OvmfPkg/VirtioSerialDxe: Remove noisy debug print on supported() callArd Biesheuvel2023-06-271-2/+0
| | | | | | | | | | | | The UEFI driver model invokes the supported() method on every driver every time a connection attempt is made on any handle, and so doing an unconditional DEBUG() print inside this method produced a lot of noise. So let's drop this DEBUG() call from the VirtioSerial driver's Supported() method. Signed-off-by: Ard Biesheuvel <ardb@kernel.org> Acked-by: Gerd Hoffmann <kraxel@redhat.com>
* OvmfPkg/PciHotPlugInitDxe: fix io window sizeGerd Hoffmann2023-06-261-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Smallest IO window size for PCI bridges is 0x1000. Fix default size accordingly. Avoids broken resource assignments like this: [ ... ] PciBus: Resource Map for Root Bridge PciRoot(0x0) Type = Io16; Base = 0x6000; Length = 0x7000; Alignment = 0xFFF [ ... ] Base = 0xC000; Length = 0x200; Alignment = 0xFFF; Owner = PPB [00|02|00:**] Base = 0xC200; Length = 0x40; Alignment = 0x3F; Owner = PCI [00|1F|03:20] Base = 0xC240; Length = 0x20; Alignment = 0x1F; Owner = PCI [00|1F|02:20] [ ... ] ... which the linux kernel fixes up later: [ 0.644657] pci 0000:00:1f.3: BAR 4: assigned [io 0x1000-0x103f] [ 0.646833] pci 0000:00:1f.2: BAR 4: assigned [io 0x1040-0x105f] With the patch applied: { ... ] PciBus: Resource Map for Root Bridge PciRoot(0x0) Type = Io16; Base = 0x6000; Length = 0x8000; Alignment = 0xFFF [ ... ] Base = 0xC000; Length = 0x1000; Alignment = 0xFFF; Owner = PPB [00|02|00:**] Base = 0xD000; Length = 0x40; Alignment = 0x3F; Owner = PCI [00|1F|03:20] Base = 0xD040; Length = 0x20; Alignment = 0x1F; Owner = PCI [00|1F|02:20] [ ... ] Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
* OvmfPkg/Bhyve: include TPM driverCorvin Köhne2023-06-232-2/+22
| | | | | | | | | | Bhyve will gain support for TPM emulation in the near future. Therefore, prepare OVMF by copying all TPM driver used by qemu's OVMF DSC into the bhyve OVMF DSC. Signed-off-by: Corvin Köhne <corvink@FreeBSD.org> Reviewed-by: Rebecca Cran <rebecca@bsdio.com> Acked-by: Gerd Hoffmann <kraxel@redhat.com>
* OvmfPkg/Bhyve: install Acpi tables provided by FwCfgCorvin Köhne2023-06-231-0/+5
| | | | | Signed-off-by: Corvin Köhne <corvink@FreeBSD.org> Acked-by: Peter Grehan <grehan@freebsd.org>
* OvmfPkg: move QemuFwCfgAcpi into AcpiPlatformLibCorvin Köhne2023-06-236-11/+14
| | | | | | | This makes the InstallQemuFwcfgTables function reusable by bhyve. Signed-off-by: Corvin Köhne <corvink@FreeBSD.org> Acked-by: Peter Grehan <grehan@freebsd.org>
* OvmfPkg: move BootScript into AcpiPlatformLibCorvin Köhne2023-06-235-31/+30
| | | | | | | This is required to move InstallQemuFwCfgTables into AcpiPlatformLib. Signed-off-by: Corvin Köhne <corvink@FreeBSD.org> Acked-by: Peter Grehan <grehan@freebsd.org>
* OvmfPkg: move PciEncoding into AcpiPlatformLibCorvin Köhne2023-06-2317-274/+36
| | | | | | | | | Bhyve supports providing ACPI tables by FwCfg. Therefore, InstallQemuFwCfgTables should be moved to AcpiPlatformLib to reuse the code. As first step, move PciEncoding into AcpiPlatformLib. Signed-off-by: Corvin Köhne <corvink@FreeBSD.org> Acked-by: Peter Grehan <grehan@freebsd.org>
* OvmfPkg: avoid including AcpiPlatformLib twiceCorvin Köhne2023-06-231-0/+5
| | | | | Signed-off-by: Corvin Köhne <corvink@FreeBSD.org> Acked-by: Peter Grehan <grehan@freebsd.org>
* OvmfPkg/Library: fix definition of GetAcpiRsdpFromMemoryCorvin Köhne2023-06-231-2/+2
| | | | | | | | | | | | The definition and declaration of GetAcpiRsdpFromMemory doesn't match. We don't get a compile error yet because UINTN is the same as UINT64 on 64bit machines. As the function works on memory addresses, UINTN is the correct type of the input parameters. Signed-off-by: Corvin Köhne <corvink@FreeBSD.org> Tested-by: Gerd Hoffmann <kraxel@redhat.com> Acked-by: Gerd Hoffmann <kraxel@redhat.com> Acked-by: Peter Grehan <grehan@freebsd.org>
* OvmfPkg/RiscVVirt: Add a readme for build and testSunil V L2023-06-231-0/+49
| | | | | | | | | | | | | Add a readme file which provides information regarding how to build and test EDK2 on RISC-V qemu virt platform. Signed-off-by: Sunil V L <sunilvl@ventanamicro.com> Cc: Ard Biesheuvel <ardb+tianocore@kernel.org> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Jordan Justen <jordan.l.justen@intel.com> Cc: Gerd Hoffmann <kraxel@redhat.com> Cc: Andrei Warkentin <andrei.warkentin@intel.com> Cc: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
* OvmfPkg/RiscVVirt: Add support for separate code and variable storeSunil V L2023-06-233-13/+19
| | | | | | | | | | | | | | | | | | | Currently, RiscVVirtQemu supports unified code and variable store mainly because only one pflash devices was available in qemu for EDK2. However, this doesn't allow to map the code part as read-only. With recent qemu enhancements, it is now possible for EDK2 to make use of both pflash devices in RISC-V virt machine. So, add support to create code and vars images separately. This also allows easy firmware code updates without losing the variable store. Signed-off-by: Sunil V L <sunilvl@ventanamicro.com> Cc: Ard Biesheuvel <ardb+tianocore@kernel.org> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Jordan Justen <jordan.l.justen@intel.com> Cc: Gerd Hoffmann <kraxel@redhat.com> Cc: Andrei Warkentin <andrei.warkentin@intel.com> Cc: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
* OvmfPkg/RiscVVirt: Add VirtNorFlashDeviceTreeLib librarySunil V L2023-06-232-0/+177
| | | | | | | | | | | | | This library is required to support separate code and variable store images. Signed-off-by: Sunil V L <sunilvl@ventanamicro.com> Cc: Ard Biesheuvel <ardb+tianocore@kernel.org> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Jordan Justen <jordan.l.justen@intel.com> Cc: Gerd Hoffmann <kraxel@redhat.com> Cc: Andrei Warkentin <andrei.warkentin@intel.com> Cc: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
* OvmfPkg/RiscVVirt: Fix couple of issues in VarStoreSunil V L2023-06-231-6/+6
| | | | | | | | | | | | | | The size of the FV and the WriteQueueSize is incorrect which causes the flash to be re-written during boot. Fix them and update the new checksum value. Signed-off-by: Sunil V L <sunilvl@ventanamicro.com> Cc: Ard Biesheuvel <ardb+tianocore@kernel.org> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Jordan Justen <jordan.l.justen@intel.com> Cc: Gerd Hoffmann <kraxel@redhat.com> Cc: Andrei Warkentin <andrei.warkentin@intel.com> Cc: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
* OvmfPkg/Bhyve: install ACPI tables from memoryCorvin Köhne2023-06-063-1/+38
| | | | | | | | | | | | | | | | | | | It's much easier to create configuration dependent ACPI tables for bhyve than for OVMF. For this reason, don't use the statically created ACPI tables provided by OVMF. Instead, prefer the dynamically created ACPI tables of bhyve. If bhyve provides no ACPI tables or we are unable to detect those, fall back to OVMF tables. Ideally, we use the qemu fwcfg interface to pass the ACPI tables from bhyve to OVMF. bhyve will support this in the future. However, current bhyve executables don't support passing ACPI tables by the qemu fwcfg interface. They just copy the ACPI into main memory. For that reason, pick up the ACPI tables from main memory. Signed-off-by: Corvin Köhne <corvink@FreeBSD.org> Reviewed-by: Rebecca Cran <rebecca@bsdio.com> Acked-by: Peter Grehan <grehan@freebsd.org> Acked-by: Gerd Hoffmann <kraxel@redhat.com>
* OvmfPkg/Xen: export AcpiTable installation into AcpiPlatformLibCorvin Köhne2023-06-065-261/+254
| | | | | | | | This makes the function reuseable by bhyve. Signed-off-by: Corvin Köhne <corvink@FreeBSD.org> Reviewed-by: Anthony PERARD <anthony.perard@citrix.com> Acked-by: Gerd Hoffmann <kraxel@redhat.com>
* OvmfPkg/Xen: export search of RSDP into a library functionCorvin Köhne2023-06-067-90/+152
| | | | | | | | | | Xen and bhyve are placing ACPI tables into system memory. So, they can share the same code. Therefore, create a new library which searches and installs ACPI tables from system memory. Signed-off-by: Corvin Köhne <corvink@FreeBSD.org> Reviewed-by: Anthony PERARD <anthony.perard@citrix.com> Acked-by: Gerd Hoffmann <kraxel@redhat.com>
* OvmfPkg: Create additional PML1 entries for large SEV-SNP VMsMikolaj Lisik via groups.io2023-06-021-9/+18
| | | | | | | | | | | | | | Edk2 was failing, rather than creating more PML4 entries, when they weren't present in the initial memory acceptance flow. Because of that VMs with more than 512G memory were crashing. This code fixes that. This change affects only SEV-SNP VMs. The code was tested by successfully booting a 512G SEV-SNP VM. Signed-off-by: Mikolaj Lisik <lisik@google.com> Acked-by: Gerd Hoffmann <kraxel@redhat.com> Acked-by: Tom Lendacky <thomas.lendacky@amd.com>
* OvmfPkg/RiscVVirt: Remove unimplemented NxForStack configurationArd Biesheuvel2023-06-021-6/+0
| | | | | | | | | The RISC-V version of the DXE IPL does not implement setting the stack NX, so before switching to an implementation that will ASSERT() on the missing support, drop the PCD setting that enables it. Signed-off-by: Ard Biesheuvel <ardb@kernel.org> Reviewed-by: Sunil V L <sunilvl@ventanamicro.com>
* OvmfPkg: Remove SataControllerDxePedro Falcato2023-06-014-1869/+0
| | | | | | | | | | | | Now that OvmfPkg/SataControllerDxe and its MdeModulePkg counterpart have been unified, and no in-tree uses of the OVMF variant remain, let's delete it. Tested-by: Gerd Hoffmann <kraxel@redhat.com> Acked-by: Gerd Hoffmann <kraxel@redhat.com> Signed-off-by: Pedro Falcato <pedro.falcato@gmail.com> Acked-by: Ard Biesheuvel <ardb@kernel.org> Reviewed-by: Laszlo Ersek <lersek@redhat.com>
* OvmfPkg/Xen: Replace the OVMF-specific SataControllerDxePedro Falcato2023-06-012-2/+2
| | | | | | | | | | Replace the OVMF-specific SataControllerDxe (to be later removed) with the generic, MdeModulePkg one, for the OvmfXen platform. Signed-off-by: Pedro Falcato <pedro.falcato@gmail.com> Acked-by: Gerd Hoffmann <kraxel@redhat.com> Acked-by: Ard Biesheuvel <ardb@kernel.org> Acked-by: Anthony PERARD <anthony.perard@citrix.com>
* OvmfPkg/AmdSev: Replace the OVMF-specific SataControllerDxePedro Falcato2023-06-012-2/+2
| | | | | | | | | Replace the OVMF-specific SataControllerDxe (to be later removed) with the generic, MdeModulePkg one, for the AmdSev platform. Signed-off-by: Pedro Falcato <pedro.falcato@gmail.com> Acked-by: Ard Biesheuvel <ardb@kernel.org> Acked-by: Gerd Hoffmann <kraxel@redhat.com>
* OvmfPkg/IntelTdx: Replace the OVMF-specific SataControllerDxePedro Falcato2023-06-012-2/+2
| | | | | | | | | Replace the OVMF-specific SataControllerDxe (to be later removed) with the generic, MdeModulePkg one, for the IntelTdx platform. Signed-off-by: Pedro Falcato <pedro.falcato@gmail.com> Acked-by: Gerd Hoffmann <kraxel@redhat.com> Acked-by: Ard Biesheuvel <ardb@kernel.org>
* OvmfPkg/CloudHv: Replace the OVMF-specific SataControllerDxePedro Falcato2023-06-012-2/+2
| | | | | | | | | Replace the OVMF-specific SataControllerDxe (to be later removed) with the generic, MdeModulePkg one, for the CloudHv platform. Signed-off-by: Pedro Falcato <pedro.falcato@gmail.com> Acked-by: Ard Biesheuvel <ardb@kernel.org> Acked-by: Gerd Hoffmann <kraxel@redhat.com>
* OvmfPkg/Bhyve: Replace the OVMF-specific SataControllerDxePedro Falcato2023-06-012-2/+2
| | | | | | | | | | | | Replace the OVMF-specific SataControllerDxe (to be later removed) with the generic, MdeModulePkg one, for the Bhyve platform. Signed-off-by: Pedro Falcato <pedro.falcato@gmail.com> Acked-by: Gerd Hoffmann <kraxel@redhat.com> Acked-by: Ard Biesheuvel <ardb@kernel.org> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Acked-by: Peter Grehan <grehan@freebsd.org> Acked-by: Corvin Köhne <corvink@FreeBSD.org>
* OvmfPkg/Microvm: Replace the OVMF-specific SataControllerDxePedro Falcato2023-06-012-2/+2
| | | | | | | | | | Replace the OVMF-specific SataControllerDxe (to be later removed) with the generic, MdeModulePkg one, for the Microvm platform. Signed-off-by: Pedro Falcato <pedro.falcato@gmail.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Acked-by: Ard Biesheuvel <ardb@kernel.org> Acked-by: Gerd Hoffmann <kraxel@redhat.com>
* OvmfPkg: Replace the OVMF-specific SataControllerDxePedro Falcato2023-06-016-6/+6
| | | | | | | | | | Replace the OVMF-specific SataControllerDxe (to be later removed) with the generic, MdeModulePkg one, for OvmfPkg{Ia32, X64, Ia32X64} platforms. Tested-by: Gerd Hoffmann <kraxel@redhat.com> Acked-by: Gerd Hoffmann <kraxel@redhat.com> Signed-off-by: Pedro Falcato <pedro.falcato@gmail.com> Acked-by: Ard Biesheuvel <ardb@kernel.org>
* OvmfPkg/PlatformInitLib: limit phys-bits to 46.Gerd Hoffmann2023-06-011-3/+6
| | | | | | | | | | Older linux kernels have problems with phys-bits larger than 46, ubuntu 18.04 (kernel 4.15) has been reported to be affected. Reduce phys-bits limit from 47 to 46. Reported-by: Fiona Ebner <f.ebner@proxmox.com> Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
* OvmfPkg/QemuFlashFvbServicesRuntimeDxe: refine flash detectionGerd Hoffmann2023-06-011-3/+11
| | | | | | | | | | | | | | | Flash can be write-protected in qemu (which is usually the case for code). In case the variable store flash block is configured read-only ovmf wouldn't be able to store EFI variables there, so not setting up fvb in that case (and fallhack to emulation) is the better option. It'll avoid problems later due to flash writes failing. The patch tries to write back the original value read earlier, so flash content doesn't change in case the write succeeds. But the status we read back after the attempt to write will tell us whenever flash is writable or not. Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
* OvmfPkg/VirtioSerialDxe: use TPL_NOTIFYGerd Hoffmann2023-06-011-2/+2
| | | | | | | Apparently TPL_CALLBACK is too low, code runs into an ASSERT complaining the new TPL is lower than the old TPL. Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
* OvmfPkg: Add CpuPageTableLib required by SecCore & CpuMpPeiJiaxin Wu2023-05-318-9/+8
| | | | | | | | | | | | | Add CpuPageTableLib required by SecCore & CpuMpPei in OvmfPkg. Cc: Ard Biesheuvel <ardb+tianocore@kernel.org> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Jordan Justen <jordan.l.justen@intel.com> Cc: Gerd Hoffmann <kraxel@redhat.com> Cc: Ray Ni <ray.ni@intel.com> Cc: Zeng Star <star.zeng@intel.com> Signed-off-by: Jiaxin Wu <jiaxin.wu@intel.com> Reviewed-by: Ray Ni <ray.ni@intel.com>
* OvmfPkg/MicrovmX64: enable 1G pagesGerd Hoffmann2023-05-291-0/+3
| | | | | | | Reduces the memory footprint and speeds up booting. Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Acked-by: Ard Biesheuvel <ardb@kernel.org>