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* PcAtChipsetPkg/PcatChipsetPkg.dsc: Add a driver to buildBret Barkelew2019-03-261-0/+1
| | | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1646 Add the IdeControllerDxe driver to the [Components] section to make sure it would build correctly. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Zhichao Gao <zhichao.gao@intel.com> Cc: Ray Ni <ray.ni@intel.com> Cc: Liming Gao <liming.gao@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
* PcAtChipsetPkg PcRtc: Use new EfiLocateFirstAcpiTable()Star Zeng2018-09-271-77/+3
| | | | | | | | | | | | | | | | | | | | | https://bugzilla.tianocore.org/show_bug.cgi?id=967 Request to add a library function for GetAcpiTable() in order to get ACPI table using signature as input. After evaluation, we found there are many duplicated code to find ACPI table by signature in different modules. This patch updates PcatRealTimeClockRuntimeDxe to use new EfiLocateFirstAcpiTable() and remove the duplicated code. Cc: Younas khan <pmdyounaskhan786@gmail.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <liming.gao@intel.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Ruiyu Ni <ruiyu.ni@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Star Zeng <star.zeng@intel.com> Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
* PcAtChipsetPkg: Removing ipf which is no longer supported from edk2.Chen A Chen2018-09-133-5/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Removing rules for Ipf sources file: * Remove the source file which path with "ipf" and also listed in [Sources.IPF] section of INF file. * Remove the source file which listed in [Components.IPF] section of DSC file and not listed in any other [Components] section. * Remove the embedded Ipf code for MDE_CPU_IPF. Removing rules for Inf file: * Remove IPF from VALID_ARCHITECTURES comments. * Remove DXE_SAL_DRIVER from LIBRARY_CLASS in [Defines] section. * Remove the INF which only listed in [Components.IPF] section in DSC. * Remove statements from [BuildOptions] that provide IPF specific flags. * Remove any IPF sepcific sections. Removing rules for Dec file: * Remove [Includes.IPF] section from Dec. Removing rules for Dsc file: * Remove IPF from SUPPORTED_ARCHITECTURES in [Defines] section of DSC. * Remove any IPF specific sections. * Remove statements from [BuildOptions] that provide IPF specific flags. Cc: Ruiyu Ni <ruiyu.ni@intel.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Chen A Chen <chen.a.chen@intel.com> Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
* PcAtChipsetPkg: Clean up source filesLiming Gao2018-06-2848-578/+578
| | | | | | | | | | 1. Do not use tab characters 2. No trailing white space in one line 3. All files must end with CRLF Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
* PcAtChipsetPkg/PcRtc: Add two new PCD for RTC Index/Target registersRuiyu Ni2018-05-285-12/+25
| | | | | | | | | | | | | | | | | In certain HW implementation, the BIT7 of RTC Index register(0x70) is for NMI sources enable/disable but the BIT7 of 0x70 cannot be read before writing. Software which doesn't want to change the NMI sources enable/disable setting can write to the alias register 0x74, through which only BIT0 ~ BIT6 of 0x70 is modified. So two new PCDs are added so that platform can have the flexibility to change the default RTC register addresses from 0x70/0x71 to 0x74/0x75. With the new PCDs added, it can also support special HW that provides RTC storage in a different register pairs. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com>
* PcAtChipsetPkg PeiAcpiTimerLib: Add the missing DebugLib header fileLiming Gao2018-02-071-0/+1
| | | | | Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Liming Gao <liming.gao@intel.com>
* PcAtChipsetPkg: Add PeiAcpiTimerLib to save Frequency in HOBLiming Gao2018-02-067-8/+212
| | | | | | | | | | | | | | | In V2: 1) Update PeiAcpiTimerLib base name to PeiAcpiTimerLib 2) Update PeiAcpiTimerLib to add the missing constructor to enable ACPI IO space 3) Update DxeAcpiTimerLib to cache frequency in constructor. PeiAcpiTimerLib caches PerformanceCounterFrequency in HOB, then Pei and Dxe AcpiTimerLib can share the same PerformanceCounterFrequency. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Liming Gao <liming.gao@intel.com> Cc: Star Zeng <star.zeng@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com>
* PcAtChipsetPkg: Add description for new added PCD in commit e78aab9d2Dandan Bi2017-11-291-0/+9
| | | | | | | | Cc: Leo Duran <leo.duran@amd.com> Cc: Ruiyu Ni <ruiyu.ni@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Dandan Bi <dandan.bi@intel.com> Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
* PcAtChipsetPkg/PcatRealTimeClockRuntimeDxe: Replace RTC macrosLeo Duran2017-11-233-12/+16
| | | | | | | | | | | | | | Use FixedPCD's to set platform-specific values for RTC registers. Specifically, the replaced macros are: 1) RTC_INIT_REGISTER_A 2) RTC_INIT_REGISTER_B 3) RTC_INIT_REGISTER_D Cc: Ruiyu Ni <ruiyu.ni@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Leo Duran <leo.duran@amd.com> Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
* PcAtChipsetPkg: Define FixePCD's for RTC register valuesLeo Duran2017-11-231-0/+13
| | | | | | | | | | Define FixedPCD's to replace macros in RTC driver, to allow for platform-specific configurations. Cc: Ruiyu Ni <ruiyu.ni@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Leo Duran <leo.duran@amd.com> Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
* PcAtChipsetPkg/IsaAcpiDxe: Fix VS2012 build failureDandan Bi2017-11-231-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | Done: if (EFI_ERROR (Status)) { if (PciIo != NULL && Enabled) { PciIo->Attributes ( PciIo, EfiPciIoAttributeOperationSet, OriginalAttributes, NULL ); } } In above codes, VS2012/VS2010 will report that "OriginalAttributes" will be used without initialization. But in fact, when the if expression is true(if (PciIo != NULL && Enabled)), the "OriginalAttributes" must be initialized. In order to fix this false positive issue, we initialize the "OriginalAttributes" after declaration. Cc: Ruiyu Ni <ruiyu.ni@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Dandan Bi <dandan.bi@intel.com> Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
* PcAtChipsetPkg/IsaAcpiDxe: Restore PCI attributes correctlyRuiyu Ni2017-11-082-24/+27
| | | | | | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=405 The original code enables some BITs in PCI attributes in Start(), but wrongly to disable these BITs in Stop(). The correct behavior is to save the original PCI attributes before enables some BITs in Start(), and restore to original value in Stop(). Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com>
* PcAtChipsetPkg: Update GUID usage in PcRtc INF to match the source codeLiming Gao2017-10-101-2/+7
| | | | | | | Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Liming Gao <liming.gao@intel.com> Cc: Ruiyu Ni <ruiyu.ni@intel.com> Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
* edk2: Move License.txt file to rootMichael D Kinney2017-08-031-25/+0
| | | | | | | | | | | | | | | | | | | https://bugzilla.tianocore.org/show_bug.cgi?id=642 Add top level License.txt file with the BSD 2-Clause License that is used by the majority of the EKD II open source project content. Merge copyright statements from the BSD 2-Clause License files in each package directory and remove the duplication License.txt file from package directories. Cc: Leif Lindholm <leif.lindholm@linaro.org> Cc: Andrew Fish <afish@apple.com> Cc: Jordan Justen <jordan.l.justen@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com> Reviewed-by: Jordan Justen <jordan.l.justen@intel.com> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
* edk2: Move TianoCore Contribution Agreement to rootMichael D Kinney2017-08-031-218/+0
| | | | | | | | | | | | | | | | | https://bugzilla.tianocore.org/show_bug.cgi?id=629 Move Contributions.txt that contains the TianoCore Contribution Agreement 1.0 to the root of the edk2 repository and remove the duplicate Contributions.txt files from all packages. Cc: Leif Lindholm <leif.lindholm@linaro.org> Cc: Andrew Fish <afish@apple.com> Cc: Jordan Justen <jordan.l.justen@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com> Reviewed-by: Jordan Justen <jordan.l.justen@intel.com> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
* PcAtChipsetPkg/SerialIoLib: Remove negative value shiftMichael Kinney2017-05-191-2/+2
| | | | | | | | | | | | | | | | | | | | | | | https://bugzilla.tianocore.org/show_bug.cgi?id=553 Remove left shift of negative values that always evaluate to 0 to address build errors from the llvm/clang compiler used in the XCODE5 tool chain. Clang rightfully complains about left-shifting ~DLAB. DLAB is #defined as 0x01 (an "int"), hence ~DLAB has value (-2) on all edk2 platforms. Left-shifting a negative int is undefined behavior. Rather than replacing ~DLAB with ~(UINT32)DLAB, realize that the nonzero bits of (~(UINT32)DLAB << 7) would all be truncated away in the final conversion to UINT8 anyway. So just remove (~DLAB << 7). Cc: Ruiyu Ni <ruiyu.ni@intel.com> Cc: Andrew Fish <afish@apple.com> Cc: Laszlo Ersek <lersek@redhat.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com>
* PcAtChipsetPkg: Refine casting expression result to bigger sizeHao Wu2017-03-061-9/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There are cases that the operands of an expression are all with rank less than UINT64/INT64 and the result of the expression is explicitly cast to UINT64/INT64 to fit the target size. An example will be: UINT32 a,b; // a and b can be any unsigned int type with rank less than UINT64, like // UINT8, UINT16, etc. UINT64 c; c = (UINT64) (a + b); Some static code checkers may warn that the expression result might overflow within the rank of "int" (integer promotions) and the result is then cast to a bigger size. The commit refines codes by the following rules: 1). When the expression is possible to overflow the range of unsigned int/ int: c = (UINT64)a + b; 2). When the expression will not overflow within the rank of "int", remove the explicit type casts: c = a + b; 3). When the expression will be cast to pointer of possible greater size: UINT32 a,b; VOID *c; c = (VOID *)(UINTN)(a + b); --> c = (VOID *)((UINTN)a + b); 4). When one side of a comparison expression contains only operands with rank less than UINT32: UINT8 a; UINT16 b; UINTN c; if ((UINTN)(a + b) > c) {...} --> if (((UINT32)a + b) > c) {...} For rule 4), if we remove the 'UINTN' type cast like: if (a + b > c) {...} The VS compiler will complain with warning C4018 (signed/unsigned mismatch, level 3 warning) due to promoting 'a + b' to type 'int'. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Hao Wu <hao.a.wu@intel.com> Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
* PcAtChipsetPkg: Fix typing errorsThomas Huth2017-01-2010-28/+28
| | | | | | | | | Correct the reported by the codespell utility in some files of PcAtChipsetPkg. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Star Zeng <star.zeng@intel.com>
* PcAtChipsetPkg/PcRtc: Fix bad EOLRuiyu Ni2016-12-061-1/+1
| | | | | Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
* PcAtChipsetPkg/PcRtc: Handle NULL table entry in RSDT/XSDTRuiyu Ni2016-11-181-0/+5
| | | | | | | | | | | The ACPI code may reserve the first entry for a certain table (might be FACS) to help with OS compatible issues. We need to skip the NULL table entry in RSDT/XSDT. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com> Cc: Sean Brogan <sean.brogan@microsoft.com> Reviewed-by: Star Zeng <star.zeng@intel.com>
* PcAtChipsetPkg/HpetTimerDxe: Fix race condition in SetTimerPeriod()Michael Kinney2016-10-271-2/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | https://bugzilla.tianocore.org/show_bug.cgi?id=182 The function TimerDriverSetTimerPeriod() disables the HPET timer while the HPET timer HW is reprogrammed with a new timer period. However, the MMIO write to disable the HPET timer HW can be delayed and an HPET timer interrupt may be processed in the middle of reprogramming the HPET timer HW and this may produced unexpected results. The fix is to raise TPL to TPL_HIGH_LEVEL in TimerDriverSetTimerPeriod() during the time the HPET timer HW is reprogrammed. This guarantees that no timer interrupts are processed during reprogramming. The TimerDriverGenerateSoftInterrupt() function in this same driver also raises TPL to TPL_HIGH_LEVEL, so this fix matches the logic that is already used in another function for the same reason. Cc: Ruiyu Ni <ruiyu.ni@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Michael Kinney <michael.d.kinney@intel.com> Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
* PcAtChipsetPkg AcpiTimerLib: Clear bits [31:24] after reading by IoRead32()Star Zeng2016-10-113-9/+15
| | | | | | | | | | | | | | | Clear bits [31:24] after reading ACPI timer count by IoRead32(), and also add comments "Note: The implementation uses the lower 24-bits of the ACPI timer and is compatible with both 24-bit and 32-bit ACPI timers." in INF. Cc: Michael Kinney <michael.d.kinney@intel.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Liming Gao <liming.gao@intel.com> Cc: Laszlo Ersek <lersek@redhat.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Star Zeng <star.zeng@intel.com> Reviewed-by: Michael Kinney <michael.d.kinney@intel.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com>
* PcAtChipsetPkg: Remove KbcResetDxeRuiyu Ni2016-09-025-209/+0
| | | | | | | Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com> Reviewed-by: Feng Tian <feng.tian@intel.com> Cc: Amy Chan <amy.chan@intel.com>
* PcAtChipsetPkg/ResetSystemLib: Implement ResetPlatformSpecificRuiyu Ni2016-09-021-0/+21
| | | | | | | Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com> Reviewed-by: Feng Tian <feng.tian@intel.com> Cc: Amy Chan <amy.chan@intel.com>
* PcAtChipsetPkg AcpiTimerLib: Wait 363 ACPI timer counts to get TSC FreqStar Zeng2016-08-183-27/+33
| | | | | | | | | | | | | | | | | | Compute the number of ticks to wait to measure TSC frequency. Instead of (ACPI_TIMER_FREQUENCY / 10000) = 357 and 357 * 10000 = 3570000, use 363 * 9861 = 3579543 Hz which is within 2 Hz of ACPI_TIMER_FREQUENCY. 363 counts is a calibration time of 101.4 uS. The idea comes from Michael and Paolo. Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <liming.gao@intel.com> Cc: Paolo Bonzini <pbonzini@redhat.com> Cc: Paul A Lohr <paul.a.lohr@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Star Zeng <star.zeng@intel.com> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
* PcAtChipsetPkg AcpiTimerLib: Get more accurate TSC FrequencyStar Zeng2016-08-123-21/+99
| | | | | | | | | | | | | | Minimize the code overhead between the two TSC reads by adding new internal API to calculate TSC Frequency instead of reusing MicroSecondDelay (). Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <liming.gao@intel.com> Cc: Paul A Lohr <paul.a.lohr@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Star Zeng <star.zeng@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
* PcAtChipsetPkg DSC: Add build option to disable deprecated APIsHao Wu2016-08-081-0/+3
| | | | | | | | | | | | | Add the following definition in the [BuildOptions] section in package DSC files to disable APIs that are deprecated: [BuildOptions] *_*_*_CC_FLAGS = -D DISABLE_NEW_DEPRECATED_INTERFACES Cc: Ruiyu Ni <ruiyu.ni@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Hao Wu <hao.a.wu@intel.com> Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
* PcAtChipsetPkg/PcRtc: Fix a NULL pointer deference issueRuiyu Ni2016-07-271-14/+17
| | | | | | | | | | | When a platform which doesn't support ACPI 1.0 (no XSDT) and FADT is not produced at the first time when ACPI table is published, GetCenturyRtcAddress() unconditionally deference Rsdp->RsdtAddress but Rsdp->RsdtAddress is 0 in this case. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com> Reviewed-by: Eric Dong <eric.dong@intel.com>
* PcAtChipsetPkg/PcRtc: Fix a stack corruption issueRuiyu Ni2016-07-271-1/+1
| | | | | | | | | In 32bit environment, ScanTableInSDT() incorrectly copies 8 bytes of data to 4-byte pointer Table, which causes the stack corruption. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com> Reviewed-by: Eric Dong <eric.dong@intel.com>
* PcAtChipsetPkg: Fix typos in commentsGiri P Mudusuru2016-07-113-7/+7
| | | | | | | | | - EFI_UNSUPPORTEDT to EFI_UNSUPPORTED Cc: Ruiyu Ni <ruiyu.ni@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Giri P Mudusuru <giri.p.mudusuru@intel.com> Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
* PcAtChipsetPkg: Update ResetSystemLib with PCDsLiming Gao2016-06-282-4/+8
| | | | | | | | | Update ResetSystemLib with PCDs for Reset Control Register and Value instead of hard code 0x64 and 0xFE. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com>
* PcAtChipsetPkg: Add two PCDs for Reset Control Register and ValueLiming Gao2016-06-282-0/+23
| | | | | | | | | PcdResetControlRegister for Reset Control Register address. PcdResetControlValueColdReset for Reset Control Register code reset value. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com>
* PcAtChipsetPkg/PcRtc: get century RTC address in entry pointRuiyu Ni2016-05-232-3/+13
| | | | | | | | | | | | | | When ACPI table is installed before PcRtc driver runs, the ACPI table installation callback isn't called which causes the century value isn't written to the CMOS. The patch calls GetCenturyRtcAddress() in entry point to fix the bug. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com> Cc: Anbazhagan Baraneedharan <anbazhagan@hp.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Cc: Star Zeng <star.zeng@intel.com>
* PcAtChipsetPkg/PcRtc: move ACPI parsing code to GetCenturyRtcAddressRuiyu Ni2016-05-231-18/+38
| | | | | | | | | | | | The patch moves ACPI parsing code to a separate function GetCenturyRtcAddress() and the next patch will call this function in driver entry point. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com> Cc: Anbazhagan Baraneedharan <anbazhagan@hp.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Cc: Star Zeng <star.zeng@intel.com>
* PcAtChipsetPkg AcpiTimerLib: Fix a logic errorwang xiaofeng2016-05-151-1/+1
| | | | | | | | | | | | | | | | | if ((PciRead8 (PCI_LIB_ADDRESS (Bus, Device, Function, EnableRegister) & EnableMask) != EnableMask)) { The bracket place is not right, I think it should be if ((PciRead8 (PCI_LIB_ADDRESS (Bus, Device, Function, EnableRegister)) & EnableMask) != EnableMask) Cc: Ruiyu Ni <ruiyu.ni@intel.com> Cc: Liming Gao <liming.gao@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: wang xiaofeng <winggundum82@163.com> Reviewed-by: Star Zeng <star.zeng@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
* PcAtChipsetPkg/PciHostBridge: Remove PciHostBridge driverRuiyu Ni2016-03-2912-5480/+0
| | | | | | | | | MdeModulePkg contains a new PciHostBridgeDxe driver which is a super set of PcAtChipsetPkg/PciHostBridgeDxe. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com>
* MdeModulePkg/PcRtc: Still create timezone variable when Daylight != 0Ruiyu Ni2016-02-031-1/+1
| | | | | | | | | The patch fixes a regression bug caused by last check-in which causes Daylight setting cannot be set when timezone is unspecified. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com> Reviewed-by: Feng Tian <feng.tian@intel.com>
* PcAtChipsetPkg/Rtc: Don't unnecessarily create timezone variable.Ruiyu Ni2016-02-011-43/+38
| | | | | | | | | | | | When SetTime() is called with EFI_UNSPECIFIED_TIMEZONE, the code can optimally not create the private timezone variable because absence of timezone variable indicates the timezone is unspecified. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com> Reviewed-by: Feng Tian <feng.tian@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@19783 6f19259b-4bc3-4df7-8a09-765794883524
* PcAtChipsetPkg: Add NOOPT target in PcAtChipsetPkg.dscHao Wu2016-01-191-2/+2
| | | | | | | | Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Hao Wu <hao.a.wu@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@19676 6f19259b-4bc3-4df7-8a09-765794883524
* PcAtChipsetPkg SerialIoLib: Fix VS2010 build errorHao Wu2016-01-111-11/+3
| | | | | | | | | | | | | | When overriding compiler options '/GL' with '/GL-', VS2010 will report warning C4701 potentially uninitialized local variable for 'LcrParity' and 'LcrStop' in function SerialPortSetAttributes(). This commit fixes this build issue. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Hao Wu <hao.a.wu@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@19629 6f19259b-4bc3-4df7-8a09-765794883524
* PcAtChipsetPkg/PcRtc: Modify INF file content to follow INF specRuiyu Ni2015-12-241-2/+2
| | | | | | | | Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com> Reviewed-by: Shumin Qiu <Shumin.Qiu@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@19515 6f19259b-4bc3-4df7-8a09-765794883524
* PcAtChipsetPkg/PcRtc: Add assertion to pass static code checkerRuiyu Ni2015-12-241-0/+2
| | | | | | | | Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com> Reviewed-by: Shumin Qiu <Shumin.Qiu@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@19514 6f19259b-4bc3-4df7-8a09-765794883524
* PcAtChipsetPkg/PcRtc: Fix GCC build failure.Ruiyu Ni2015-12-231-1/+2
| | | | | | | | Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com> Reviewed-by: Hao A Wu <hao.a.wu@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@19477 6f19259b-4bc3-4df7-8a09-765794883524
* PcAtChipsetPkg/Rtc: Fix a UEFI Win7 boot hang issueRuiyu Ni2015-12-224-4/+158
| | | | | | | | | | | | | | | | | | | | | The patch updates the Century value in CMOS location specified by FADT.Century to avoid UEFI Win7 hang during booting. Per the ACPI spec if the FADT.Century is zero, it's not needed to store the century value in CMOS. But UEFI Win7 treats the Century storage is optional only when FADT.Century is 0x80. While Linux strictly follows the ACPI spec and treats Century storage is optional when FADT.Century is 0. So if a platform wants to support both UEFI Win7 and Linux, it needs to report FADT.Century to a traditional value which doesn't equal to 0 or 0x80 (0x32 mostly). And RTC driver is enhanced to save the century value to the location specified by FADT.Century. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@19442 6f19259b-4bc3-4df7-8a09-765794883524
* PcAtChipsetPkg: Convert all .uni files to utf-8Jordan Justen2015-12-1523-0/+0
| | | | | | | | | | | | To convert these files I ran: $ python3 BaseTools/Scripts/ConvertUni.py PcAtChipsetPkg Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jordan Justen <jordan.l.justen@intel.com> Reviewed-by: Michael Kinney <michael.d.kinney@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@19260 6f19259b-4bc3-4df7-8a09-765794883524
* PcAtChipsetPkg SerialIoLib: Implement Get(Set)Control/SetAttributesStar Zeng2015-11-261-0/+276
| | | | | | | | | | | | Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <liming.gao@intel.com> Cc: Ruiyu Ni <ruiyu.ni@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Star Zeng <star.zeng@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18964 6f19259b-4bc3-4df7-8a09-765794883524
* PcAtChipsetPkg SerialIoLib: Fix typo in SerialPortWrite()Star Zeng2015-11-201-2/+2
| | | | | | | | | | | | | The "read" word in SerialPortWrite() header comment block should be "write". Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <liming.gao@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Star Zeng <star.zeng@intel.com> Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18909 6f19259b-4bc3-4df7-8a09-765794883524
* PcAtChipsetPkg: IdeControllerDxe: fix protocol usage hints in the INF fileLaszlo Ersek2015-09-221-2/+2
| | | | | | | | | | | | | | | | | | | | IdeControllerDxe installs EFI_IDE_CONTROLLER_INIT_PROTOCOL interface(s), and consumes PciIo. The comments in the INF file state the opposite at the moment, fix them. Cc: Alexander Graf <agraf@suse.de> Cc: Reza Jelveh <reza.jelveh@tuhh.de> Cc: Jordan Justen <jordan.l.justen@intel.com> Cc: Ruiyu Ni <ruiyu.ni@intel.com> Cc: Hannes Reinecke <hare@suse.de> Cc: Gabriel L. Somlo <somlo@cmu.edu> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Feng Tian <feng.tian@intel.com> Tested-by: Gabriel Somlo <somlo@cmu.edu> Reviewed-by: Jordan Justen <jordan.l.justen@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18530 6f19259b-4bc3-4df7-8a09-765794883524
* PcAtChipsetPkg/PciHostBridgeDxe/PciRootBridgeIo.c: rewrap code, strip ↵Laszlo Ersek2015-07-141-90/+123
| | | | | | | | | | | | | | | | trailing ws In this patch the code and the comments embedded in code are rewrapped to 79 columns, plus any trailing whitespace is stripped. Cc: Ruiyu Ni <ruiyu.ni@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Regression-tested-by: Gabriel Somlo <somlo@cmu.edu> Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com> Reviewed-by: Jordan Justen <jordan.l.justen@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17950 6f19259b-4bc3-4df7-8a09-765794883524
* PcAtChipsetPkg/PciHostBridgeDxe/PciRootBridgeIo.c: rewrap leading commentsLaszlo Ersek2015-07-141-725/+1150
| | | | | | | | | | | Cc: Ruiyu Ni <ruiyu.ni@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Regression-tested-by: Gabriel Somlo <somlo@cmu.edu> Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com> Reviewed-by: Jordan Justen <jordan.l.justen@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17949 6f19259b-4bc3-4df7-8a09-765794883524
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-18 18:52:24 +0000