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* PcAtChipsetPkg: Fix typing errorsThomas Huth2017-01-2010-28/+28
| | | | | | | | | Correct the reported by the codespell utility in some files of PcAtChipsetPkg. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Star Zeng <star.zeng@intel.com>
* PcAtChipsetPkg/PcRtc: Fix bad EOLRuiyu Ni2016-12-061-1/+1
| | | | | Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
* PcAtChipsetPkg/PcRtc: Handle NULL table entry in RSDT/XSDTRuiyu Ni2016-11-181-0/+5
| | | | | | | | | | | The ACPI code may reserve the first entry for a certain table (might be FACS) to help with OS compatible issues. We need to skip the NULL table entry in RSDT/XSDT. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com> Cc: Sean Brogan <sean.brogan@microsoft.com> Reviewed-by: Star Zeng <star.zeng@intel.com>
* PcAtChipsetPkg/HpetTimerDxe: Fix race condition in SetTimerPeriod()Michael Kinney2016-10-271-2/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | https://bugzilla.tianocore.org/show_bug.cgi?id=182 The function TimerDriverSetTimerPeriod() disables the HPET timer while the HPET timer HW is reprogrammed with a new timer period. However, the MMIO write to disable the HPET timer HW can be delayed and an HPET timer interrupt may be processed in the middle of reprogramming the HPET timer HW and this may produced unexpected results. The fix is to raise TPL to TPL_HIGH_LEVEL in TimerDriverSetTimerPeriod() during the time the HPET timer HW is reprogrammed. This guarantees that no timer interrupts are processed during reprogramming. The TimerDriverGenerateSoftInterrupt() function in this same driver also raises TPL to TPL_HIGH_LEVEL, so this fix matches the logic that is already used in another function for the same reason. Cc: Ruiyu Ni <ruiyu.ni@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Michael Kinney <michael.d.kinney@intel.com> Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
* PcAtChipsetPkg AcpiTimerLib: Clear bits [31:24] after reading by IoRead32()Star Zeng2016-10-113-9/+15
| | | | | | | | | | | | | | | Clear bits [31:24] after reading ACPI timer count by IoRead32(), and also add comments "Note: The implementation uses the lower 24-bits of the ACPI timer and is compatible with both 24-bit and 32-bit ACPI timers." in INF. Cc: Michael Kinney <michael.d.kinney@intel.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Liming Gao <liming.gao@intel.com> Cc: Laszlo Ersek <lersek@redhat.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Star Zeng <star.zeng@intel.com> Reviewed-by: Michael Kinney <michael.d.kinney@intel.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com>
* PcAtChipsetPkg: Remove KbcResetDxeRuiyu Ni2016-09-025-209/+0
| | | | | | | Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com> Reviewed-by: Feng Tian <feng.tian@intel.com> Cc: Amy Chan <amy.chan@intel.com>
* PcAtChipsetPkg/ResetSystemLib: Implement ResetPlatformSpecificRuiyu Ni2016-09-021-0/+21
| | | | | | | Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com> Reviewed-by: Feng Tian <feng.tian@intel.com> Cc: Amy Chan <amy.chan@intel.com>
* PcAtChipsetPkg AcpiTimerLib: Wait 363 ACPI timer counts to get TSC FreqStar Zeng2016-08-183-27/+33
| | | | | | | | | | | | | | | | | | Compute the number of ticks to wait to measure TSC frequency. Instead of (ACPI_TIMER_FREQUENCY / 10000) = 357 and 357 * 10000 = 3570000, use 363 * 9861 = 3579543 Hz which is within 2 Hz of ACPI_TIMER_FREQUENCY. 363 counts is a calibration time of 101.4 uS. The idea comes from Michael and Paolo. Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <liming.gao@intel.com> Cc: Paolo Bonzini <pbonzini@redhat.com> Cc: Paul A Lohr <paul.a.lohr@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Star Zeng <star.zeng@intel.com> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
* PcAtChipsetPkg AcpiTimerLib: Get more accurate TSC FrequencyStar Zeng2016-08-123-21/+99
| | | | | | | | | | | | | | Minimize the code overhead between the two TSC reads by adding new internal API to calculate TSC Frequency instead of reusing MicroSecondDelay (). Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <liming.gao@intel.com> Cc: Paul A Lohr <paul.a.lohr@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Star Zeng <star.zeng@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
* PcAtChipsetPkg DSC: Add build option to disable deprecated APIsHao Wu2016-08-081-0/+3
| | | | | | | | | | | | | Add the following definition in the [BuildOptions] section in package DSC files to disable APIs that are deprecated: [BuildOptions] *_*_*_CC_FLAGS = -D DISABLE_NEW_DEPRECATED_INTERFACES Cc: Ruiyu Ni <ruiyu.ni@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Hao Wu <hao.a.wu@intel.com> Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
* PcAtChipsetPkg/PcRtc: Fix a NULL pointer deference issueRuiyu Ni2016-07-271-14/+17
| | | | | | | | | | | When a platform which doesn't support ACPI 1.0 (no XSDT) and FADT is not produced at the first time when ACPI table is published, GetCenturyRtcAddress() unconditionally deference Rsdp->RsdtAddress but Rsdp->RsdtAddress is 0 in this case. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com> Reviewed-by: Eric Dong <eric.dong@intel.com>
* PcAtChipsetPkg/PcRtc: Fix a stack corruption issueRuiyu Ni2016-07-271-1/+1
| | | | | | | | | In 32bit environment, ScanTableInSDT() incorrectly copies 8 bytes of data to 4-byte pointer Table, which causes the stack corruption. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com> Reviewed-by: Eric Dong <eric.dong@intel.com>
* PcAtChipsetPkg: Fix typos in commentsGiri P Mudusuru2016-07-113-7/+7
| | | | | | | | | - EFI_UNSUPPORTEDT to EFI_UNSUPPORTED Cc: Ruiyu Ni <ruiyu.ni@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Giri P Mudusuru <giri.p.mudusuru@intel.com> Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
* PcAtChipsetPkg: Update ResetSystemLib with PCDsLiming Gao2016-06-282-4/+8
| | | | | | | | | Update ResetSystemLib with PCDs for Reset Control Register and Value instead of hard code 0x64 and 0xFE. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com>
* PcAtChipsetPkg: Add two PCDs for Reset Control Register and ValueLiming Gao2016-06-282-0/+23
| | | | | | | | | PcdResetControlRegister for Reset Control Register address. PcdResetControlValueColdReset for Reset Control Register code reset value. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com>
* PcAtChipsetPkg/PcRtc: get century RTC address in entry pointRuiyu Ni2016-05-232-3/+13
| | | | | | | | | | | | | | When ACPI table is installed before PcRtc driver runs, the ACPI table installation callback isn't called which causes the century value isn't written to the CMOS. The patch calls GetCenturyRtcAddress() in entry point to fix the bug. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com> Cc: Anbazhagan Baraneedharan <anbazhagan@hp.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Cc: Star Zeng <star.zeng@intel.com>
* PcAtChipsetPkg/PcRtc: move ACPI parsing code to GetCenturyRtcAddressRuiyu Ni2016-05-231-18/+38
| | | | | | | | | | | | The patch moves ACPI parsing code to a separate function GetCenturyRtcAddress() and the next patch will call this function in driver entry point. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com> Cc: Anbazhagan Baraneedharan <anbazhagan@hp.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Cc: Star Zeng <star.zeng@intel.com>
* PcAtChipsetPkg AcpiTimerLib: Fix a logic errorwang xiaofeng2016-05-151-1/+1
| | | | | | | | | | | | | | | | | if ((PciRead8 (PCI_LIB_ADDRESS (Bus, Device, Function, EnableRegister) & EnableMask) != EnableMask)) { The bracket place is not right, I think it should be if ((PciRead8 (PCI_LIB_ADDRESS (Bus, Device, Function, EnableRegister)) & EnableMask) != EnableMask) Cc: Ruiyu Ni <ruiyu.ni@intel.com> Cc: Liming Gao <liming.gao@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: wang xiaofeng <winggundum82@163.com> Reviewed-by: Star Zeng <star.zeng@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
* PcAtChipsetPkg/PciHostBridge: Remove PciHostBridge driverRuiyu Ni2016-03-2912-5480/+0
| | | | | | | | | MdeModulePkg contains a new PciHostBridgeDxe driver which is a super set of PcAtChipsetPkg/PciHostBridgeDxe. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com>
* MdeModulePkg/PcRtc: Still create timezone variable when Daylight != 0Ruiyu Ni2016-02-031-1/+1
| | | | | | | | | The patch fixes a regression bug caused by last check-in which causes Daylight setting cannot be set when timezone is unspecified. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com> Reviewed-by: Feng Tian <feng.tian@intel.com>
* PcAtChipsetPkg/Rtc: Don't unnecessarily create timezone variable.Ruiyu Ni2016-02-011-43/+38
| | | | | | | | | | | | When SetTime() is called with EFI_UNSPECIFIED_TIMEZONE, the code can optimally not create the private timezone variable because absence of timezone variable indicates the timezone is unspecified. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com> Reviewed-by: Feng Tian <feng.tian@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@19783 6f19259b-4bc3-4df7-8a09-765794883524
* PcAtChipsetPkg: Add NOOPT target in PcAtChipsetPkg.dscHao Wu2016-01-191-2/+2
| | | | | | | | Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Hao Wu <hao.a.wu@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@19676 6f19259b-4bc3-4df7-8a09-765794883524
* PcAtChipsetPkg SerialIoLib: Fix VS2010 build errorHao Wu2016-01-111-11/+3
| | | | | | | | | | | | | | When overriding compiler options '/GL' with '/GL-', VS2010 will report warning C4701 potentially uninitialized local variable for 'LcrParity' and 'LcrStop' in function SerialPortSetAttributes(). This commit fixes this build issue. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Hao Wu <hao.a.wu@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@19629 6f19259b-4bc3-4df7-8a09-765794883524
* PcAtChipsetPkg/PcRtc: Modify INF file content to follow INF specRuiyu Ni2015-12-241-2/+2
| | | | | | | | Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com> Reviewed-by: Shumin Qiu <Shumin.Qiu@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@19515 6f19259b-4bc3-4df7-8a09-765794883524
* PcAtChipsetPkg/PcRtc: Add assertion to pass static code checkerRuiyu Ni2015-12-241-0/+2
| | | | | | | | Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com> Reviewed-by: Shumin Qiu <Shumin.Qiu@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@19514 6f19259b-4bc3-4df7-8a09-765794883524
* PcAtChipsetPkg/PcRtc: Fix GCC build failure.Ruiyu Ni2015-12-231-1/+2
| | | | | | | | Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com> Reviewed-by: Hao A Wu <hao.a.wu@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@19477 6f19259b-4bc3-4df7-8a09-765794883524
* PcAtChipsetPkg/Rtc: Fix a UEFI Win7 boot hang issueRuiyu Ni2015-12-224-4/+158
| | | | | | | | | | | | | | | | | | | | | The patch updates the Century value in CMOS location specified by FADT.Century to avoid UEFI Win7 hang during booting. Per the ACPI spec if the FADT.Century is zero, it's not needed to store the century value in CMOS. But UEFI Win7 treats the Century storage is optional only when FADT.Century is 0x80. While Linux strictly follows the ACPI spec and treats Century storage is optional when FADT.Century is 0. So if a platform wants to support both UEFI Win7 and Linux, it needs to report FADT.Century to a traditional value which doesn't equal to 0 or 0x80 (0x32 mostly). And RTC driver is enhanced to save the century value to the location specified by FADT.Century. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@19442 6f19259b-4bc3-4df7-8a09-765794883524
* PcAtChipsetPkg: Convert all .uni files to utf-8Jordan Justen2015-12-1523-0/+0
| | | | | | | | | | | | To convert these files I ran: $ python3 BaseTools/Scripts/ConvertUni.py PcAtChipsetPkg Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jordan Justen <jordan.l.justen@intel.com> Reviewed-by: Michael Kinney <michael.d.kinney@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@19260 6f19259b-4bc3-4df7-8a09-765794883524
* PcAtChipsetPkg SerialIoLib: Implement Get(Set)Control/SetAttributesStar Zeng2015-11-261-0/+276
| | | | | | | | | | | | Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <liming.gao@intel.com> Cc: Ruiyu Ni <ruiyu.ni@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Star Zeng <star.zeng@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18964 6f19259b-4bc3-4df7-8a09-765794883524
* PcAtChipsetPkg SerialIoLib: Fix typo in SerialPortWrite()Star Zeng2015-11-201-2/+2
| | | | | | | | | | | | | The "read" word in SerialPortWrite() header comment block should be "write". Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <liming.gao@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Star Zeng <star.zeng@intel.com> Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18909 6f19259b-4bc3-4df7-8a09-765794883524
* PcAtChipsetPkg: IdeControllerDxe: fix protocol usage hints in the INF fileLaszlo Ersek2015-09-221-2/+2
| | | | | | | | | | | | | | | | | | | | IdeControllerDxe installs EFI_IDE_CONTROLLER_INIT_PROTOCOL interface(s), and consumes PciIo. The comments in the INF file state the opposite at the moment, fix them. Cc: Alexander Graf <agraf@suse.de> Cc: Reza Jelveh <reza.jelveh@tuhh.de> Cc: Jordan Justen <jordan.l.justen@intel.com> Cc: Ruiyu Ni <ruiyu.ni@intel.com> Cc: Hannes Reinecke <hare@suse.de> Cc: Gabriel L. Somlo <somlo@cmu.edu> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Feng Tian <feng.tian@intel.com> Tested-by: Gabriel Somlo <somlo@cmu.edu> Reviewed-by: Jordan Justen <jordan.l.justen@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18530 6f19259b-4bc3-4df7-8a09-765794883524
* PcAtChipsetPkg/PciHostBridgeDxe/PciRootBridgeIo.c: rewrap code, strip ↵Laszlo Ersek2015-07-141-90/+123
| | | | | | | | | | | | | | | | trailing ws In this patch the code and the comments embedded in code are rewrapped to 79 columns, plus any trailing whitespace is stripped. Cc: Ruiyu Ni <ruiyu.ni@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Regression-tested-by: Gabriel Somlo <somlo@cmu.edu> Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com> Reviewed-by: Jordan Justen <jordan.l.justen@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17950 6f19259b-4bc3-4df7-8a09-765794883524
* PcAtChipsetPkg/PciHostBridgeDxe/PciRootBridgeIo.c: rewrap leading commentsLaszlo Ersek2015-07-141-725/+1150
| | | | | | | | | | | Cc: Ruiyu Ni <ruiyu.ni@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Regression-tested-by: Gabriel Somlo <somlo@cmu.edu> Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com> Reviewed-by: Jordan Justen <jordan.l.justen@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17949 6f19259b-4bc3-4df7-8a09-765794883524
* PcAtChipsetPkg/PciHostBridgeDxe/PciHostBridge.c: rewrap code, strip trailing wsLaszlo Ersek2015-07-141-179/+218
| | | | | | | | | | | | | | In this patch the code and the comments embedded in code are rewrapped to 79 columns, plus any trailing whitespace is stripped. Cc: Ruiyu Ni <ruiyu.ni@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Regression-tested-by: Gabriel Somlo <somlo@cmu.edu> Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com> Reviewed-by: Jordan Justen <jordan.l.justen@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17948 6f19259b-4bc3-4df7-8a09-765794883524
* PcAtChipsetPkg/PciHostBridgeDxe/PciHostBridge.c: rewrap leading commentsLaszlo Ersek2015-07-141-212/+369
| | | | | | | | | | | Cc: Ruiyu Ni <ruiyu.ni@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Regression-tested-by: Gabriel Somlo <somlo@cmu.edu> Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com> Reviewed-by: Jordan Justen <jordan.l.justen@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17947 6f19259b-4bc3-4df7-8a09-765794883524
* PcAtChipsetPkg/PciHostBridgeDxe/PciHostBridge.h: strip trailing ws from codeLaszlo Ersek2015-07-141-17/+17
| | | | | | | | | | | Cc: Ruiyu Ni <ruiyu.ni@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Regression-tested-by: Gabriel Somlo <somlo@cmu.edu> Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com> Reviewed-by: Jordan Justen <jordan.l.justen@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17946 6f19259b-4bc3-4df7-8a09-765794883524
* PcAtChipsetPkg/PciHostBridgeDxe/PciHostBridge.h: rewrap comments to 79 columnsLaszlo Ersek2015-07-141-220/+374
| | | | | | | | | | | Cc: Ruiyu Ni <ruiyu.ni@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Regression-tested-by: Gabriel Somlo <somlo@cmu.edu> Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com> Reviewed-by: Jordan Justen <jordan.l.justen@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17945 6f19259b-4bc3-4df7-8a09-765794883524
* PcAtChipsetPkg: PciHostBridgeDxe: rewrap INF file to 79 columnsLaszlo Ersek2015-07-141-5/+8
| | | | | | | | | | | Cc: Ruiyu Ni <ruiyu.ni@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Regression-tested-by: Gabriel Somlo <somlo@cmu.edu> Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com> Reviewed-by: Jordan Justen <jordan.l.justen@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17944 6f19259b-4bc3-4df7-8a09-765794883524
* PcAtChipsetPkg: PciHostBridgeDxe: rewrap IoFifo source files to 79 columnsLaszlo Ersek2015-07-145-17/+22
| | | | | | | | | | | Cc: Ruiyu Ni <ruiyu.ni@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Regression-tested-by: Gabriel Somlo <somlo@cmu.edu> Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com> Reviewed-by: Jordan Justen <jordan.l.justen@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17943 6f19259b-4bc3-4df7-8a09-765794883524
* PcRtc: Fix PcRtcInit() to not clear RegisterB Hour Format bit (BIT1) sometimesRuiyu Ni2015-07-071-1/+2
| | | | | | | | Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com> Reviewed-by: Feng Tian <feng.tian@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17848 6f19259b-4bc3-4df7-8a09-765794883524
* PcAtChipsetPkg: Fix PCD expression build failureRuiyu Ni2015-06-122-1/+6
| | | | | | | | Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17628 6f19259b-4bc3-4df7-8a09-765794883524
* PcAtChipsetPkg/PcRtc: Fix a Y2K bugRuiyu Ni2015-06-113-44/+27
| | | | | | | | | | | | | | | | | | The original driver cannot handle the case when system time runs from 1999/12/31 23:59:59 to 2000/1/1 0:0:0. A simple test to set system time to 1999/12/31 23:59:59 can expose this bug. The patch limits the driver to only support year in 100 range and decide the century value based on the supporting range: Century either equals to PcdMinimalYear / 100 or equals to PcdMinimalYear / 100 + 1. The patch passed the Y2K test. However with year range [1998, 2097], when system time is 2097/12/31 23:59:59, the next second system time will become 1998/1/1 0:0:0. I think it's a acceptable limitation. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com> Reviewed-by: Feng Tian <feng.tian@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17624 6f19259b-4bc3-4df7-8a09-765794883524
* PcAtChipsetPkg: Update BaseAcpiTimerLibLiming Gao2015-02-285-6/+12
| | | | | | | | | | Introduce new PcdAcpiIoPortBaseAddressMask to mask BITS ACPI IO Port Base Address. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16952 6f19259b-4bc3-4df7-8a09-765794883524
* PcAtChipsetPkg/PciHostBridgeDxe: drop PciAddress, PciDataLaszlo Ersek2015-02-232-6/+0
| | | | | | | | | | | The PciAddress and PciData members of PCI_ROOT_BRIDGE_INSTANCE are never read; drop them. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Jordan Justen <jordan.l.justen@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16892 6f19259b-4bc3-4df7-8a09-765794883524
* PcAtChipsetPkg/PciHostBridgeDxe: fix typo in "aperture"Laszlo Ersek2015-02-233-15/+15
| | | | | | | | | Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Acked-by: Olivier Martin <Olivier.martin@arm.com> Reviewed-by: Jordan Justen <jordan.l.justen@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16891 6f19259b-4bc3-4df7-8a09-765794883524
* */Contributions.txt: Update example email addressJordan Justen2015-02-031-2/+2
| | | | | | | | | | | | | Use the example.com domain as recommended in RFC 2606. NOTE: This does not modify the wording of the "TianoCore Contribution Agreement 1.0" section Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jordan Justen <jordan.l.justen@intel.com> Reviewed-by: Bruce Cran <bruce.cran@gmail.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16724 6f19259b-4bc3-4df7-8a09-765794883524
* Added 2 new PCDs for minimal and maximal valid year in RTC.Elvin Li2015-01-234-4/+16
| | | | | | | | | Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Elvin Li <elvin.li@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16642 6f19259b-4bc3-4df7-8a09-765794883524
* PcAtChipsetPkg: Refine the format of meta data files.Shumin Qiu2015-01-205-27/+26
| | | | | | | | | | | | | Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Shumin Qiu <shumin.qiu@intel.com> Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16626 6f19259b-4bc3-4df7-8a09-765794883524
* Initialize alarm register in PcRtc module entrypoint to make UEFI SCT ↵Elvin Li2014-11-251-2/+89
| | | | | | | | | | | | GetWakeupTime pass. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Elvin Li <elvin.li@intel.com> Reviewed-by: Feng Tian <feng.tian@intel.com> Reviewed-by: Eric Jin <eric.jin@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16425 6f19259b-4bc3-4df7-8a09-765794883524
* EDK II Contributions.txt: Update patch format informationJordan Justen2014-10-311-13/+29
| | | | | | | | | | | | | Update to show what the patch looks like in email form. NOTE: This does not modify the wording of the "TianoCore Contribution Agreement 1.0" section Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jordan Justen <jordan.l.justen@intel.com> Reviewed-by: Jaben Carsey <jaben.carsey@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16297 6f19259b-4bc3-4df7-8a09-765794883524
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-21 16:14:05 +0000