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* SecurityPkg Tcg2ConfigDxe: Align Attempt TPM Device help with optionsStar Zeng2016-11-281-3/+2
| | | | | | | | | | | | Current options only have TPM 1.2 and TPM 2.0, but help shows Disable, TPM1.2, or TPM2.0, they are mismatched. Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Chao Zhang <chao.b.zhang@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Star Zeng <star.zeng@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
* SecurityPkg Tcg2ConfigDxe: Remove BlockSID actions and related stringsStar Zeng2016-11-282-6/+0
| | | | | | | | | | | | | Tcg2ConfigDxe has no related code to handle BlockSID related actions that have been covered by OpalPasswordDxe driver. Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Chao Zhang <chao.b.zhang@intel.com> Cc: Eric Dong <eric.dong@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Star Zeng <star.zeng@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com> Reviewed-by: Eric Dong <eric.dong@intel.com>
* SecurityPkg OpalPasswordDxe: Use PP actions to enable BlockSIDEric Dong2016-11-287-60/+159
| | | | | | | | | | | Update the implementation to use PP BlockSID related actions. Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Chao Zhang <chao.b.zhang@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Eric Dong <eric.dong@intel.com> Signed-off-by: Star Zeng <star.zeng@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
* SecurityPkg Tcg2PPLib: Support BlockSID related actionsStar Zeng2016-11-284-76/+217
| | | | | | | | | | | | | | Then Tcg2PhysicalPresenceLib can support TCG2 PP TPM2, storage management and vendor specific requests according to Physical Presence Interface Specification. Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Chao Zhang <chao.b.zhang@intel.com> Cc: Eric Dong <eric.dong@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Star Zeng <star.zeng@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com> Reviewed-by: Eric Dong <eric.dong@intel.com>
* SecurityPkg DxeTcg2PPLib: Lock Tcg2PhysicalPresenceFlags variable on S4Star Zeng2016-11-231-17/+17
| | | | | | | | | | | The code updates Tcg2PhysicalPresenceLibProcessRequest() to also lock Tcg2PhysicalPresenceFlags variable on S4. Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Chao Zhang <chao.b.zhang@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Star Zeng <star.zeng@intel.com> Reviewed-by: Chao Zhang <chao.b.zhang@intel.com>
* Revert old "Enable BlockSid related PP actions" patch series.Eric Dong2016-11-2333-2427/+77
| | | | | | | | | | | New solution for this issue will be provided. This reverts commits from d1947ce509d745f32db6b7fecc03dc9c778b9350 to bda034c34deea6eb43edcef28018a9ace8f04637. Reviewed-by: Jiewen Yao <jiewen.yao@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Eric Dong <eric.dong@intel.com>
* SecurityPkg Tcg2Dxe: ASSERT to ensure 'VarData' is not NULLHao Wu2016-11-221-0/+1
| | | | | | | | | | | | | | | The logic in functions ReadAndMeasureVariable() and MeasureVariable() within Tcg2Dxe ensure that 'VarData' will not be NULL before calling TcgDxeHashLogExtendEvent() at line 1716. This commit adds ASSERT as warnings for the case that will not happen. Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Chao Zhang <chao.b.zhang@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Hao Wu <hao.a.wu@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com> Reviewed-by: Chao Zhang <chao.b.zhang@intel.com>
* SecurityPkg TcgStorageCoreLib: ASSERT to ensure 'ByteSeq' is not NULLHao Wu2016-11-221-0/+2
| | | | | | | | | | | Add ASSERT to make sure 'ByteSeq' is not NULL before comsumed by CopyMem(). Cc: Eric Dong <eric.dong@intel.com> Cc: Feng Tian <feng.tian@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Hao Wu <hao.a.wu@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
* SecurityPkg OpalPasswordDxe: Clean PSID buffer.Eric Dong2016-11-212-10/+17
| | | | | | | | | | Change callback handler type to avoid saving PSID info in browser temp buffer. Also clean the buffer after using it. Cc: Feng Tian <feng.tian@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Eric Dong <eric.dong@intel.com>
* SecurityPkg OpalPasswordDxe: Clean password buffer.Eric Dong2016-11-212-4/+14
| | | | | | | Cc: Feng Tian <feng.tian@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Eric Dong <eric.dong@intel.com>
* SecurityPkg Tcg2Config: Remove the empty options.Eric Dong2016-11-211-3/+0
| | | | | | | | | | | The BlockSID actions not has code related to them. Now we implement the BlockSID feature in OpalPasswordDxe driver. So remove these actions here. Reviewed-by: Jiewen Yao <jiewen.yao@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Eric Dong <eric.dong@intel.com>
* SecurityPkg OpalPasswordDxe: Use PP actions to enable BlockSID.Eric Dong2016-11-217-60/+164
| | | | | | | | | | Update the implementation, use physical presence defined actions to update the BlockSid related status. Reviewed-by: Jiewen Yao <jiewen.yao@intel.com> Cc: Feng Tian <feng.tian@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Eric Dong <eric.dong@intel.com>
* SecurityPkg TcgSmm: Enable Storage actions.Eric Dong2016-11-213-0/+26
| | | | | | | | | | | After enable storage related actions in the TcgPhysicalPresenceStorageLib, use this library to support storage related actions in this driver. Reviewed-by: Jiewen Yao <jiewen.yao@intel.com> Reviewed-by: Chao Zhang <chao.b.zhang@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Eric Dong <eric.dong@intel.com>
* SecurityPkg SmmTcg2PhysicalPresenceLib: Enable Storage actions.Eric Dong2016-11-212-8/+34
| | | | | | | | | | | After enable storage related actions in the TcgPhysicalPresenceStorageLib, use this library to support storage related actions in this library. Reviewed-by: Jiewen Yao <jiewen.yao@intel.com> Reviewed-by: Chao Zhang <chao.b.zhang@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Eric Dong <eric.dong@intel.com>
* SecurityPkg DxeTcgPhysicalPresenceLib: Enable Storage actions.Eric Dong2016-11-212-2/+18
| | | | | | | | | | | After enable storage related actions in the TcgPhysicalPresenceStorageLib, use this library to support storage related actions in this library. Reviewed-by: Jiewen Yao <jiewen.yao@intel.com> Reviewed-by: Chao Zhang <chao.b.zhang@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Eric Dong <eric.dong@intel.com>
* SecurityPkg DxeTcg2PhysicalPresenceLib: Enable Storage actions.Eric Dong2016-11-212-4/+22
| | | | | | | | | | | After enable storage related actions in the TcgPhysicalPresenceStorageLib, use this library to support storage related actions in this library. Reviewed-by: Jiewen Yao <jiewen.yao@intel.com> Reviewed-by: Chao Zhang <chao.b.zhang@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Eric Dong <eric.dong@intel.com>
* SecurityPkg: Add SmmTcgPhysicalPresenceStorageLib.Eric Dong2016-11-214-0/+247
| | | | | | | | | | | Tcg Physical Presence spec defined some actions used for storage device. Add Smm version library to handles these actions. Reviewed-by: Jiewen Yao <jiewen.yao@intel.com> Reviewed-by: Chao Zhang <chao.b.zhang@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Eric Dong <eric.dong@intel.com>
* SecurityPkg: Add DxeTcgPhysicalPresenceStorageLib.Eric Dong2016-11-2111-0/+1729
| | | | | | | | | | | Tcg Physical Presence spec defined some actions used for storage device. Add Dxe version library to handles these actions. Reviewed-by: Jiewen Yao <jiewen.yao@intel.com> Reviewed-by: Chao Zhang <chao.b.zhang@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Eric Dong <eric.dong@intel.com>
* SecurityPkg: Add header file for TcgPhysicalPresenceStorageLib.Eric Dong2016-11-211-0/+152
| | | | | | | Reviewed-by: Jiewen Yao <jiewen.yao@intel.com> Reviewed-by: Chao Zhang <chao.b.zhang@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Eric Dong <eric.dong@intel.com>
* SecurityPkg: Add definition for Physical Presence storage flag.Eric Dong2016-11-211-0/+35
| | | | | | | Reviewed-by: Jiewen Yao <jiewen.yao@intel.com> Reviewed-by: Chao Zhang <chao.b.zhang@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Eric Dong <eric.dong@intel.com>
* SecurityPkg Tcg2Pei: Add comments into LogHashEvent()Star Zeng2016-11-211-0/+4
| | | | | | | | | | | Add comments into LogHashEvent() to describe the usage of GetDigestListSize (DigestList). Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Chao Zhang <chao.b.zhang@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Star Zeng <star.zeng@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
* SecurityPkg Tcg2Dxe: Get correct digest list sizeStar Zeng2016-11-211-4/+4
| | | | | | | | | | | | | | Current code uses GetDigestListSize(DigestList) to get digest list size, that is incorrect. The code should get digest list size of digests copied into event2 log, those digests are compacted, so GetDigestListBinSize() should be used. Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Chao Zhang <chao.b.zhang@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Star Zeng <star.zeng@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
* SecurityPkg Tcg2Dxe: Filter inactive digest in event2 log from PEI HOBStar Zeng2016-11-211-4/+94
| | | | | | | | | Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Chao Zhang <chao.b.zhang@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Star Zeng <star.zeng@intel.com> Reviewed-by : Chao Zhang <chao.b.zhang@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
* SecurityPkg TPM2: Update desc for param Buffer of GetDigestListSize()Star Zeng2016-11-212-2/+2
| | | | | | | | | | | | | To make the description more clear, update the description for parameter Buffer of GetDigestListSize() to "Buffer to hold copied TPML_DIGEST_VALUES compact binary.". Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Chao Zhang <chao.b.zhang@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Star Zeng <star.zeng@intel.com> Reviewed-by : Chao Zhang <chao.b.zhang@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
* SecurityPkg TPM2: Add GetHashMaskFromAlgo() into Tpm2CommandLibStar Zeng2016-11-212-5/+42
| | | | | | | | | | | Add GetHashMaskFromAlgo() into Tpm2CommandLib for coming consumer. Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Chao Zhang <chao.b.zhang@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Star Zeng <star.zeng@intel.com> Reviewed-by : Chao Zhang <chao.b.zhang@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
* SecurityPkg TPM2: Make IsHashAlgSupportedInHashAlgorithmMask externalStar Zeng2016-11-212-0/+17
| | | | | | | | | | | | Current IsHashAlgSupportedInHashAlgorithmMask is only an internal function, this patch makes it external for coming consumer. Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Chao Zhang <chao.b.zhang@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Star Zeng <star.zeng@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com> Reviewed-by : Chao Zhang <chao.b.zhang@intel.com>
* SecurityPkg TPM2: Assign real copied count in CopyDigestListToBuffer()Star Zeng2016-11-211-1/+6
| | | | | | | | | | | In CopyDigestListToBuffer() of Tpm2CommandLib, the count in returned Buffer should be real copied DigestList count. Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Chao Zhang <chao.b.zhang@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Star Zeng <star.zeng@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
* SecurityPkg: Fix typos in commentsZhang, Chao B2016-11-152-2/+2
| | | | | | | | | | | | | | | | This patch fixes the following typos: - intialized -> initialized - TURE -> TRUE - successull -> successfully - hanlder -> handler - funciton -> function - Seperator -> Separator - Sumbit -> Submit Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Gary Lin <glin@suse.com> Reviewed-by: Chao Zhang <chao.b.zhang@intel.com>
* SecurityPkg: Fix typos in commentsZhang, Chao B2016-11-1512-16/+16
| | | | | | | | | | | | | | | | This patch fixes the following typos: - intialized -> initialized - TURE -> TRUE - successull -> successfully - hanlder -> handler - funciton -> function - Seperator -> Separator - Sumbit -> Submit Also convert EFI_D_ERROR to DEBUG_ERROR for some debug messages. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Gary Lin <glin@suse.com> Reviewed-by: Chao Zhang <chao.b.zhang@intel.com>
* SecurityPkg/SecurityPkg.dsc: Add FmpAuthenticationLib*.Jiewen Yao2016-11-081-0/+3
| | | | | | | | | | | | | | | Add FmpAuthenticationLib* to check build. Cc: Feng Tian <feng.tian@intel.com> Cc: Star Zeng <star.zeng@intel.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <liming.gao@intel.com> Cc: Chao Zhang <chao.b.zhang@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jiewen Yao <jiewen.yao@intel.com> Reviewed-by: Chao Zhang <chao.b.zhang@intel.com> Reviewed-by: Michael Kinney <michael.d.kinney@intel.com> Tested-by: Michael Kinney <michael.d.kinney@intel.com>
* SecurityPkg/FmpAuthenticationLibRsa2048Sha256: Add RSA2048 instance.Jiewen Yao2016-11-083-0/+434
| | | | | | | | | | | | | | | It provides Rsa2048Sha256 based FMP authentication. Cc: Feng Tian <feng.tian@intel.com> Cc: Star Zeng <star.zeng@intel.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <liming.gao@intel.com> Cc: Chao Zhang <chao.b.zhang@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jiewen Yao <jiewen.yao@intel.com> Reviewed-by: Chao Zhang <chao.b.zhang@intel.com> Reviewed-by: Michael Kinney <michael.d.kinney@intel.com> Tested-by: Michael Kinney <michael.d.kinney@intel.com>
* SecurityPkg/FmpAuthenticationLibPkcs7: Add PKCS7 instance for FMP.Jiewen Yao2016-11-083-0/+297
| | | | | | | | | | | | | | | It provides PKCS7 based FMP authentication. Cc: Feng Tian <feng.tian@intel.com> Cc: Star Zeng <star.zeng@intel.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <liming.gao@intel.com> Cc: Chao Zhang <chao.b.zhang@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jiewen Yao <jiewen.yao@intel.com> Reviewed-by: Chao Zhang <chao.b.zhang@intel.com> Reviewed-by: Michael Kinney <michael.d.kinney@intel.com> Tested-by: Michael Kinney <michael.d.kinney@intel.com>
* SecurityPkg/SecurityPkg.dec: Add PcdPkcs7CertBuffer PCD.Jiewen Yao2016-11-081-1/+7
| | | | | | | | | | | | | | | | | | | | | This PCD is similar to PcdRsa2048Sha256PublicKeyBuffer. It provides trusted cert for PKCS7 verification. It can be used for Recovery and Capsule Update images. We added warning message for both PcdPkcs7CertBuffer and PcdRsa2048Sha256PublicKeyBuffer. The default value is only for test purpose. Cc: Feng Tian <feng.tian@intel.com> Cc: Star Zeng <star.zeng@intel.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <liming.gao@intel.com> Cc: Chao Zhang <chao.b.zhang@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jiewen Yao <jiewen.yao@intel.com> Reviewed-by: Chao Zhang <chao.b.zhang@intel.com> Reviewed-by: Michael Kinney <michael.d.kinney@intel.com> Tested-by: Michael Kinney <michael.d.kinney@intel.com>
* SecurityPkg/AuthVariableLib: rebase to ARRAY_SIZE()Laszlo Ersek2016-10-271-2/+2
| | | | | | | | | Cc: Chao Zhang <chao.b.zhang@intel.com> Cc: Star Zeng <star.zeng@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Jordan Justen <jordan.l.justen@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com>
* SecurityPkg: SmmTcg2PhysicalPresenceLib: Fix coding style issueZhang, Chao B2016-10-212-4/+4
| | | | | | | | | Fix coding style issue for function descriptor. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Chao Zhang <chao.b.zhang@intel.com> Reviewed-by: Long Qin <qin.long@intel.com> Reviewed-by: Bi Dandan <dandan.bi@intel.com>
* SecurityPkg: Fix typo 'Ihis' with 'This' in codesHao Wu2016-10-1831-62/+62
| | | | | | | | Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Chao Zhang <chao.b.zhang@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Hao Wu <hao.a.wu@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
* SecurityPkg OpalPasswordSmm: Fix S3 resume failure.Eric Dong2016-10-122-21/+76
| | | | | | | | | | Changes includes: 1.Check SMM device list before update it to avoid duplicate creation. 2.Clean up the configuration buffer before use it in S3 resume phase. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Eric Dong <eric.dong@intel.com> Reviewed-by: Feng Tian <feng.tian@intel.com>
* SecurityPkg: SmmTcg2PhysicalPresenceLib: Fix GCC build failureZhang, Chao B2016-10-102-2/+3
| | | | | | | | | GCC is case sensitive. Also add BaseMemoryLib in INF. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Chao Zhang <chao.b.zhang@intel.com> Reviewed-by: Gao Liming <liming.gao@intel.com> Reviewed-by: Long Qin <qin.long@intel.com>
* SecurityPkg: Tcg2: Fix TCG2 PP issuesZhang, Chao B2016-09-294-27/+111
| | | | | | | | | | | | | Several issues exist in TCG2 PP 1. TCG2 PP use NVS PPRQ/PPRM as PP parameter as well as current PP state cache. But it doesn't handle PP set failure case 2. TCG2 PP Submit TPM Operation Request to Pre-OS Environment forgets to clean PPRM 3. Potential alignment issue Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Chao Zhang <chao.b.zhang@intel.com> Reviewed-by: Qin Long <qin.long@intel.com>
* SecurityPkg: Tcg: New field for User Confirmation StatusZhang, Chao B2016-09-276-10/+14
| | | | | | | | | | | Add a new field in TcgNVS for PP operation user confirmation status, instead of previous logic overriding Request. Previous logic causes Get Pending TPM Operation Requested sub function return wrong value. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Chao Zhang <chao.b.zhang@intel.com> Reviewed-by: Yao Jiewen <jiewen.yao@intel.com> Reviewed-by: Long Qin <qin.long@intel.com>
* SecurityPkg Tcg2Pei: Fix GCC build failure caused by 5919a9600e07Star Zeng2016-09-231-5/+5
| | | | | | | | Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Chao B Zhang <chao.b.zhang@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Star Zeng <star.zeng@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
* SecurityPkg/TPM2: Sync PcrAllocations and PcrMaskJiewen Yao2016-09-213-46/+69
| | | | | | | | | | | | | Current TCG2 implementation will set Tpm2HashMask PCD value according to TPM2 PCR bank. However, there might be misconfiguration in BIOS build phase. The enhanced logic makes sure that the current PCR allocations, the TPM supported PCRs, and the PcdTpm2HashMask are all in agreement. Cc: Chao B Zhang <chao.b.zhang@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jiewen Yao <jiewen.yao@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com> Reviewed-by: Chao Zhang <chao.b.zhang@intel.com>
* SecurityPkg/TPM2: Extract GetSupportedAndActivePcrs to Tpm2CommandLibJiewen Yao2016-09-214-58/+118
| | | | | | | | | | | | | | This patch extracts function Tpm2GetCapabilitySupportedAndActivePcrs() from drivers and also update Tcg2ExecutePhysicalPresence() to call Tpm2GetCapabilitySupportedAndActivePcrs() instead of Tcg2Protocol->GetCapability to query the TPM to determine which hashing algorithms are supported. Cc: Chao B Zhang <chao.b.zhang@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jiewen Yao <jiewen.yao@intel.com> Signed-off-by: Star Zeng <star.zeng@intel.com> Reviewed-by: Chao Zhang <chao.b.zhang@intel.com>
* SecurityPkg/TPM2: Move CopyDigestListToBuffer() to Tpm2CommandLibJiewen Yao2016-09-214-161/+102
| | | | | | | | | | | | | | | This patch just moves function CopyDigestListToBuffer() from drivers to library with HashAlgorithmMask parameter added to make the interface more applicable. The related function IsHashAlgSupportedInHashAlgorithmMask() is also moved from drivers to library as internal function. Cc: Chao B Zhang <chao.b.zhang@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jiewen Yao <jiewen.yao@intel.com> Signed-off-by: Star Zeng <star.zeng@intel.com> Reviewed-by: Chao Zhang <chao.b.zhang@intel.com>
* SecurityPkg/TPM2: Move GetDigestListSize() to Tpm2CommandLibJiewen Yao2016-09-214-50/+39
| | | | | | | | | | | This patch just moves function GetDigestListSize() from drivers to library and no functionality change. Cc: Chao B Zhang <chao.b.zhang@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jiewen Yao <jiewen.yao@intel.com> Signed-off-by: Star Zeng <star.zeng@intel.com> Reviewed-by: Chao Zhang <chao.b.zhang@intel.com>
* SecurityPkg/TPM2: Update function header of GetDigestFromDigestList()Star Zeng2016-09-212-13/+13
| | | | | | | | | | | | Update the return status description and use OUT identifier instead of IN for Digest parameter, no functionality change. Cc: Chao B Zhang <chao.b.zhang@intel.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Star Zeng <star.zeng@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com> Reviewed-by: Chao Zhang <chao.b.zhang@intel.com>
* SecurityPkg/TPM2: Move GetDigestFromDigestList() to Tpm2CommandLibJiewen Yao2016-09-216-145/+59
| | | | | | | | | | | This patch just moves function Tpm2GetDigestFromDigestList() from drivers to library as GetDigestFromDigestList() and no functionality change. Cc: Chao B Zhang <chao.b.zhang@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jiewen Yao <jiewen.yao@intel.com> Signed-off-by: Star Zeng <star.zeng@intel.com> Reviewed-by: Chao Zhang <chao.b.zhang@intel.com>
* SecurityPkg/TPM2: Move Tpm2PcrAllocateBanks() to Tpm2CommandLibJiewen Yao2016-09-213-136/+154
| | | | | | | | | | | | This patch just moves function Tpm2CommandAllocPcr() from DxeTcg2PhysicalPresenceLib.c to Tpm2CommandLib as Tpm2PcrAllocateBanks() and no functionality change. Cc: Chao B Zhang <chao.b.zhang@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jiewen Yao <jiewen.yao@intel.com> Signed-off-by: Star Zeng <star.zeng@intel.com> Reviewed-by: Chao Zhang <chao.b.zhang@intel.com>
* SecurityPkg/SecurityPkg.dsc: Declare PciSegmentLibStar Zeng2016-09-051-0/+1
| | | | | | | | | | | | | | PiDxeS3BootScriptLib will be updated to consume PciSegmentLib instead of PciLib to support multiple PCI segment. Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Amy Chan <amy.chan@intel.com> Cc: Chao Zhang <chao.b.zhang@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Star Zeng <star.zeng@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com> Reviewed-by: Michael Kinney <michael.d.kinney@intel.com>
* SecurityPkg: TPM12CommandLib: Add Response returnCode CheckZhang, Chao B2016-09-012-1/+18
| | | | | | | | | | Check response return code before return from Tpm12Extend and Tpm12PhysicalPresence. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Chao Zhang <chao.b.zhang@intel.com> Reviewed-by: Yao Jiewen <jiewen.yao@intel.com> Reviewed-by: Long Qin <qin.long@intel.com>
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-13 18:17:07 +0000