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* UefiCpuPkg/CpuDxe: Guarantee GDT is below 4GBRay Ni2021-03-181-5/+16
| | | | | | | | | | | | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3233 GDT needs to be allocated below 4GB in 64bit environment because AP needs it for entering to protected mode. CPU running in big real mode cannot access above 4GB GDT. But CpuDxe driver contains below code: gdt = AllocateRuntimePool (sizeof (GdtTemplate) + 8); ..... gdtPtr.Base = (UINT32)(UINTN)(VOID*) gdt; The AllocateRuntimePool() may allocate memory above 4GB. Thus, we cannot use AllocateRuntimePool (), instead, we should use AllocatePages() to make sure GDT is below 4GB space. Signed-off-by: Ray Ni <ray.ni@intel.com> Reviewed-by: Eric Dong <eric.dong@intel.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Cc: Rahul Kumar <rahul1.kumar@intel.com>
* UefiCpuPkg/CpuDxe: Rename variables to follow EDKII coding standardRay Ni2021-03-181-12/+11
| | | | | | | | | The change doesn't impact any functionality. Signed-off-by: Ray Ni <ray.ni@intel.com> Reviewed-by: Eric Dong <eric.dong@intel.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Cc: Rahul Kumar <rahul1.kumar@intel.com>
* UefiCpuPkg: Add a 16-bit protected mode code segment descriptorTom Lendacky2020-08-171-4/+4
| | | | | | | | | | | | | | | | | | | BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=2198 A hypervisor is not allowed to update an SEV-ES guests register state, so when booting an SEV-ES guest AP, the hypervisor is not allowed to set the RIP to the guest requested value. Instead, an SEV-ES AP must be transition from 64-bit long mode to 16-bit real mode in response to an INIT-SIPI-SIPI sequence. This requires a 16-bit code segment descriptor. For PEI, create this descriptor in the reset vector GDT table. For DXE, create this descriptor from the newly reserved entry at location 0x28. Cc: Eric Dong <eric.dong@intel.com> Cc: Ray Ni <ray.ni@intel.com> Cc: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Eric Dong <eric.dong@intel.com> Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com> Regression-tested-by: Laszlo Ersek <lersek@redhat.com>
* UefiCpuPkg/CpuDxe: Fix few typosAntoine Coeur2020-02-101-1/+1
| | | | | | | | | | | | | | Fix few typos in comments and documentation. Cc: Eric Dong <eric.dong@intel.com> Cc: Ray Ni <ray.ni@intel.com> Cc: Laszlo Ersek <lersek@redhat.com> Signed-off-by: Antoine Coeur <coeur@gmx.fr> Reviewed-by: Philippe Mathieu-Daude <philmd@redhat.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Eric Dong <eric.dong@intel.com> Signed-off-by: Philippe Mathieu-Daude <philmd@redhat.com> Message-Id: <20200207010831.9046-77-philmd@redhat.com>
* UefiCpuPkg: Replace BSD License with BSD+Patent LicenseMichael D Kinney2019-04-091-7/+1
| | | | | | | | | | | | | | | | | | | | | https://bugzilla.tianocore.org/show_bug.cgi?id=1373 Replace BSD 2-Clause License with BSD+Patent License. This change is based on the following emails: https://lists.01.org/pipermail/edk2-devel/2019-February/036260.html https://lists.01.org/pipermail/edk2-devel/2018-October/030385.html RFCs with detailed process for the license change: V3: https://lists.01.org/pipermail/edk2-devel/2019-March/038116.html V2: https://lists.01.org/pipermail/edk2-devel/2019-March/037669.html V1: https://lists.01.org/pipermail/edk2-devel/2019-March/037500.html Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com> Reviewed-by: Eric Dong <eric.dong@intel.com> Reviewed-by: Ray Ni <ray.ni@intel.com>
* UefiCpuPkg: CpuDxe: Update GDT to be consistent with DxeIplPeimMichael Kinney2015-10-301-36/+47
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The PiSmmCpuDxeSmm module makes some assumptions about GDT selectors that are based on the GDT layout from the DxeIplPeim. For example, the protected mode entry code and (where appropriate) the long mode entry code in the UefiCpuPkg/PiSmmCpuDxeSmm/*/MpFuncs.* assembly files, which are used during S3 resume, open-code segment selector values that depend on DxeIplPeim's GDT layout. This updates the CpuDxe module to use the same GDT layout as the DxeIplPeim. This enables modules that are dispatched after CpuDxe to find, and potentially save and restore, a GDT layout that matches that of DxeIplPeim. The DxeIplPeim has a 2 GDT entries for data selectors that are identical. These are LINEAR_SEL (GDT Offset 0x08)and LINEAR_DATA64_SEL (GDT offset 0x30). LINEAL_SEL is used for for IA32 DXE and the LINEAR_DATA64_SEL is used for X64 DXE. This duplicate data selector was added to the CpuDxe module to keep the GDT and all selectors consistent. Using a consistent GDT also improves debug experience. Reported-by: Laszlo Ersek <lersek@redhat.com> Analyzed-by: Laszlo Ersek <lersek@redhat.com> Link: http://article.gmane.org/gmane.comp.bios.edk2.devel/3568 Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Michael Kinney <michael.d.kinney@intel.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Tested-by: Laszlo Ersek <lersek@redhat.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18710 6f19259b-4bc3-4df7-8a09-765794883524
* UefiCpuPkg/CpuDxe: Move GDT structures into CpuGdt.hJordan Justen2014-11-131-51/+1
| | | | | | | | | | | | | We'll want to use the structures for AP startup. Note: It seems previously we were not using '#pragma pack ()' in CpuGdt.c. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jordan Justen <jordan.l.justen@intel.com> Reviewed-by: Jeff Fan <jeff.fan@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16348 6f19259b-4bc3-4df7-8a09-765794883524
* Add explicit type cast to suppress possible warning of precession loss.xli242010-08-101-1/+1
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* Code refinement.xli242010-07-131-10/+10
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* Update the copyright notice formathhtian2010-04-241-2/+2
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* Remove svn:executable on *.c, *.h, *.asm, *.S, *.inf and *.asl*jljusten2010-02-251-0/+0
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* Add CPU DXE driver for IA32 & X64 processor architectures.jljusten2009-05-271-0/+200
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@8395 6f19259b-4bc3-4df7-8a09-765794883524
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