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* UefiCpuPkg: Add a new field in MpInfo2 HOBDun Tan2023-12-121-0/+2
| | | | | | | | | | Add new field CoreType in gMpInformationHobGuid2 Signed-off-by: Dun Tan <dun.tan@intel.com> Cc: Eric Dong <eric.dong@intel.com> Reviewed-by: Ray Ni <ray.ni@intel.com> Cc: Rahul Kumar <rahul1.kumar@intel.com> Cc: Gerd Hoffmann <kraxel@redhat.com>
* UefiCpuPkg: Create gMpInformationHobGuid2 in UefiCpuPkgDun Tan2023-12-121-0/+56
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Create gMpInformationHobGuid2 in UefiCpuPkg. Currently, there is a gMpInformationHobGuid defined, created and consumed only in StandaloneMmPkg. The HOB contains the EFI_PROCESSOR_INFORMATION structure for each CPU and the number of processors. This is the same as the information that PiSmmCpuDxeSmm uses MpService Protocol to get. This new gMpInformationHobGuid2 also contains the NumberOfProcessors and the EFI_PROCESSOR_INFORMATION for each CPU. Also the HOB is extended to support the case that the maximum HOB length is not enough for all CPU. So there might be more than one HOB instance in the HOB list. Each HOB describes the corresponding CPU index range. The plan is to create gMpInformationHob2Guid in CpuMpPei module(implemented in next commit). Then PiSmmCpuDxeSmm and other MM_STANDALONE modules can consume the hob. This can avoid calling MpService Protocol in PiSmmCpuDxeSmm. Also the issue that one gMpInformationHobGuid might be not enough when CPU number is 1~2000 or bigger can be solved. Signed-off-by: Dun Tan <dun.tan@intel.com> Cc: Eric Dong <eric.dong@intel.com> Reviewed-by: Ray Ni <ray.ni@intel.com> Cc: Rahul Kumar <rahul1.kumar@intel.com> Cc: Gerd Hoffmann <kraxel@redhat.com>
* UefiCpuPkg/SmmBaseHob.h: Add SMM Base HOB DataWu, Jiaxin2023-03-061-0/+75
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4337 The default SMBASE for the x86 processor is 0x30000. When SMI happens, processor runs the SMI handler at SMBASE+0x8000. Also, the SMM save state area is within SMBASE+0x10000. One of the SMM initialization from processor perspective is to relocate and program the new SMBASE (in TSEG range) for each processor. When the SMBASE relocation happens in a PEI module, the PEI module shall produce the SMM_BASE_HOB in HOB database which tells the PiSmmCpuDxeSmm driver (runs at a later phase) about the new SMBASE for each processor. PiSmmCpuDxeSmm driver installs the SMI handler at the SMM_BASE_HOB.SmBase[Index]+0x8000 for processor Index. When the HOB doesn't exist, PiSmmCpuDxeSmm driver shall relocate and program the new SMBASE itself. This patch adds the SMM Base HOB for any PEI module to do the SmBase relocation ahead of PiSmmCpuDxeSmm driver and store the relocated SmBase address in array for each processor. Cc: Eric Dong <eric.dong@intel.com> Cc: Ray Ni <ray.ni@intel.com> Cc: Zeng Star <star.zeng@intel.com> Cc: Laszlo Ersek <lersek@redhat.com> Cc: Gerd Hoffmann <kraxel@redhat.com> Cc: Rahul Kumar <rahul1.kumar@intel.com> Signed-off-by: Jiaxin Wu <jiaxin.wu@intel.com> Acked-by: Gerd Hoffmann <kraxel@redhat.com> Reviewed-by: Ray Ni <ray.ni@Intel.com>
* UefiCpuPkg: Apply uncrustify changesMichael Kubacki2021-12-074-4/+4
| | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3737 Apply uncrustify changes to .c/.h files in the UefiCpuPkg package Cc: Andrew Fish <afish@apple.com> Cc: Leif Lindholm <leif@nuviainc.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com> Reviewed-by: Ray Ni <ray.ni@intel.com>
* UefiCpuPkg: Add definitions for EDKII microcode patch HOBHao A Wu2020-01-021-0/+44
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | REF:https://bugzilla.tianocore.org/show_bug.cgi?id=2430 This commit will add the definitions for EDKII microcode patch HOB. The intention of adding this HOB is to provide a scheme to store the below information: A. The base address and size of the microcode patches that are being loaded (from flash) into memory; B. The information of detected microcode patch for each processor within the system. The producer of the HOB will be the UefiCpuPkg/MpInitLib (where the load, detect and apply of the microcode happen). The consumer of the HOB can be modules that want to detect/apply the microcode patch by themselves again later during the boot flow. Cc: Eric Dong <eric.dong@intel.com> Cc: Ray Ni <ray.ni@intel.com> Cc: Laszlo Ersek <lersek@redhat.com> Cc: Star Zeng <star.zeng@intel.com> Cc: Siyuan Fu <siyuan.fu@intel.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Signed-off-by: Hao A Wu <hao.a.wu@intel.com> Reviewed-by: Ray Ni <ray.ni@intel.com> Reviewed-by: Eric Dong <eric.dong@intel.com>
* UefiCpuPkg: Replace BSD License with BSD+Patent LicenseMichael D Kinney2019-04-093-21/+3
| | | | | | | | | | | | | | | | | | | | | https://bugzilla.tianocore.org/show_bug.cgi?id=1373 Replace BSD 2-Clause License with BSD+Patent License. This change is based on the following emails: https://lists.01.org/pipermail/edk2-devel/2019-February/036260.html https://lists.01.org/pipermail/edk2-devel/2018-October/030385.html RFCs with detailed process for the license change: V3: https://lists.01.org/pipermail/edk2-devel/2019-March/038116.html V2: https://lists.01.org/pipermail/edk2-devel/2019-March/037669.html V1: https://lists.01.org/pipermail/edk2-devel/2019-March/037500.html Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com> Reviewed-by: Eric Dong <eric.dong@intel.com> Reviewed-by: Ray Ni <ray.ni@intel.com>
* IntelSiliconPkg: Move MicrocodeUpdate from UefiCpuPkgStar Zeng2017-11-301-21/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=540 To consume FIT table for Microcode update, UefiCpuPkg/Feature/Capsule/MicrocodeUpdateDxe needs to be updated to consume IntelSiliconPkg/Include/IndustryStandard/FirmwareInterfaceTable.h, but UefiCpuPkg could not depend on IntelSiliconPkg. Since the Microcode update feature is specific to Intel, we can first move the Microcode update feature code from UefiCpuPkg to IntelSiliconPkg [first step], then update the code to consume FIT table [second step]. This patch series is for the first step. Note: No any code change in this patch, just move. Next patch will update MicrocodeUpdate to build with the package. Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Eric Dong <eric.dong@intel.com> Cc: Laszlo Ersek <lersek@redhat.com> Regression-tested-by: Yonghong Zhu <yonghong.zhu@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Star Zeng <star.zeng@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com> Reviewed-by: Eric Dong <eric.dong@intel.com> Acked-by: Laszlo Ersek <lersek@redhat.com>
* UefiCpuPkg/CpuFeatures: Change files format to DOSJeff Fan2017-04-052-52/+52
| | | | | | Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com>
* UefiCpuPkg: Add GUID gEdkiiCpuFeaturesInitDoneGuidJeff Fan2017-03-221-0/+26
| | | | | | | | | | | | | | | | GUID gEdkiiCpuFeaturesInitDoneGuid is used to indicate if CPU features have been initialized. On PEI phase, one gEdkiiCpuFeaturesInitDoneGuid PPI will be installed after CPU features initialized. On DXE phase, one gEdkiiCpuFeaturesInitDoneGuid Protocol will be installed after CPU features initialized. Cc: Feng Tian <feng.tian@intel.com> Cc: Michael Kinney <michael.d.kinney@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Feng Tian <feng.tian@intel.com>
* UefiCpuPkg: Add GUID gEdkiiCpuFeaturesSetDoneGuidJeff Fan2017-03-221-0/+26
| | | | | | | | | | | | | | | | GUID gEdkiiCpuFeaturesSetDoneGuid is used to indicate if CPU feature related setting are set finished. For example, PCD PcdCpuFeaturesUserConfiguration. On PEI phase, one gEdkiiCpuFeaturesSetDoneGuid PPI will be installed after platform set CPU feature setting. On DXE phase, one gEdkiiCpuFeaturesSetDoneGuid Protocol will be installed after platform set CPU feature setting. Cc: Feng Tian <feng.tian@intel.com> Cc: Michael Kinney <michael.d.kinney@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Feng Tian <feng.tian@intel.com>
* UefiCpuPkg: Add STM GUIDs, Protocols, and PCDsMichael Kinney2016-12-191-0/+30
| | | | | | | | | | | | | | | | * Add GUIDed HOB that described MSEG region in SMRAM * Add SM Monitor Init Protocol * Add PCD to configure size of SMM exception stack * Add PCD to configure MSEG region size if it is not described by the gMsegSmramGuid GUIDed HOB. Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Jeff Fan <jeff.fan@intel.com> Cc: Feng Tian <feng.tian@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Michael Kinney <michael.d.kinney@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com> Reviewed-by: Jeff Fan <jeff.fan@intel.com>
* UefiCpuPkg/Include: Add Microcode FMP definition.Jiewen Yao2016-11-081-0/+21
It defined ImageTypeId for Microcode. Cc: Jeff Fan <jeff.fan@intel.com> Cc: Feng Tian <feng.tian@intel.com> Cc: Star Zeng <star.zeng@intel.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <liming.gao@intel.com> Cc: Chao Zhang <chao.b.zhang@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jiewen Yao <jiewen.yao@intel.com> Reviewed-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Michael Kinney <michael.d.kinney@intel.com>
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