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* UefiCpuPkg: Add dynamic type for PcdCpuMaxLogicalProcessorNumberJeff Fan2016-03-041-5/+4
| | | | | | | | | | | | | Currently, PcdCpuMaxLogicalProcessorNumber only supports fixed type. There are some requests on this PCD to support dynamic type also. For example, platform may dynamically set this PCD to actual processor count to save memory or improve boot performance. Cc: Feng Tian <feng.tian@intel.com> Cc: Michael Kinney <michael.d.kinney@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Feng Tian <feng.tian@intel.com>
* UefiCpuPkg: Add PCD PcdCpuApTargetCstateJeff Fan2015-12-181-0/+5
| | | | | | | | | | | | | | | | | | | | | | This new PCD is used to specify the AP C-state value by MWAIT instruction. More deeper C-state means more longer latency time when APs exiting from MWAIT state. Platforms need to balance the performance and power saving to find the proper C-state for APs. Also, some processor may not ready for the deepest C-state at the beginning. Platform also could choose the proper chance to place AP into the deeper C-state by set this PCD before hand-off to OS. Contributed-under: TianoCore Contribution Agreement 1.0 Cc: Feng Tian <feng.tian@intel.com> Cc: Michael Kinney <michael.d.kinney@intel.com> Cc: Jordan Justen <jordan.l.justen@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Michael Kinney <michael.d.kinney@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@19342 6f19259b-4bc3-4df7-8a09-765794883524
* UefiCpuPkg: Add PCD PcdCpuApLoopModeJeff Fan2015-12-181-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | This new PCD is used to specify the AP loop mode during POST phase. The value 1 means we will place AP in the Hlt-Loop state by HLT instruction. BSP need to send INIT-SIPI-SIPI to wake up APs. The value 2 means we will place AP in the deepest C-state by MWAIT instruction. BSP need to modify the monitor buffer by MONITOR instruction to wake up APs. The value 3 means we will place AP in the Run-loop state. APs are running. BSP need to write one semaphore to wake up APs. Contributed-under: TianoCore Contribution Agreement 1.0 Cc: Feng Tian <feng.tian@intel.com> Cc: Michael Kinney <michael.d.kinney@intel.com> Cc: Jordan Justen <jordan.l.justen@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff.fan@intel.com> Tested-by: Michael Kinney <michael.d.kinney@intel.com> Reviewed-by: Michael Kinney <michael.d.kinney@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@19341 6f19259b-4bc3-4df7-8a09-765794883524
* UefiCpuPkg/MtrrLib: Add PCD PcdCpuNumberOfReservedVariableMtrrsJeff Fan2015-12-081-0/+5
| | | | | | | | | | | | | | | | | | | | | | Current MtrrLib reserves 2 variable MTRRs for some legacy OS boot (CSM boots) may require some MTRRs to be reserved for OS use. But UEFI OS boot will not use MTRRs. Per Scott's suggestion in link: http://article.gmane.org/gmane.comp.bios.edk2.devel/4099 Add one PCD PcdCpuNumberOfReservedVariableMtrrs to specify the number of variable MTRRs reserved for OS use. Setting its default value to 2 is for back-compatibility. Cc: Scott Duplichan <scott@notabs.org> Cc: Feng Tian <feng.tian@intel.com> Cc: Michael Kinney <michael.d.kinney@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff.fan@intel.com> Suggested-by: Scott Duplichan <scott@notabs.org> Reviewed-by: Feng Tian <feng.tian@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@19151 6f19259b-4bc3-4df7-8a09-765794883524
* UefiCpuPkg: Add PiSmmCpuDxeSmm module no IA32/X64 filesMichael Kinney2015-10-191-6/+102
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add module that initializes a CPU for the SMM environment and installs the first level SMI handler. This module along with the SMM IPL and SMM Core provide the services required for DXE_SMM_DRIVERS to register hardware and software SMI handlers. CPU specific features are abstracted through the SmmCpuFeaturesLib Platform specific features are abstracted through the SmmCpuPlatformHookLib Several PCDs are added to enable/disable features and configure settings for the PiSmmCpuDxeSmm module Changes between [PATCH v1] and [PATCH v2]: 1) Swap PTE init order for QEMU compatibility. Current PTE initialization algorithm works on HW but breaks QEMU emulator. Update the PTE initialization order to be compatible with both. 2) Update comment block that describes 32KB SMBASE alignment requirement to match contents of Intel(R) 64 and IA-32 Architectures Software Developer's Manual 3) Remove BUGBUG comment and call to ClearSmi() that is not required. SMI should be cleared by root SMI handler. [jeff.fan@intel.com: Fix code style issues reported by ECC] Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Michael Kinney <michael.d.kinney@intel.com> Cc: Laszlo Ersek <lersek@redhat.com> Cc: Paolo Bonzini <pbonzini@redhat.com> [pbonzini@redhat.com: InitPaging: prepare PT before filling in PDE] Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Acked-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Jeff Fan <jeff.fan@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18645 6f19259b-4bc3-4df7-8a09-765794883524
* UefiCpuPkg: Update DEC/DSC files for new includes and librariesMichael Kinney2015-10-191-1/+12
| | | | | | | | | | | | | | | | | | | | Add SmmCpuPlatformHookLib library class declaration Add SmmCpuFeaturesLib library class declaration Add gEfiSmmCpuServiceProtocolGuid protocol declaration Build SmmCpuPlatformHookLibNull library instance Build SmmCpuFeaturesLib library instance Changes between [PATCH v1] and [PATCH v2]: 1) Use module type specific CpuExceptionHandlerLib in DSC file instead of Null library instance Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Michael Kinney <michael.d.kinney@intel.com> Cc: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Jeff Fan <jeff.fan@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18644 6f19259b-4bc3-4df7-8a09-765794883524
* UefiCpuPkg: Add SecCore module and supporting library class and PCDMichael Kinney2015-10-191-0/+9
| | | | | | | | | | | | | Add declaration of PlatformSecLib library class to DEC file Add declaration of PcdPeiTemporaryRamStackSize PCD to DEC/UNI file Add build of PlatformSecLibNull to DSC file Add build of SecCore to DSC file Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Michael Kinney <michael.d.kinney@intel.com> Reviewed-by: Jeff Fan <jeff.fan@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18637 6f19259b-4bc3-4df7-8a09-765794883524
* UefiCpuPkg: Add microcode PCDsJeff Fan2015-07-151-0/+6
| | | | | | | | | | | | Add PCDs PcdCpuMicrocodePatchAddress and PcdCpuMicrocodePatchRegionSize that are used to detect microcode patch from microcode region. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Feng Tian <feng.tian@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18000 6f19259b-4bc3-4df7-8a09-765794883524
* UefiCpuPkg: Add PcdCpuApInitTimeOutInMicroSecondsJeff Fan2015-07-151-1/+6
| | | | | | | | | | | | This PCD is used to specify timeout value for BSP to detect all APs for the first time. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Feng Tian <feng.tian@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17996 6f19259b-4bc3-4df7-8a09-765794883524
* UefiCpuPkg/CpuDxe: introduce two PCD valueChen Fan2014-11-131-0/+7
| | | | | | | | | | | introduce PCD value: PcdCpuMaxLogicalProcessorNumber and PcdCpuApStackSize, used for initialize APs stacks. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Chen Fan <chen.fan.fnst@cn.fujitsu.com> Reviewed-by: Jeff Fan <jeff.fan@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16350 6f19259b-4bc3-4df7-8a09-765794883524
* UefiCpuPkg: INF/DEC file updates to EDK II packagesGao, Liming2014-08-281-2/+13
| | | | | | | | | | | 4. PCD information in DEC file comment blocks are either incomplete or incorrect. This includes detailed description, @Prompt, @ValidRange, @ValidList, @Expression, and [Error.<TokenSpaceGuid>] validation error messages. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Gao, Liming <liming.gao@intel.com> Reviewed-by: Michael Kinney <michael.d.kinney@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15935 6f19259b-4bc3-4df7-8a09-765794883524
* Introduce one PCD PcdCpuInitIpiDelayInMicroSeconds to specify the delay ↵Jeff Fan2014-07-101-0/+2
| | | | | | | | | | | | | | value after sending out INIT IPI instead of hard code 10 MicroSeconds. Its default value is 10 millisecond per IA32 manual. Platform could customize this PCD value for performance requirement. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Kinney, Michael <michael.d.kinney@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15650 6f19259b-4bc3-4df7-8a09-765794883524
* Fix CRLF formatTian, Hot2014-01-221-46/+46
| | | | | | Signed-off-by: Tian, Hot <hot.tian@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15162 6f19259b-4bc3-4df7-8a09-765794883524
* Update UefiCpuPkg version: 0.2->0.3Jeff Fan2014-01-101-2/+2
| | | | | | | Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Hot Tian <hot.tian@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15079 6f19259b-4bc3-4df7-8a09-765794883524
* Update package version for MdeModulePkg, UefiCpuPkg.rsun32011-12-141-2/+2
| | | | | | | | | | MdeModulePkg 0.91->0.92 UefiCpuPkg 0.1->0.2 Signed-off-by: rsun3 Reviewed-by: hhtian git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@12851 6f19259b-4bc3-4df7-8a09-765794883524
* Add MtrrLib and LocalApicLib declarations to the UefiCpuPkg DEC file.mdkinney2010-12-071-0/+9
| | | | git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@11128 6f19259b-4bc3-4df7-8a09-765794883524
* Add Local APIC Library class defining APIs for common Local APIC operations. ↵rsun32010-08-231-0/+7
| | | | | | Add two Local APIC library instances, one is for xAPIC mode only, the other is for x2APIC capable processors which have xAPIC and x2APIC modes. git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@10814 6f19259b-4bc3-4df7-8a09-765794883524
* Fix minor format issue in file headerqhuang82010-05-131-1/+1
| | | | git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@10488 6f19259b-4bc3-4df7-8a09-765794883524
* Update the copyright notice formathhtian2010-04-241-2/+1
| | | | git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@10429 6f19259b-4bc3-4df7-8a09-765794883524
* Minor clean up of DEC file.mdkinney2010-01-271-2/+2
| | | | git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@9842 6f19259b-4bc3-4df7-8a09-765794883524
* Introduce UefiCpuLib library class in UefiCpuPkg and add one instance of ↵qhuang82009-11-251-0/+5
| | | | | | BaseUefiCpuLib. The major purpose of this library class / instance is to provide some routines that are generic for IA32 family CPU git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@9480 6f19259b-4bc3-4df7-8a09-765794883524
* Add MTRR library for IA32 & X64 processor architectures.jljusten2009-05-271-23/+25
| | | | git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@8394 6f19259b-4bc3-4df7-8a09-765794883524
* Add UefiCpuPkg.dsc and UefiCpuPkg.dec for UefiCpuPkg.jljusten2009-02-231-0/+24
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@7609 6f19259b-4bc3-4df7-8a09-765794883524
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