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* UefiPayloadPkg: CbParseLib: Fix integer overflowPatrick Rudolph2024-01-221-1/+1
| | | | | | | | | | | | | | | | | | The IMD entry uses the 32bit start field as relative offset to root. On Ia32X64 this works fine as UINTN is also 32 bit and negative relative offsets are properly calculated due to an integer overflow. On X64 this doesn't work as UINTN is 64 bit and the offset is no longer subtracted, but it's added to the root. Fix that by sign extending the start field to 64 bit. Test: Booting UefiPayloadPkg still works on Ia32X64 and now also works on X64. Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com> Reviewed-by: Gua Guo <gua.guo@intel.com> Reviewed-by: Sean Rhodes <sean@starlabs.systems>
* UefiPayloadPkg/Hob: Integer Overflow in CreateHob()Gua Guo2024-01-161-0/+43
| | | | | | | | | | | | | | | | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4166 Fix integer overflow in various CreateHob instances. Fixes: CVE-2022-36765 The CreateHob() function aligns the requested size to 8 performing the following operation: ``` HobLength = (UINT16)((HobLength + 0x7) & (~0x7)); ``` No checks are performed to ensure this value doesn't overflow, and could lead to CreateHob() returning a smaller HOB than requested, which could lead to OOB HOB accesses. Reported-by: Marc Beatove <mbeatove@google.com> Cc: Guo Dong <guo.dong@intel.com> Cc: Sean Rhodes <sean@starlabs.systems> Cc: James Lu <james.lu@intel.com> Reviewed-by: Gua Guo <gua.guo@intel.com> Cc: John Mathew <john.mathews@intel.com> Authored-by: Gerd Hoffmann <kraxel@redhat.com> Signed-off-by: Gua Guo <gua.guo@intel.com>
* UefiPayloadPkg: Integrate UiApp and BootManagerMenuApp into MultiFvMarsX Lin2023-07-112-59/+0
| | | | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4347 To put UiApp.inf and BootManagerMenuApp.inf to proper FV(BDSFV) Cc: Guo Dong <guo.dong@intel.com> Cc: Ray Ni <ray.ni@intel.com> Cc: Sean Rhodes <sean@starlabs.systems> Reviewed-by: James Lu <james.lu@intel.com> Reviewed-by: Gua Guo <gua.guo@intel.com> Signed-off-by: MarsX Lin <marsx.lin@intel.com>
* UefiPayloadPkg: Fix boot shell issue for universal UEFI payloadGuo Dong2023-05-152-9/+78
| | | | | | | | | | | | | | | | | After moving BDS driver to a new FV for universal UEFI payload, the shell boot option path is not correct since it used the BDS FV instead of DXE FV in its device path. This patch would find the correct FV by reading shell file. It also removed PcdShellFile by using gUefiShellFileGuid. Signed-off-by: Guo Dong <guo.dong@intel.com> Cc: Ray Ni <ray.ni@intel.com> Cc: Sean Rhodes <sean@starlabs.systems> Cc: James Lu <james.lu@intel.com> Cc: Gua Guo <gua.guo@intel.com> Reviewed-by: James Lu <james.lu@intel.com> Reviewed-by: Gua Guo <gua.guo@intel.com> Reviewed-by: Mike Maslenkin <mike.maslenkin@gmail.com>
* UefiPayloadPkg: Fix issues when MULTIPLE_DEBUG_PORT_SUPPORT is truePaytonX Hsieh2023-05-023-1/+111
| | | | | | | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4427 1. Since UART speed is slower than CPU, BIOS need to check the write buffer is empty, to avoid overwrite the buffer content. 2. LPSS UART might disable MMIO space for Windows debug usage during ExitBootServices event. BIOS need to avoid access the MMIO space after ExitBootServices. Cc: Guo Dong <guo.dong@intel.com> Cc: Ray Ni <ray.ni@intel.com> Cc: Sean Rhodes <sean@starlabs.systems> Cc: James Lu <james.lu@intel.com> Reviewed-by: Gua Guo <gua.guo@intel.com> Signed-off-by: PaytonX Hsieh <paytonx.hsieh@intel.com>
* UefiPayloadPkg: Update code to be more C11 compliant by using __func__Rebecca Cran2023-04-101-2/+2
| | | | | | | | | | | | | | __FUNCTION__ is a pre-standard extension that gcc and Visual C++ among others support, while __func__ was standardized in C99. Since it's more standard, replace __FUNCTION__ with __func__ throughout UefiPayloadPkg. Signed-off-by: Rebecca Cran <rebecca@bsdio.com> Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com> Reviewed-by: Ard Biesheuvel <ardb@kernel.org> Reviewed-by: Gua Guo <gua.guo@intel.com> Reviewed-by: James Lu <james.lu@intel.com>
* UefiPayloadPkg: remove the change that get platform specific logicMarsX Lin2023-02-232-28/+0
| | | | | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4241 Since UefiPayloadPkg had supported multiple firmware volume, remove the platform specific logic via protocol Cc: Ray Ni <ray.ni@intel.com> Cc: Sean Rhodes <sean@starlabs.systems> Cc: Gua Guo <gua.guo@intel.com> Reviewed-by: James Lu <james.lu@intel.com> Reviewed-by: Guo Dong <guo.dong@intel.com> Signed-off-by: MarsX Lin <marsx.lin@intel.com>
* UefiPayloadPkg: Fix debug print error level hob not save correctNing Feng2023-01-101-1/+1
| | | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4264 Fix debug print error level hob not save correct DebugPrintErrorlevel Should cover the case: Header.Length == UNIVERSAL_PAYLOAD_SIZEOF_THROUGH_FIELD () Cc: Ray Ni <ray.ni@intel.com> Cc: Sean Rhodes <sean@starlabs.systems> Cc: James Lu <james.lu@intel.com> Cc: Gua Guo <gua.guo@intel.com> Signed-off-by: Ning Feng <ning.feng@intel.com> Reviewed-by: Gua Guo <gua.guo@intel.com>
* UefiPayloadPkg/SerialPortLib: Enhance multi port behaviourKavya2022-12-201-6/+35
| | | | | | | | | | | | | | Add condition to return success if mUartCount is greater than zero in SerialPortInitialize() to avoid filling mUartInfo with the same hob data when SerialPortInitialize() is called multiple times. Also add proper conditions in SerialPortRead function to read the data properly from multiple UART's. Cc: Guo Dong <guo.dong@intel.com> Cc: Ray Ni <ray.ni@intel.com> Cc: James Lu <james.lu@intel.com> Reviewed-by: Gua Guo <gua.guo@intel.com> Signed-off-by: Kavya <k.kavyax.sravanthi@intel.com>
* UefiPayloadPkg: Implement a new SerialPortLib instanceKavya2022-09-072-0/+854
| | | | | | | | | | | | | Add new Serial port library instance that consumes the HOB defined in MdeModulePkg/Include/UniversalPayload/SerialPortInfo.h to support multiple UART's. Reviewed-by: Guo Dong <guo.dong@intel.com> Cc: Ray Ni <ray.ni@intel.com> Cc: Sean Rhodes <sean@starlabs.systems> Cc: James Lu <james.lu@intel.com> Reviewed-by: Gua Guo <gua.guo@intel.com> Signed-off-by: Kavya <k.kavyax.sravanthi@intel.com>
* UefiPayloadPkg: Fix Coverity report defectJames Lu2022-08-231-2/+2
| | | | | | | | | | https://bugzilla.tianocore.org/show_bug.cgi?id=4018 Coverity report FORWARD_NULL and OVERFLOW_BEFORE_WIDEN potential defect in UefiPayloadPkg. Signed-off-by: Gregx Yeh <gregx.yeh@intel.com> Reviewed-by: Guo Dong <guo.dong@intel.com> Reviewed-by: James Lu <james.lu@intel.com>
* UefiPayloadPkg: Return PciRootBridges instead of NULLKavya2022-08-231-2/+2
| | | | | | | | | | Return PciRootBridges instead of NULL and set PcdPciDisableBusEnumeration to FALSE when root bridge count is zero. Reviewed-by: Guo Dong <guo.dong@intel.com> Reviewed-by: Gua Guo <gua.guo@intel.com> Signed-off-by: Kavya <k.kavyax.sravanthi@intel.com>
* UefiPayloadPkg: Add a Macro to enable Boot LogoSean Rhodes2022-08-032-0/+10
| | | | | | | | | Add a macro called BOOTSPLASH_IMAGE, which when enabled, will display a logo at boot time. Cc: Guo Dong <guo.dong@intel.com> Cc: Ray Ni <ray.ni@intel.com> Signed-off-by: Sean Rhodes <sean@starlabs.systems>
* UefiPayloadPkg/PlatformBootManagerLib: Correct spacing in boot promptSean Rhodes2022-08-031-1/+1
| | | | | | | | Cc: Guo Dong <guo.dong@intel.com> Cc: Ray Ni <ray.ni@intel.com> Cc: Maurice Ma <maurice.ma@intel.com> Cc: Benjamin You <benjamin.you@intel.com> Signed-off-by: Sean Rhodes <sean@starlabs.systems>
* UefiPayloadPkg: Add support for logging to CBMEM consoleBenjamin Doron2022-07-272-0/+293
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | Writes TianoCore debug logs into the CBMEM console ringbuffer, from where the user can retrieve them with the `cbmem` userspace utility. The intention is to aid in debugging non-fatal issues even in release builds, or simply make TianoCore's logs available to those interested. Consequently, MDEPKG_NDEBUG must be masked. As an in-memory debug logging library, ASSERTs must be non-fatal to be seen, so they neither dead-loop nor create a breakpoint. It is assumed that ASSERT() neither enforces fatal conditions nor security integrity, as release builds do not call DebugAssert() from the ASSERT macro. More detailed debug logs are produced with the DEBUG_CODE macro, but this guards other debug-related code throughout the codebase. To avoid changing behaviour on release builds, this is only set for debug builds. Tested on QEMU, dumping the appropriate memory region in the UEFI shell shows the TianoCore log. An improved revision of the debug library used in several coreboot-related EDK2 forks, including MrChromebox's. Previous revisions also tested on an Acer Aspire VN7-572G laptop. Cc: Guo Dong <guo.dong@intel.com> Cc: Ray Ni <ray.ni@intel.com> Cc: Maurice Ma <maurice.ma@intel.com> Cc: Benjamin You <benjamin.you@intel.com> Cc: Sean Rhodes <sean@starlabs.systems> Signed-off-by: Benjamin Doron <benjamin.doron00@gmail.com>
* UefiPayloadPkg/PlatformBootManagerLib: Evenly space boot promptSean Rhodes2022-07-161-4/+4
| | | | | | | | | | | | | Add 4 spaces before the boot prompt "F2 or Down..." so that the spacing is equadistant from the top, which is spaced with a `\n`, and the left. Cc: Guo Dong <guo.dong@intel.com> Cc: Ray Ni <ray.ni@intel.com> Cc: Maurice Ma <maurice.ma@intel.com> Cc: Benjamin You <benjamin.you@intel.com> Signed-off-by: Sean Rhodes <sean@starlabs.systems> Reviewed-by: Guo Dong <guo.dong@intel.com>
* UefiPayloadPkg: Connect all root bridge in PlatformBootManagerBeforeConsoleLiu, Zhiguang2022-05-132-35/+15
| | | | | | | | | | | | Some ConIn or ConOut device may not in the first root bridge, so connect all root bridge before detect ConIn and ConOut device. Reviewed-by: Guo Dong <guo.dong@intel.com> Reviewed-by: Ray Ni <ray.ni@intel.com> Cc: Maurice Ma <maurice.ma@intel.com> Cc: Benjamin You <benjamin.you@intel.com> Cc: Sean Rhodes <sean@starlabs.systems> Signed-off-by: Zhiguang Liu <zhiguang.liu@intel.com>
* UefiPayloadPkg: Add Serial IO device path according to related protocolLiu, Zhiguang2022-05-133-107/+41
| | | | | | | | | | | | | | Current code follow some rules to check if the PCI device connected to a serial port device, but some platform or hardware doesn't follow such rule. By locating gEfiSerialIoProtocolGuid protocol, we can find the related device path. Reviewed-by: Guo Dong <guo.dong@intel.com> Reviewed-by: Ray Ni <ray.ni@intel.com> Cc: Maurice Ma <maurice.ma@intel.com> Cc: Benjamin You <benjamin.you@intel.com> Cc: Sean Rhodes <sean@starlabs.systems> Signed-off-by: Zhiguang Liu <zhiguang.liu@intel.com>
* UefiPayloadPkg: Simplify code logicLiu, Zhiguang2022-05-132-73/+25
| | | | | | | | | | | | | | | A little overdesign about VisitAllPciInstances function, since there are two call back functions. Simplify the code logic by combining the two call back functions, and unused parameters. Change the PROTOCOL_INSTANCE_CALLBACK to SIMPLE_PROTOCOL_INSTANCE_CALLBACK because the former is also defined in OvmfPkg. Rename it to avoid confusion. Reviewed-by: Guo Dong <guo.dong@intel.com> Reviewed-by: Ray Ni <ray.ni@intel.com> Cc: Maurice Ma <maurice.ma@intel.com> Cc: Benjamin You <benjamin.you@intel.com> Cc: Sean Rhodes <sean@starlabs.systems> Signed-off-by: Zhiguang Liu <zhiguang.liu@intel.com>
* UefiPayloadPkg: Fix PciHostBridgeLibLean Sheng Tan2022-04-101-4/+9
| | | | | | | | | | | | | | | | | | | | | Don't assume a 64bit register always holds an address greater than 4GB. Check the value in the register and decide which Aperature it should be assigned to. Fixes assertion "ASSERT [PciHostBridgeDxe] Bridge->MemAbove4G.Base >= 0x0000000100000000ULL". Tested with coreboot as bootloader on platforms that have PCI resource above 4GiB and on platforms that don't have resource above 4GiB. Cc: Guo Dong <guo.dong@intel.com> Cc: Ray Ni <ray.ni@intel.com> Cc: Maurice Ma <maurice.ma@intel.com> Cc: Benjamin You <benjamin.you@intel.com> Cc: Sean Rhodes <sean@starlabs.systems> Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com> Reviewed-by Sean Rhodes <sean@starlabs.systems> Reviewed-by: Guo Dong <guo.dong@intel.com>
* UefiPayloadPkg: Add a new DebugPrintErrorLevelLib instanceXie, Yuanhao2022-04-032-0/+119
| | | | | | | | | | | | | | It consumes the HOB defined in UefiPayloadPkg/Include/Guid/DebugPrintErrorLevel.h, and allow bootloader to config DebugPrintErrorLevel. Cc: Guo Dong <guo.dong@intel.com> Reviewed-by: Ray Ni <ray.ni@intel.com> Cc: Maurice Ma <maurice.ma@intel.com> Cc: Benjamin You <benjamin.you@intel.com> Cc: Sean Rhodes <sean@starlabs.systems> Signed-off-by: Yuanhao Xie <yuanhao.xie@intel.com>
* UefiPayloadPkg/Library/PlatformBootManagerLib: Remove broken VGA detectionPatrick Rudolph2022-03-291-9/+9
| | | | | | | | | | | | | | | | | This fixes an issue where the framebuffer provided by coreboot or slimbootloader will only work on the primary VGA device. If the framebuffer corresponds to a different device the screen will stay black. In addition, the code doesn't work for multiple graphic cards, has reference to non existing functions, and is a duplication of common code. Call EfiBootManagerConnectVideoController on every display device found, not only the legacy VGA device. This is the same as OvmfPkg does. Allows to display output on the framebuffer set up by firmware, which might not be the VGA device. Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com> Reviewed-by: Guo Dong <guo.dong@intel.com>
* UefiPayloadPkg: Fix PciHostBridgeLibPatrick Rudolph2022-03-291-119/+18
| | | | | | | | | | | | | | | | | | | | | | | | On modern platforms with TBT devices the coreboot resource allocator opens large PCI bridge MMIO windows above 4GiB to place hotplugable PCI BARs there as they won't fit below 4GiB. In addition modern GPGPU devices have very big PCI bars that doesn't fit below 4GiB. The PciHostBridgeLib made lots of assumptions about the coreboot resource allocator that were not verified at runtime and are no longer true. Remove all of the 'coreboot specific' code and implement the same logic as OvmfPkg's ScanForRootBridges. Fixes assertion "ASSERT [PciHostBridgeDxe] Bridge->Mem.Limit < 0x0000000100000000ULL". Tested with coreboot as bootloader on platforms that have PCI resources above 4GiB and on platforms that don't have resources above 4GiB. Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com> Reviewed-by: Guo Dong <guo.dong@intel.com> Reviewed-by: Maurice Ma <maurice.ma@intel.com>
* UefiPayloadPkg: Make Boot Manager Key configurableSean Rhodes2022-03-072-13/+32
| | | | | | | | | | | | | Provide a build option to use [Esc] instead of [F2] for devices such as Chromebooks that don't have F-keys. Cc: Guo Dong <guo.dong@intel.com> Cc: Ray Ni <ray.ni@intel.com> Cc: Maurice Ma <maurice.ma@intel.com> Cc: Benjamin You <benjamin.you@intel.com> Signed-off-by: Sean Rhodes <sean@starlabs.systems> Reviewed-by: Ray Ni <ray.ni@Intel.com> Reviewed-by: Guo Dong <guo.dong@intel.com>
* UefiPayloadPkg: Add missing Guid gUefiAcpiBoardInfoGuidLiu, Zhiguang2021-12-081-0/+3
| | | | | | | | | | The library PciSegmentInfoLibAcpiBoardInfo consumes the Guid gUefiAcpiBoardInfoGuid. Reviewed-by: Guo Dong <guo.dong@intel.com> Cc: Ray Ni <ray.ni@intel.com> Cc: Maurice Ma <maurice.ma@intel.com> Cc: Benjamin You <benjamin.you@intel.com> Signed-off-by: Zhiguang Liu <zhiguang.liu@intel.com>
* UefiPayloadPkg: Apply uncrustify changesMichael Kubacki2021-12-0724-1086/+1137
| | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3737 Apply uncrustify changes to .c/.h files in the UefiPayloadPkg package Cc: Andrew Fish <afish@apple.com> Cc: Leif Lindholm <leif@nuviainc.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com> Reviewed-by: Ray Ni <ray.ni@intel.com>
* UefiPayloadPkg: Change OPTIONAL keyword usage styleMichael D Kinney2021-12-074-7/+4
| | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3760 Update all use of ', OPTIONAL' to ' OPTIONAL,' for function params. Cc: Andrew Fish <afish@apple.com> Cc: Leif Lindholm <leif@nuviainc.com> Cc: Michael Kubacki <michael.kubacki@microsoft.com> Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com> Reviewed-by: Ray Ni <ray.ni@intel.com>
* UefiPayloadPkg: Remove SystemTableInfo GUID.Kesavan Balakrishnan, ThiyaguX2021-10-303-17/+65
| | | | | | | | | | | | | | | | SystemTableInfo GUID is not a Spec defined GUID. The latest SBL and CBL produces ACPI and SMBIOS table information. So removing the SystemTableInfo GUID implementation. Cc: Maurice Ma <maurice.ma@intel.com> Cc: Guo Dong <guo.dong@intel.com> Cc: Ray Ni <ray.ni@intel.com> Cc: Benjamin You <benjamin.you@intel.com> Cc: Zhiguang Liu <zhiguang.liu@intel.com> Signed-off-by: Guo Dong <guo.dong@intel.com> Signed-off-by: Thiyagu Kesavan Balakrishnan <thiyagux.kesavan.balakrishnan@intel.com> Reviewed-by: Guo Dong <guo.dong@intel.com>
* UefiPayloadPkg: Add FlashDeviceLibGuo Dong2021-10-252-0/+203
| | | | | | | | | | | | This library provides FlashDeviceLib APIs based on SpiFlashLib and consumed by FVB driver. Signed-off-by: Guo Dong <guo.dong@intel.com> Cc: Ray Ni <ray.ni@intel.com> Cc: Maurice Ma <maurice.ma@intel.com> Cc: Benjamin You <benjamin.you@intel.com> Reviewed-by: Ray Ni <ray.ni@intel.com> Reviewed-by: Benjamin You <benjamin.you@intel.com>
* UefiPayloadPkg: Add SpiFlashLibGuo Dong2021-10-255-0/+1415
| | | | | | | | | | | | | This is a common SPI Flash library used for the Intel platform that supports SPI hardware sequence. This library provides actual SPI flash operation via Intel PCH SPI controller. Signed-off-by: Guo Dong <guo.dong@intel.com> Cc: Ray Ni <ray.ni@intel.com> Cc: Maurice Ma <maurice.ma@intel.com> Cc: Benjamin You <benjamin.you@intel.com> Reviewed-by: Ray Ni <ray.ni@intel.com> Reviewed-by: Benjamin You <benjamin.you@intel.com>
* UefiPayloadPkg: Fix ECC reported issuesGuo Dong2021-10-1912-69/+44
| | | | | | | | | | | | | | | V2: Fix more header files on #ifdef variable ECC reported some issues on UefiPayloadPkg, this patch fixed most of them except several files including ElfLib\Elf32.h, coreboot.h, CbParseLib.c, etc. It also removed unused functions in ResetSystemLib and Hob.c. Signed-off-by: Guo Dong <guo.dong@intel.com> Cc: Ray Ni <ray.ni@intel.com> Cc: Maurice Ma <maurice.ma@intel.com> Cc: Benjamin You <benjamin.you@intel.com> Reviewed-by: Maurice Ma <maurice.ma@intel.com>
* UefiPayloadPkg: Replace MEMROY_ENTRY by MEMORY_ENTRYGuo Dong2021-10-192-3/+3
| | | | | | | | | | Fixes simple typo, no behavioral change. Cc: Maurice Ma <maurice.ma@intel.com> Cc: Guo Dong <guo.dong@intel.com> Cc: Benjamin You <benjamin.you@intel.com> Signed-off-by: Moritz Fischer <moritzf@google.com> Reviewed-by: Guo Dong <guo.dong@intel.com>
* UefiPayloadPkg: Fix the build issue for corebootGuo Dong2021-10-151-2/+2
| | | | | | | | | | | | | V2: Fix GCC build issue. There is typo in previous change caused coreboot build failure. This patch fixed the build issue. Cc: Ray Ni <ray.ni@intel.com> Cc: Maurice Ma <maurice.ma@intel.com> Cc: Benjamin You <benjamin.you@intel.com> Signed-off-by: Guo Dong <guo.dong@intel.com> Reviewed-by: Maurice Ma <maurice.ma@intel.com> Reviewed-by: Ray Ni <ray.ni@intel.com>
* UefiPayloadPkg: Add PCI root bridge info hob support for SBLMa, Maurice2021-10-133-2/+62
| | | | | | | | | | | | | | | | | | | | Current UefiPayloadPkg can suport PCI root bridge info HOB provided by bootloader. For UniversalPayload, bootloader can directly provide this HOB for payload consumption. However, for legacy UEFI payload, it is required to migrate the HOB information from bootloader HOB space to UEFI payload HOB space. This patch added the missing part for the bootloader ParseLib in order to support both legacy and universal UEFI payload. This patch was tested on Slim Bootloader with latest UEFI payload, and it worked as expected. Cc: Ray Ni <ray.ni@intel.com> Cc: Guo Dong <guo.dong@intel.com> Cc: Benjamin You <benjamin.you@intel.com> Signed-off-by: Maurice Ma <maurice.ma@intel.com> Reviewed-by: Guo Dong <guo.dong@intel.com>
* UefiPayloadPkg: Remove asm code and sharing librariesGuo Dong2021-09-307-203/+74
| | | | | | | | | | | | | | | | | Remove asm code used for payload entry. Use patchable PCD instead a fixed PCD PcdPayloadStackTop to avoid potential conflict. Based on the removal, use same HobLib regardless UNIVERSAL_PAYLOAD. Use same PlatformHookLib regardless UNIVERSAL_PAYLOAD. The original PlatformHookLib was removed and UniversalPayloadPlatformHookLib was rename to new PlatformHookLib. Cc: Ray Ni <ray.ni@intel.com> Cc: Maurice Ma <maurice.ma@intel.com> Cc: Benjamin You <benjamin.you@intel.com> Signed-off-by: Guo Dong <guo.dong@intel.com> Reviewed-by: Ray Ni <ray.ni@intel.com>
* UefiPayloadPkg: Use dummy constructor for PlatformHookLibGuo Dong2021-09-292-1/+18
| | | | | | | | | | | | The Library constructor is only used for library dependency. So use a dummy function to make it clear instead of using an actual function. Cc: Ray Ni <ray.ni@intel.com> Cc: Maurice Ma <maurice.ma@intel.com> Cc: Benjamin You <benjamin.you@intel.com> Reviewed-by: Ray Ni <ray.ni@intel.com> Signed-off-by: Guo Dong <guo.dong@intel.com>
* UefiPayloadPkg: Fix the build error when enable Core ci for UefiPayloadPkgduntan2021-09-011-3/+3
| | | | | | | | | | | | | | V1: Add quotes when using $(ARCH) in .dsc and .fdf file. The quotes are added due to the way by which Core ci parse the .dsc file. Add UINTN in Hob.c to fix cast from pointer to integer of different size error. V2: Delete lines which reference ShellBinPkg.The pkg doesn't exist in edk2. Cc: Guo Dong <guo.dong@intel.com> Cc: Ray Ni <ray.ni@intel.com> Cc: Maurice Ma <maurice.ma@intel.com> Cc: Benjamin You <benjamin.you@intel.com> Signed-off-by: DunTan <dun.tan@intel.com> Reviewed-by: Ray Ni <ray.ni@intel.com>
* UefiPayloadPkg: define some PCD as DynamicEX PCDZhiguang Liu2021-08-094-11/+0
| | | | | | | | | | | | | Define some PCDs as DynamicEX PCD to be used as global variable. Because PcdUartDefaultBaudRate is defined as DynamicEX, remove the code to set it in platformlib. That code was actually redundant. Reviewed-by: Guo Dong <guo.dong@intel.com> Reviewed-by: Ray Ni <ray.ni@intel.com> Cc: Maurice Ma <maurice.ma@intel.com> Cc: Benjamin You <benjamin.you@intel.com> Signed-off-by: Zhiguang Liu <zhiguang.liu@intel.com>
* UefiPayloadPkg: consume the BootManagerMenuFile HOBduntan2021-06-242-1/+56
| | | | | | | | | | | Consume the BootManagerMenuFile HOB in PlatformBootManagerLib This Lib is in UefiPayloadPkg Cc: Maurice Ma <maurice.ma@intel.com> Cc: Guo Dong <guo.dong@intel.com> Cc: Benjamin You <benjamin.you@intel.com> Reviewed-by: Guo Dong <guo.dong@intel.com> Signed-off-by: DunTan <dun.tan@intel.com>
* UefiPayloadPkg: Update the function definition of HobConstructorZhiguang Liu2021-06-241-13/+13
| | | | | | | | | | | Update the function defination of HobConstructor to align the Phit Hob structure. Cc: Maurice Ma <maurice.ma@intel.com> Cc: Guo Dong <guo.dong@intel.com> Cc: Benjamin You <benjamin.you@intel.com> Reviewed-by: Guo Dong <guo.dong@intel.com> Signed-off-by: Zhiguang Liu <zhiguang.liu@intel.com>
* UefiPayloadPkg: Add a separate PlatformHookLib for Universal PayloadZhiguang Liu2021-06-242-0/+123
| | | | | | | | | | | Add a new separate PlatformHookLib for Universal Payload to consume Guid Hob gUniversalPayloadSerialPortInfoGuid to get serial port information Cc: Maurice Ma <maurice.ma@intel.com> Cc: Guo Dong <guo.dong@intel.com> Cc: Benjamin You <benjamin.you@intel.com> Reviewed-by: Guo Dong <guo.dong@intel.com> Signed-off-by: Zhiguang Liu <zhiguang.liu@intel.com>
* UefiPayloadPkg: Add HobLib for UniversalPayloadZhiguang Liu2021-06-249-2/+800
| | | | | | | | | | | | | | | | | | | | | | | | | For payload entry, use PayloadEntryHobLib as HobLib and payload entry should initialize hob base. For DxeCore, use new added DxeHobLib as HobLib, and DxeCore will initialize hob base. For Dxe Driver, use new added DxeHobLib as HobLib, and use DxeHobListLib to initialize hob base. Adding a new library DxeHobLib + DxeHobListLib instead of using the DxeHobLib.inf in MdePkg is because the constructor needed be separated from DxeHobLib. If not, when building UefiPayloadPkg, the dependency chain is as below: DebugLib -> SerialPortLib -> PlatformHookLib -> HobLib -> DebugLib Each library has a constructor, and this becomes a constructor circle. To break the circle, separate the constructor from the HobLib as a new DxeHobListLib, which won't depend on DebugLib. Cc: Maurice Ma <maurice.ma@intel.com> Cc: Guo Dong <guo.dong@intel.com> Cc: Benjamin You <benjamin.you@intel.com> Reviewed-by: Guo Dong <guo.dong@intel.com> Signed-off-by: Ray Ni <ray.ni@intel.com> Signed-off-by: Zhiguang Liu <zhiguang.liu@intel.com>
* UefiPayloadPkg: UefiPayload retrieve PCI root bridge from Guid HobZhiguang Liu2021-06-164-7/+161
| | | | | | | | | | | | | | UefiPayload parse gUniversalPayloadPciRootBridgeInfoGuid Guid Hob to retrieve PCI root bridges information. gUniversalPayloadPciRootBridgeInfoGuid Guid Hob should be created by Bootloader. Cc: Maurice Ma <maurice.ma@intel.com> Cc: Guo Dong <guo.dong@intel.com> Cc: Benjamin You <benjamin.you@intel.com> Reviewed-by: Guo Dong <guo.dong@intel.com> Tested-by: Patrick Rudolph <patrick.rudolph@9elements.com> Signed-off-by: Zhiguang Liu <zhiguang.liu@intel.com>
* UefiPayloadPkg: Get platform specific logic via protocol for BDSZhiguang Liu2021-06-162-2/+26
| | | | | | | | | | | | | | Currently, BDS driver will link a PlatformBootManagerLib, which contains platform specific logic. This patch get the platform specific logic from a protocol, so that platform logic for Boot manager can be in another binary. Cc: Maurice Ma <maurice.ma@intel.com> Cc: Guo Dong <guo.dong@intel.com> Cc: Benjamin You <benjamin.you@intel.com> Reviewed-by: Guo Dong <guo.dong@intel.com> Signed-off-by: Zhiguang Liu <zhiguang.liu@intel.com>
* UefiPayloadPkg/PlatformBootManager: Connect console after EndOfDxeGuo Dong2021-02-121-2/+2
| | | | | | | | | | | Currently the console is connected before EndOfDxe causing OptionsROMs to be loaded, but their drivers aren't used and thus no GOP is installed. To make use of 3rdparty OptionROMs connect the console after EndOfDxe. Tested on Intel CFL board using Nvidia Quadro GPU. Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com> Reviewed-by: Guo Dong <guo.dong@intel.com> Reviewed-by: Sunny Wang <sunnywang@hpe.com>
* UefiPayloadPkg: Remove PEI phase from PayloadGuo Dong2020-12-022-0/+745
| | | | | | | | | | | | | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3100 It is not necessary to have a PEI phase in the UEFI payload since no specific PEI task is required. This patch adds a UefiPayloadEntry driver to get UEFI Payload required information from the bootloaders, convert them into a HOB list, load DXE core and transfer control to it. Here is the change details: 1) Removed PEI phase, including Peicore, BlSupportPei, SecCore, etc. 2) Added UefiPayloadEntry driver. this is the only driver before DXE core. 3) Added Pure X64 support, dropped Pure IA32 (Could add later if required) 64bit payload with 32bit entry point is still supported. 4) Use one DSC file UefiPayloadPkg.dsc to support X64 and IA32X64 build. Removed UefiPayloadIa32.dsc and UefiPayloadIa32X64.dsc Tested with SBL and coreboot on QEMU. Signed-off-by: Guo Dong <guo.dong@intel.com> Reviewed-by: Maurice Ma <maurice.ma@intel.com> Reviewed-by: Benjamin You <benjamin.you@intel.com>
* UefiPayloadPkg/Pci: Use the PCIE Base Addr stored in AcpiBoardInfo HOBRay Ni2020-06-242-0/+95
| | | | | | | | | | | | | | | | Today's UefiPayloadPkg always uses 0xE0000000 as the PCIE base address and ignores the value set in AcpiBoardInfo HOB created by the boot loader. This makes the payload binary cannot work in environment where the PCIE base address set by boot loader doesn't equal to 0xE0000000. The patch enhances UefiPayloadPkg so that the PCIE base address set by boot loader in the AcpiBoardInfo HOB is used. Signed-off-by: Ray Ni <ray.ni@intel.com> Reviewed-by: Maurice Ma <maurice.ma@intel.com> Reviewed-by: Guo Dong <guo.dong@intel.com> Cc: Benjamin You <benjamin.you@intel.com>
* UefiPayloadPkg: remove EnterS3WithImmediateWake () from ResetSystemLibArd Biesheuvel2020-01-101-18/+0
| | | | | | | | EnterS3WithImmediateWake () no longer has any callers, so remove it from ResetSystemLib. Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Guo Dong <guo.dong@intel.com>
* UefiPayloadPkg/BootManager: Add PS2 keyboard supportDong, Guo2020-01-021-5/+20
| | | | | | | | | | | | | | | | Add PS2 keyboard support. REF:https://bugzilla.tianocore.org/show_bug.cgi?id=2316 This patch adds PS2 keyboard support in boot manager, and add a build flag PS2_KEYBOARD_ENABLE for PS2 keyboard to build PS2 keyboard driver and SIO driver. Be default the build flag is not enabled since PS2 keyboard is not common used. could use -DPS2_KEYBOARD_ENABLE to enable build it if need this feature. Signed-off-by: Guo Dong <guo.dong@intel.com> Reviewed-by: Maurice Ma <maurice.ma@intel.com> Reviewed-by: Benjamin You <benjamin.you@intel.com>
* UefiPayloadPkg/PlatformBootManagerLib: Use EDKII_SERIAL_PORT_LIB_VENDOR_GUID ↵Anthony PERARD2019-06-141-1/+2
| | | | | | | | | | | | from MdeModulePkg EDKII_SERIAL_PORT_LIB_VENDOR_GUID is now defined in MdeModulePkg, simply use it. Signed-off-by: Anthony PERARD <anthony.perard@citrix.com> Message-Id: <20190606131459.1464-5-anthony.perard@citrix.com> Reviewed-by: Maurice Ma <maurice.ma@intel.com> Acked-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
generated by cgit v1.2.3 (git 2.25.1) at 2024-07-17 05:00:48 +0000