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* UefiPayloadPkg: Connect all root bridge in PlatformBootManagerBeforeConsoleLiu, Zhiguang2022-05-132-35/+15
| | | | | | | | | | | | Some ConIn or ConOut device may not in the first root bridge, so connect all root bridge before detect ConIn and ConOut device. Reviewed-by: Guo Dong <guo.dong@intel.com> Reviewed-by: Ray Ni <ray.ni@intel.com> Cc: Maurice Ma <maurice.ma@intel.com> Cc: Benjamin You <benjamin.you@intel.com> Cc: Sean Rhodes <sean@starlabs.systems> Signed-off-by: Zhiguang Liu <zhiguang.liu@intel.com>
* UefiPayloadPkg: Add Serial IO device path according to related protocolLiu, Zhiguang2022-05-133-107/+41
| | | | | | | | | | | | | | Current code follow some rules to check if the PCI device connected to a serial port device, but some platform or hardware doesn't follow such rule. By locating gEfiSerialIoProtocolGuid protocol, we can find the related device path. Reviewed-by: Guo Dong <guo.dong@intel.com> Reviewed-by: Ray Ni <ray.ni@intel.com> Cc: Maurice Ma <maurice.ma@intel.com> Cc: Benjamin You <benjamin.you@intel.com> Cc: Sean Rhodes <sean@starlabs.systems> Signed-off-by: Zhiguang Liu <zhiguang.liu@intel.com>
* UefiPayloadPkg: Simplify code logicLiu, Zhiguang2022-05-132-73/+25
| | | | | | | | | | | | | | | A little overdesign about VisitAllPciInstances function, since there are two call back functions. Simplify the code logic by combining the two call back functions, and unused parameters. Change the PROTOCOL_INSTANCE_CALLBACK to SIMPLE_PROTOCOL_INSTANCE_CALLBACK because the former is also defined in OvmfPkg. Rename it to avoid confusion. Reviewed-by: Guo Dong <guo.dong@intel.com> Reviewed-by: Ray Ni <ray.ni@intel.com> Cc: Maurice Ma <maurice.ma@intel.com> Cc: Benjamin You <benjamin.you@intel.com> Cc: Sean Rhodes <sean@starlabs.systems> Signed-off-by: Zhiguang Liu <zhiguang.liu@intel.com>
* UefiPayloadPkg: Fix the UPL build failureTan, Dun2022-05-091-3/+3
| | | | | | | | | | | | | Add double quotes to LlvmObjcopyPath. Blank space in LlvmObjcopyPath will cause build failure. This build failure is introduced by 2306555bf908 ( "UefiPayloadPkg: Fix IA32 entry build failure"). Signed-off-by: Dun Tan <dun.tan@intel.com> Reviewed-by: Ray Ni <ray.ni@intel.com> Reviewed-by: Guo Dong <guo.dong@intel.com> Cc: Benjamin You <benjamin.you@intel.com> Cc: Sean Rhodes <sean@starlabs.systems>
* UefiPayloadPkg: Add CpuLib to module INFs that depend on UefiCpuLib.Yu Pu2022-05-063-0/+3
| | | | | | | | | | | | | | There are two libraries: MdePkg/CpuLib and UefiCpuPkg/UefiCpuLib and UefiCpuPkg/UefiCpuLib will be merged to MdePkg/CpuLib. To avoid build failure, add CpuLib dependency to all modules that depend on UefiCpuLib. Cc: Guo Dong <guo.dong@intel.com> Cc: Ray Ni <ray.ni@intel.com> Cc: Maurice Ma <maurice.ma@intel.com> Cc: Benjamin You <benjamin.you@intel.com> Cc: Sean Rhodes <sean@starlabs.systems> Signed-off-by: Yu Pu <yu.pu@intel.com> Reviewed-by: Ray Ni <ray.ni@intel.com>
* UefiPayloadPkg: Add definition for PayloadCommandLine HOBduntan2022-05-062-0/+29
| | | | | | | | | | | | Add definition for UNIVERSAL_PAYLOAD_COMMAND_LINE Hob. This Hob is used to pass command Line to Payload. Signed-off-by: Dun Tan <dun.tan@intel.com> Reviewed-by: Ray Ni <ray.ni@intel.com> Reviewed-by: Guo Dong <guo.dong@intel.com> Cc: Benjamin You <benjamin.you@intel.com> Cc: Sean Rhodes <sean@starlabs.systems> Cc: Zhiguang Liu <zhiguang.liu@intel.com>
* UefiPayloadPkg: Fix IA32 entry build failureTan, Dun2022-04-221-6/+12
| | | | | | | | | | | | | The ObjCopyFlag and EntryOutputDir need to be modified when building IA32 UniversalPayload Entry Signed-off-by: Dun Tan <dun.tan@intel.com> Cc: Ray Ni <ray.ni@intel.com> Cc: Guo Dong <guo.dong@intel.com> Cc: Benjamin You <benjamin.you@intel.com> Cc: Zhiguang Liu <zhiguang.liu@intel.com> Reviewed-by: Guo Dong <guo.dong@intel.com> Reviewed-by: Ray Ni <ray.ni@intel.com>
* UefiPayloadPkg: Fix the build failureGuo Dong2022-04-141-2/+2
| | | | | | | | | | | | When Quite parameter is not provided, its default value would be "None" instead of "". So update its default value not to impact the build. Cc: Ray Ni <ray.ni@intel.com> Cc: Benjamin You <benjamin.you@intel.com> Cc: Sean Rhodes <sean@starlabs.systems> Signed-off-by: Guo Dong <guo.dong@intel.com> Acked-by: Dun Tan <dun.tan@intel.com>
* UefiPayloadPkg: Add --quiet argument to Universal Payload build scriptGuo Dong2022-04-101-2/+4
| | | | | | Signed-off-by: Sean Rhodes <sean@starlabs.systems> Reviewed-by: Guo Dong <guo.dong@intel.com> Reviewed-by: Ray Ni <ray.ni@intel.com>
* UefiPayloadPkg: Add dependency of VariableSmm driver.Li, Zhihao2022-04-101-1/+2
| | | | | | | | | | | | | | | | | | | | | REF? https://bugzilla.tianocore.org/show_bug.cgi?id=3882 UefiCpuPkg define a new Protocol with the new services SmmWaitForAllProcessor(), which can be used by SMI handler to optionally wait for other APs to complete SMM rendezvous in relaxed AP mode. VariableSmm driver need use SmmCpuRendezvousLib, So add SmmCpuRendezvousLib dependency in UefiPayloadPkg which use VariableSmm driver. Cc: Guo Dong <guo.dong@intel.com> Cc: Ray Ni <ray.ni@intel.com> Cc: Benjamin You <benjamin.you@intel.com> Cc: Sean Rhodes <sean@starlabs.systems> Cc: Siyuan Fu <siyuan.fu@intel.com> Signed-off-by: Zhihao Li <zhihao.li@intel.com> Reviewed-by: Guo Dong <guo.dong@intel.com>
* UefiPayloadPkg: Support IA32 BuildGuo Dong2022-04-101-1/+3
| | | | | | | | | | | | | The payload entry module should support to build as IA32 image beside X64 image so that it could work with 32bit bootloaders. This patch adds a option build parameter for arch selection. Cc: Ray Ni <ray.ni@intel.com> Cc: Benjamin You <benjamin.you@intel.com> Cc: Sean Rhodes <sean@starlabs.systems> Signed-off-by: Guo Dong <guo.dong@intel.com> Reviewed-by: Sean Rhodes <sean@starlabs.systems>
* UefiPayloadPkg: Fix PciHostBridgeLibLean Sheng Tan2022-04-101-4/+9
| | | | | | | | | | | | | | | | | | | | | Don't assume a 64bit register always holds an address greater than 4GB. Check the value in the register and decide which Aperature it should be assigned to. Fixes assertion "ASSERT [PciHostBridgeDxe] Bridge->MemAbove4G.Base >= 0x0000000100000000ULL". Tested with coreboot as bootloader on platforms that have PCI resource above 4GiB and on platforms that don't have resource above 4GiB. Cc: Guo Dong <guo.dong@intel.com> Cc: Ray Ni <ray.ni@intel.com> Cc: Maurice Ma <maurice.ma@intel.com> Cc: Benjamin You <benjamin.you@intel.com> Cc: Sean Rhodes <sean@starlabs.systems> Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com> Reviewed-by Sean Rhodes <sean@starlabs.systems> Reviewed-by: Guo Dong <guo.dong@intel.com>
* UefiPayloadPkg: Consume the new added DebugPrintErrorLevelLib instanceXie, Yuanhao2022-04-031-1/+1
| | | | | | | | | | | | | Change the DebugPrintErrorLevelLib instance in UefiPayloadPkg.dsc to allow bootloader to config DebugPrintErrorLevel. Cc: Guo Dong <guo.dong@intel.com> Reviewed-by: Ray Ni <ray.ni@intel.com> Cc: Maurice Ma <maurice.ma@intel.com> Cc: Benjamin You <benjamin.you@intel.com> Cc: Sean Rhodes <sean@starlabs.systems> Signed-off-by: Yuanhao Xie <yuanhao.xie@intel.com>
* UefiPayloadPkg: Change some configuration of the payloadXie, Yuanhao2022-04-031-5/+5
| | | | | | | | | | | | | | | | 1. Use PeiDxeDebugLibReportStatusCode library for DebugLib, and add ReportStatusCodeLib. 2. Remove gEfiMdeModulePkgTokenSpaceGuid.PcdSerialExtendedTxFifoSize overrided in UefiPayloadPkg.dsc. 3. Change PcdHardwareErrorRecordLevel to 1 Cc: Guo Dong <guo.dong@intel.com> Reviewed-by: Ray Ni <ray.ni@intel.com> Cc: Maurice Ma <maurice.ma@intel.com> Cc: Benjamin You <benjamin.you@intel.com> Cc: Sean Rhodes <sean@starlabs.systems> Signed-off-by: Yuanhao Xie <yuanhao.xie@intel.com>
* UefiPayloadPkg: Add a new DebugPrintErrorLevelLib instanceXie, Yuanhao2022-04-034-1/+151
| | | | | | | | | | | | | | It consumes the HOB defined in UefiPayloadPkg/Include/Guid/DebugPrintErrorLevel.h, and allow bootloader to config DebugPrintErrorLevel. Cc: Guo Dong <guo.dong@intel.com> Reviewed-by: Ray Ni <ray.ni@intel.com> Cc: Maurice Ma <maurice.ma@intel.com> Cc: Benjamin You <benjamin.you@intel.com> Cc: Sean Rhodes <sean@starlabs.systems> Signed-off-by: Yuanhao Xie <yuanhao.xie@intel.com>
* UefiPayloadPkg: Make Boot Timeout configurableGuo Dong2022-03-291-1/+2
| | | | | Signed-off-by: Sean Rhodes sean@starlabs.systems Reviewed-by: Guo Dong <guo.dong@intel.com>
* UefiPayloadPkg/Library/PlatformBootManagerLib: Remove broken VGA detectionPatrick Rudolph2022-03-291-9/+9
| | | | | | | | | | | | | | | | | This fixes an issue where the framebuffer provided by coreboot or slimbootloader will only work on the primary VGA device. If the framebuffer corresponds to a different device the screen will stay black. In addition, the code doesn't work for multiple graphic cards, has reference to non existing functions, and is a duplication of common code. Call EfiBootManagerConnectVideoController on every display device found, not only the legacy VGA device. This is the same as OvmfPkg does. Allows to display output on the framebuffer set up by firmware, which might not be the VGA device. Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com> Reviewed-by: Guo Dong <guo.dong@intel.com>
* UefiPayloadPkg: Fix PciHostBridgeLibPatrick Rudolph2022-03-291-119/+18
| | | | | | | | | | | | | | | | | | | | | | | | On modern platforms with TBT devices the coreboot resource allocator opens large PCI bridge MMIO windows above 4GiB to place hotplugable PCI BARs there as they won't fit below 4GiB. In addition modern GPGPU devices have very big PCI bars that doesn't fit below 4GiB. The PciHostBridgeLib made lots of assumptions about the coreboot resource allocator that were not verified at runtime and are no longer true. Remove all of the 'coreboot specific' code and implement the same logic as OvmfPkg's ScanForRootBridges. Fixes assertion "ASSERT [PciHostBridgeDxe] Bridge->Mem.Limit < 0x0000000100000000ULL". Tested with coreboot as bootloader on platforms that have PCI resources above 4GiB and on platforms that don't have resources above 4GiB. Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com> Reviewed-by: Guo Dong <guo.dong@intel.com> Reviewed-by: Maurice Ma <maurice.ma@intel.com>
* UefiPayloadPkg: Fix architecture in the build instructionAkihiko Odaki2022-03-291-1/+1
| | | | | | Signed-off-by: Akihiko Odaki <akihiko.odaki@gmail.com> Reviewed-by: Guo Dong <guo.dong@intel.com> Reviewed-by: Ray Ni <ray.ni@intel.com>
* UefiPayloadPkg: Fix build errorGuo Dong2022-03-291-0/+4
| | | | | | | | | | | | | | | On windows build, need add "-DPLATFORMX64_ENABLE=TRUE" in the build command line beside -DNETWORK_DRIVER_ENABLE=TRUE in order build network features. So update DSC to set PLATFORMX64_ENABLE to TRUE when building network feature. On Linux build, DSC file should not have PcdAllowHttpConnections without building network feature, else it would cause build error. Signed-off-by: Guo Dong <guo.dong@intel.com> Cc: Ray Ni <ray.ni@intel.com> Cc: Maurice Ma <maurice.ma@intel.com> Cc: Benjamin You <benjamin.you@intel.com> Reviewed-by Sean Rhodes <sean@starlabs.systems>
* UefiPayloadPkg/UefiPayloadPkg.ci.yaml: Remove duplicated entryPatrick Rudolph2022-03-291-1/+0
| | | | | | | | | | | | | | Remove a duplicated entry to fix a CI error. Cc: Guo Dong <guo.dong@intel.com> Cc: Ray Ni <ray.ni@intel.com> Cc: Maurice Ma <maurice.ma@intel.com> Cc: Benjamin You <benjamin.you@intel.com> Cc: Sean Rhodes <sean@starlabs.systems> Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com> Reviewed-by: Guo Dong <guo.dong@intel.com> Acked-by: Ray Ni <ray.ni@intel.com> Reviewed-by: Dun Tan <dun.tan@intel.com>
* UefiPayloadPkg: Hookup SD/MMC timeoutSean Rhodes2022-03-171-0/+2
| | | | | | | | | | | | Hook SD_MMC_TIMEOUT build option to SdMmcGenericTimeoutValue PCD. Cc: Guo Dong <guo.dong@intel.com> Cc: Ray Ni <ray.ni@intel.com> Cc: Maurice Ma <maurice.ma@intel.com> Cc: Benjamin You <benjamin.you@intel.com> Signed-off-by: Sean Rhodes <sean@starlabs.systems> Reviewed-by: Maurice Ma <maurice.ma@intel.com> Reviewed-by: Guo Dong <guo.dong@intel.com>
* BlSupportSmm: fix definition of SetSmrr()Sean Rhodes2022-03-071-0/+1
| | | | | | | | | | Cc: Guo Dong <guo.dong@intel.com> Cc: Ray Ni <ray.ni@intel.com> Cc: Maurice Ma <maurice.ma@intel.com> Cc: Benjamin You <benjamin.you@intel.com> Signed-off-by: Matt DeVillier <matt.devillier@gmail.com> Signed-off-by: Sean Rhodes <sean@starlabs.systems> Reviewed-by: Guo Dong <guo.dong@intel.com>
* UefiPayloadPkg: Make Boot Manager Key configurableSean Rhodes2022-03-074-13/+37
| | | | | | | | | | | | | Provide a build option to use [Esc] instead of [F2] for devices such as Chromebooks that don't have F-keys. Cc: Guo Dong <guo.dong@intel.com> Cc: Ray Ni <ray.ni@intel.com> Cc: Maurice Ma <maurice.ma@intel.com> Cc: Benjamin You <benjamin.you@intel.com> Signed-off-by: Sean Rhodes <sean@starlabs.systems> Reviewed-by: Ray Ni <ray.ni@Intel.com> Reviewed-by: Guo Dong <guo.dong@intel.com>
* UefiPayloadPkg: Fix case of protocolSean Rhodes2022-03-041-1/+1
| | | | | | | | | | | | Fix case match in <Protocol/MpService.h> to avoid build failure on Linux. Cc: Guo Dong <guo.dong@intel.com> Cc: Ray Ni <ray.ni@intel.com> Cc: Maurice Ma <maurice.ma@intel.com> Cc: Benjamin You <benjamin.you@intel.com> Signed-off-by: Sean Rhodes <sean@starlabs.systems> Reviewed-by: Guo Dong <guo.dong@intel.com>
* UefiPayloadPkg: Add build option for Above 4G MemorySean Rhodes2022-03-044-0/+52
| | | | | | | | | | | | | | | | | | When build option ABOVE_4G_MEMORY is set to true, nothing will change and EDKII will use all available memory. Setting it to false will create memory type information HOB in payload entry, so that EDKII will reserve enough memory below 4G for EDKII modules. This option is useful for bootloaders that are not fully 64-bit aware such as Qubes R4.0.4 bootloader, Zorin and Proxmox. Cc: Guo Dong <guo.dong@intel.com> Cc: Ray Ni <ray.ni@intel.com> Cc: Maurice Ma <maurice.ma@intel.com> Cc: Benjamin You <benjamin.you@intel.com> Signed-off-by: Sean Rhodes <sean@starlabs.systems> Reviewed-by: Guo Dong <guo.dong@intel.com> Reviewed-by: Ray Ni <ray.ni@intel.com>
* UefiPayloadPkg/PayloadLoaderPeim: Use INT64 as input parameterGuomin Jiang2022-03-011-1/+1
| | | | | | | | | | | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3818 It will have some potential issue when memory larger than 2G because the high memory address will be fill with 0xFFFFFFFF when do the operation of INTN + INT64 but it is 32 bit normal data in fact. Should use same data type INT64 + INT64. V3: 1. Use INT64 as input parameter because all date type is 64 bit V2: 1. Force the data type to UINTN to avoid high dword be filled with 0xFFFFFFFF 2. Keep INTN because the offset may postive or negative. Reviewed-by: Guo Dong <guo.dong@intel.com> Reviewed-by: Ray Ni <ray.ni@intel.com> Signed-off-by: Guomin Jiang <guomin.jiang@intel.com>
* UefiPayloadPkg: Use BaseCpuTimerLib for Universal Payload by defaultLiu, Zhiguang2022-01-281-5/+5
| | | | | | | | | | | | | Current, a macro CPU_TIMER_LIB_ENABLE is added to determine which timerlib is used. BaseCpuTimerLib.inf is a better way and only fit for recent CPU. Meanwhile, Universal Payload are only aimed to work with recent CPU. Therefore, for Universal Payload, use the BaseCpuTimerLib by default Cc: Guo Dong <guo.dong@intel.com> Reviewed-by: Ray Ni <ray.ni@intel.com> Cc: Maurice Ma <maurice.ma@intel.com> Cc: Benjamin You <benjamin.you@intel.com> Signed-off-by: Zhiguang Liu <zhiguang.liu@intel.com>
* UefiPayloadPkg: Not use BaseCpuTimerLib by default.Liu, Zhiguang2022-01-171-1/+6
| | | | | | | | | | | | | | | For recent X86 CPU, 0x15 CPUID instruction will return Time Stamp Counter. This is recommended way to get the time, and also how BaseCpuTimerLib works However, some CPU doesn't support this feature, so disable it by default. Cc: Guo Dong <guo.dong@intel.com> Cc: Ray Ni <ray.ni@intel.com> Cc: Maurice Ma <maurice.ma@intel.com> Cc: Benjamin You <benjamin.you@intel.com> Signed-off-by: Zhiguang Liu <zhiguang.liu@intel.com> Reviewed-by: Guo Dong <guo.dong@intel.com> Reviewed-by: Maurice Ma <maurice.ma@intel.com>
* UefiPayloadPkg: Change the user interface name of the UiappXie, Yuanhao2022-01-171-1/+8
| | | | | | | | | | | | Chanage the name "Uiapp" to "Enter Setup". Cc: Guo Dong <guo.dong@intel.com> Cc: Ray Ni <ray.ni@intel.com> Cc: Maurice Ma <maurice.ma@intel.com> Cc: Benjamin You <benjamin.you@intel.com> Signed-off-by: Yuanhao Xie <yuanhao.xie@intel.com> Reviewed-by: Guo Dong <guo.dong@intel.com> Reviewed-by: Ray Ni <ray.ni@intel.com>
* UefiPayloadPkg: Add integration instruction for coreboot common errorLi, Aaron2021-12-081-0/+2
| | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3753 When integrate the latest UefiPayload with coreboot 4.14 or older, a common error would occur like "E: Not a usable UEFI firmware volume." The change adds an entry for how to solve this issue. Cc: Guo Dong <guo.dong@intel.com> Reviewed-by: Ray Ni <ray.ni@intel.com> Signed-off-by: Aaron Li <aaron.li@intel.com>
* UefiPayloadPkg/UefiPayloadPkg.dsc:Add BootManagerLib for BootManagerMenuAppFeng, Ning2021-12-081-2/+4
| | | | | | | | | | | | Add PlatformBootManagerLibconstructor for BootManagerMenuApp, to get the value PcdBootManagefile overrided by platform side. Signed-off-by: Ning Feng <ning.feng@intel.com> Cc: Guo Dong <guo.dong@intel.com> Reviewed-by: Ray Ni <ray.ni@intel.com> Cc: Maurice Ma <maurice.ma@intel.com> Cc: Benjamin You <benjamin.you@intel.com> Reviewed-by: Zhiguang Liu <zhiguang.liu@intel.com>
* UefiPayloadPkg: Skip ModuleInfo HOB in PayloadJiang, Guomin2021-12-081-1/+31
| | | | | | | | | | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3754 1. DxeCore will use ModuleInfo to install LoadedImage protocol for DxeCore. 2. DxeIpl will create the ModuleInfo of UniversalPayload. and UniversalPayload will create the ModuleInfo of DxeCore. 3. UniversalPayload should skip the ModuleInfo from the DxeIpl to avoid the mismatched ModuleInfo for DxeCore. Changes: 1. Use function IsHobNeed to check if the HOB should be added 2. Add the ModuleInfo check logic in IsHobNeed function Signed-off-by: Guomin Jiang <guomin.jiang@intel.com> Cc: Guo Dong <guo.dong@intel.com> Reviewed-by: Ray Ni <ray.ni@intel.com> Cc: Maurice Ma <maurice.ma@intel.com> Cc: Benjamin You <benjamin.you@intel.com>
* UefiPayloadPkg: Add performance measurement featureLiu, Zhiguang2021-12-082-1/+39
| | | | | | | | | | | | | Add a Macro to enable performance measurement feature. For any platform that uses UniversalPayload, we assume it supports BaseCpuTimerLib and use it to align timerlib to get more accurate performance result. Reviewed-by: Guo Dong <guo.dong@intel.com> Cc: Ray Ni <ray.ni@intel.com> Cc: Maurice Ma <maurice.ma@intel.com> Cc: Benjamin You <benjamin.you@intel.com> Signed-off-by: Zhiguang Liu <zhiguang.liu@intel.com>
* UefiPayloadPkg: Add missing Guid gUefiAcpiBoardInfoGuidLiu, Zhiguang2021-12-081-0/+3
| | | | | | | | | | The library PciSegmentInfoLibAcpiBoardInfo consumes the Guid gUefiAcpiBoardInfoGuid. Reviewed-by: Guo Dong <guo.dong@intel.com> Cc: Ray Ni <ray.ni@intel.com> Cc: Maurice Ma <maurice.ma@intel.com> Cc: Benjamin You <benjamin.you@intel.com> Signed-off-by: Zhiguang Liu <zhiguang.liu@intel.com>
* UefiPayloadPkg: Increase SystemMemoryUefiRegionSize from 32M to 64MLiu, Zhiguang2021-12-081-1/+1
| | | | | | | | | | | | | | | | | | | | | | | Current, the SystemMemoryUefiRegionSize is 32M, which means in universal payload entry, we can at most use 32M heap. However, this can't meet the memory requirment for 5 level page table. In UefiPayloadPkg\UefiPayloadEntry\X64\VirtualMemory.c, we assume the Physical Address at most has 52 bits. Using 1G table support, with 52 bits Physical Address, to build page table, we need one page to hold 16 PML5 entries, each PML5 entry points to one page containing 512 PML4 entries. One PML4 entry points to one page containing 512 PML3 entries. Each PML3 entries will point to 1G memory space. Totally 8209 pages are needed, which is around 32M bytes. Therefore, increase SystemMemoryUefiRegionSize from 32M to 64M to support 5 level page tables. Reviewed-by: Guo Dong <guo.dong@intel.com> Reviewed-by: Ray Ni <ray.ni@intel.com> Cc: Maurice Ma <maurice.ma@intel.com> Cc: Benjamin You <benjamin.you@intel.com> Signed-off-by: Zhiguang Liu <zhiguang.liu@intel.com>
* UefiPayloadPkg/PayloadEntry: Inherit 4/5-level paging from bootloaderNi, Ray2021-12-083-51/+39
| | | | | | | | | | | | | | | | | The patch removes the dep on PcdUse5LevelPageTable. Now the payload inherits the 5-level paging setting from bootloader in IA-32e mode and uses 4-level paging in legacy protected mode. This fix the potential issue when bootloader enables 5-level paging but 64bit payload sets 4-level page table to CR3 resulting CPU exception because PcdUse5LevelPageTable is FALSE. Signed-off-by: Ray Ni <ray.ni@intel.com> Reviewed-by: Guo Dong <guo.dong@intel.com> Cc: Ray Ni <ray.ni@intel.com> Reviewed-by: Maurice Ma <maurice.ma@intel.com> Cc: Benjamin You <benjamin.you@intel.com>
* UefiPayloadPkg/UefiPayloadPkg.fdf: Update DXE Apriori listCheng, Gao2021-12-081-0/+2
| | | | | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3729 Put ReportStatusCodeRouterRuntimeDxe and StatusCodeHandlerRuntimeDxe in DXE Apriori list to enable DEBUG() via serial port through PeiDxeDebugLibReportStatusCode DebugLib instance as early as possible. The earliest point to add them is right before BlSupportDxe. Signed-off-by: Gao Cheng <gao.cheng@intel.com> Reviewed-by: Guo Dong <guo.dong@intel.com> Reviewed-by: Ray Ni <ray.ni@intel.com> Cc: Maurice Ma <maurice.ma@intel.com> Cc: Benjamin You <benjamin.you@intel.com>
* UefiPayloadPkg: Apply uncrustify changesMichael Kubacki2021-12-0776-4104/+4313
| | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3737 Apply uncrustify changes to .c/.h files in the UefiPayloadPkg package Cc: Andrew Fish <afish@apple.com> Cc: Leif Lindholm <leif@nuviainc.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com> Reviewed-by: Ray Ni <ray.ni@intel.com>
* UefiPayloadPkg: Change OPTIONAL keyword usage styleMichael D Kinney2021-12-077-12/+8
| | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3760 Update all use of ', OPTIONAL' to ' OPTIONAL,' for function params. Cc: Andrew Fish <afish@apple.com> Cc: Leif Lindholm <leif@nuviainc.com> Cc: Michael Kubacki <michael.kubacki@microsoft.com> Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com> Reviewed-by: Ray Ni <ray.ni@intel.com>
* UefiPayloadPkg: Update YAML to ignore specific ECC files/errorsMichael D Kinney2021-11-301-0/+6
| | | | | | | | | | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3749 Update package YAML files to ignore ECC errors that are already present. These issues must be fixed in the future, but should not block source code changes for these known issues. Cc: Guo Dong <guo.dong@intel.com> Cc: Ray Ni <ray.ni@intel.com> Cc: Maurice Ma <maurice.ma@intel.com> Cc: Benjamin You <benjamin.you@intel.com> Cc: Sean Brogan <sean.brogan@microsoft.com> Cc: Bret Barkelew <Bret.Barkelew@microsoft.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Michael Kubacki <michael.kubacki@microsoft.com> Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com> Reviewed-by: Guo Dong <guo.dong@intel.com>
* UefiPayloadPkg: Remove SystemTableInfo GUID.Kesavan Balakrishnan, ThiyaguX2021-10-3012-72/+95
| | | | | | | | | | | | | | | | SystemTableInfo GUID is not a Spec defined GUID. The latest SBL and CBL produces ACPI and SMBIOS table information. So removing the SystemTableInfo GUID implementation. Cc: Maurice Ma <maurice.ma@intel.com> Cc: Guo Dong <guo.dong@intel.com> Cc: Ray Ni <ray.ni@intel.com> Cc: Benjamin You <benjamin.you@intel.com> Cc: Zhiguang Liu <zhiguang.liu@intel.com> Signed-off-by: Guo Dong <guo.dong@intel.com> Signed-off-by: Thiyagu Kesavan Balakrishnan <thiyagux.kesavan.balakrishnan@intel.com> Reviewed-by: Guo Dong <guo.dong@intel.com>
* UefiPayloadPkg: Add SMM support and SMM variable supportGuo Dong2021-10-252-11/+128
| | | | | | | | | | | | Add SMM variable support for universal UEFI payload. By default they are disabled. Signed-off-by: Guo Dong <guo.dong@intel.com> Cc: Ray Ni <ray.ni@intel.com> Cc: Maurice Ma <maurice.ma@intel.com> Cc: Benjamin You <benjamin.you@intel.com> Reviewed-by: Ray Ni <ray.ni@intel.com> Reviewed-by: Benjamin You <benjamin.you@intel.com>
* UefiPayloadPkg: Add a SMM dispatch moduleGuo Dong2021-10-253-0/+543
| | | | | | | | | | | | | | | | | PCH SMM module would install SMM SW dispatch2 protocol. And it supports to register SMI handlers based on SMI APM interrupt from the bootloader information gSmmRegisterInfoGuid. It is possible to extend bootloader HOB to pass other information to support more SMI sources. If this module is not required by bootloader for some reason, the bootloader could skip this HOB or build a HOB without EOS info. Signed-off-by: Guo Dong <guo.dong@intel.com> Cc: Ray Ni <ray.ni@intel.com> Cc: Maurice Ma <maurice.ma@intel.com> Cc: Benjamin You <benjamin.you@intel.com> Reviewed-by: Ray Ni <ray.ni@intel.com> Reviewed-by: Benjamin You <benjamin.you@intel.com>
* UefiPayloadPkg: Add a common FVB SMM moduleGuo Dong2021-10-258-0/+1735
| | | | | | | | | | | | | | | | | | | This FVB module is used to initialize NV variable region and provide SMM FVB protocol to read/write SPI variable region. This module consume HOB gNvVariableInfoGuid and depends on FlashDeviceLib for the actual SPI device operate. During FVB initialization, it will initialize the variable region if the variable region is not valid. And it support to write initial variable data from FFS file if it is found. Signed-off-by: Guo Dong <guo.dong@intel.com> Cc: Ray Ni <ray.ni@intel.com> Cc: Maurice Ma <maurice.ma@intel.com> Cc: Benjamin You <benjamin.you@intel.com> Reviewed-by: Ray Ni <ray.ni@intel.com> Reviewed-by: Benjamin You <benjamin.you@intel.com>
* UefiPayloadPkg: Add FlashDeviceLibGuo Dong2021-10-253-0/+311
| | | | | | | | | | | | This library provides FlashDeviceLib APIs based on SpiFlashLib and consumed by FVB driver. Signed-off-by: Guo Dong <guo.dong@intel.com> Cc: Ray Ni <ray.ni@intel.com> Cc: Maurice Ma <maurice.ma@intel.com> Cc: Benjamin You <benjamin.you@intel.com> Reviewed-by: Ray Ni <ray.ni@intel.com> Reviewed-by: Benjamin You <benjamin.you@intel.com>
* UefiPayloadPkg: Add SpiFlashLibGuo Dong2021-10-258-0/+1669
| | | | | | | | | | | | | This is a common SPI Flash library used for the Intel platform that supports SPI hardware sequence. This library provides actual SPI flash operation via Intel PCH SPI controller. Signed-off-by: Guo Dong <guo.dong@intel.com> Cc: Ray Ni <ray.ni@intel.com> Cc: Maurice Ma <maurice.ma@intel.com> Cc: Benjamin You <benjamin.you@intel.com> Reviewed-by: Ray Ni <ray.ni@intel.com> Reviewed-by: Benjamin You <benjamin.you@intel.com>
* UefiPayloadPkg: Add bootloader SMM support moduleGuo Dong2021-10-255-0/+576
| | | | | | | | | | | | | | | | | This module is only used for SMM S3 support for the bootloader that doesn't support SMM. The payload would save SMM rebase info to SMM communication area in normal boot and expect the bootloader in S3 path to rebase the SMM and trigger SMI by writing 0xB2 port with the given value from SMM communication area. The payload SMM handler would get chance to restore some registers in S3 path. Signed-off-by: Guo Dong <guo.dong@intel.com> Cc: Ray Ni <ray.ni@intel.com> Cc: Maurice Ma <maurice.ma@intel.com> Cc: Benjamin You <benjamin.you@intel.com> Reviewed-by: Ray Ni <ray.ni@intel.com> Reviewed-by: Benjamin You <benjamin.you@intel.com>
* UefiPayloadPkg: Add a common SMM control Runtime DXE moduleGuo Dong2021-10-254-0/+356
| | | | | | | | | | | | | | This module consumes SMM Registers HOB (SMI_GBL_EN and SMI_APM_EN) to install SMM control 2 protocol gEfiSmmControl2ProtocolGuid. The protocol activate() would set SMI_GBL_EN and SMI_APM_EN and trigger SMI by writing to IO port 0xB3 and 0xB2. Signed-off-by: Guo Dong <guo.dong@intel.com> Cc: Ray Ni <ray.ni@intel.com> Cc: Maurice Ma <maurice.ma@intel.com> Cc: Benjamin You <benjamin.you@intel.com> Reviewed-by: Ray Ni <ray.ni@intel.com> Reviewed-by: Benjamin You <benjamin.you@intel.com>
* UefiPayloadPkg: Add a common SmmAccessDxe moduleGuo Dong2021-10-253-0/+342
| | | | | | | | | | | | | SmmAccessDxe module would consume EFI_SMRAM_HOB_DESCRIPTOR_BLOCK HOB to produce SMM access protocol gEfiSmmAccess2ProtocolGuid (open, close, lock, and GetCapabilities.) Signed-off-by: Guo Dong <guo.dong@intel.com> Cc: Ray Ni <ray.ni@intel.com> Cc: Maurice Ma <maurice.ma@intel.com> Cc: Benjamin You <benjamin.you@intel.com> Reviewed-by: Ray Ni <ray.ni@intel.com> Reviewed-by: Benjamin You <benjamin.you@intel.com>
generated by cgit v1.2.3 (git 2.25.1) at 2024-08-08 23:59:10 +0000