summaryrefslogtreecommitdiffstats
path: root/MdePkg/Include/IndustryStandard/PciExpress31.h
blob: 9d026853bc158eacb5cd190a781c7248175fb870 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
/** @file
Support for the PCI Express 3.1 standard.

This header file may not define all structures.  Please extend as required.

Copyright (c) 2016, Intel Corporation. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent

**/

#ifndef _PCIEXPRESS31_H_
#define _PCIEXPRESS31_H_

#include <IndustryStandard/PciExpress30.h>

#pragma pack(1)

#define PCI_EXPRESS_EXTENDED_CAPABILITY_L1_PM_SUBSTATES_ID    0x001E
#define PCI_EXPRESS_EXTENDED_CAPABILITY_L1_PM_SUBSTATES_VER1  0x1

typedef union {
  struct {
    UINT32 PciPmL12 : 1;
    UINT32 PciPmL11 : 1;
    UINT32 AspmL12 : 1;
    UINT32 AspmL11 : 1;
    UINT32 L1PmSubstates : 1;
    UINT32 Reserved : 3;
    UINT32 CommonModeRestoreTime : 8;
    UINT32 TPowerOnScale : 2;
    UINT32 Reserved2 : 1;
    UINT32 TPowerOnValue : 5;
    UINT32 Reserved3 : 8;
  } Bits;
  UINT32   Uint32;
} PCI_EXPRESS_REG_L1_PM_SUBSTATES_CAPABILITY;

typedef union {
  struct {
    UINT32 PciPmL12 : 1;
    UINT32 PciPmL11 : 1;
    UINT32 AspmL12 : 1;
    UINT32 AspmL11 : 1;
    UINT32 Reserved : 4;
    UINT32 CommonModeRestoreTime : 8;
    UINT32 LtrL12ThresholdValue : 10;
    UINT32 Reserved2 : 3;
    UINT32 LtrL12ThresholdScale : 3;
  } Bits;
  UINT32   Uint32;
} PCI_EXPRESS_REG_L1_PM_SUBSTATES_CONTROL1;

typedef union {
  struct {
    UINT32 TPowerOnScale : 2;
    UINT32 Reserved : 1;
    UINT32 TPowerOnValue : 5;
    UINT32 Reserved2 : 24;
  } Bits;
  UINT32   Uint32;
} PCI_EXPRESS_REG_L1_PM_SUBSTATES_CONTROL2;

typedef struct {
  PCI_EXPRESS_EXTENDED_CAPABILITIES_HEADER   Header;
  PCI_EXPRESS_REG_L1_PM_SUBSTATES_CAPABILITY Capability;
  PCI_EXPRESS_REG_L1_PM_SUBSTATES_CONTROL1   Control1;
  PCI_EXPRESS_REG_L1_PM_SUBSTATES_CONTROL2   Control2;
} PCI_EXPRESS_EXTENDED_CAPABILITIES_L1_PM_SUBSTATES;

#pragma pack()

#endif