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;------------------------------------------------------------------------------
; @file
; Intel TDX APs
;
; Copyright (c) 2021 - 2022, Intel Corporation. All rights reserved.<BR>
; SPDX-License-Identifier: BSD-2-Clause-Patent
;
;------------------------------------------------------------------------------
%include "TdxCommondefs.inc"
;
; Note: BSP never gets here. APs will be unblocked by DXE
;
; R8 [31:0] NUM_VCPUS
; [63:32] MAX_VCPUS
; R9 [31:0] VCPU_INDEX
;
ParkAp:
do_wait_loop:
;
; register itself in [rsp + CpuArrivalOffset]
;
mov rax, 1
lock xadd dword [rsp + CpuArrivalOffset], eax
inc eax
.check_arrival_cnt:
cmp eax, r8d
je .check_command
mov eax, dword[rsp + CpuArrivalOffset]
jmp .check_arrival_cnt
.check_command:
mov eax, dword[rsp + CommandOffset]
cmp eax, MpProtectedModeWakeupCommandNoop
je .check_command
cmp eax, MpProtectedModeWakeupCommandWakeup
je .do_wakeup
; Don't support this command, so ignore
jmp .check_command
.do_wakeup:
;
; BSP sets these variables before unblocking APs
; RAX: WakeupVectorOffset
; RBX: Relocated mailbox address
; RBP: vCpuId
;
mov rax, 0
mov eax, dword[rsp + WakeupVectorOffset]
mov rbx, [rsp + WakeupArgsRelocatedMailBox]
nop
jmp rax
jmp $
|
