1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
|
;------------------------------------------------------------------------------
;*
;* Copyright (c) 2006 - 2013, Intel Corporation. All rights reserved.<BR>
;* SPDX-License-Identifier: BSD-2-Clause-Patent
;*
;* CpuAsm.asm
;*
;* Abstract:
;*
;------------------------------------------------------------------------------
#include <Base.h>
%include "TdxCommondefs.inc"
DEFAULT REL
SECTION .text
extern ASM_PFX(SecCoreStartupWithStack)
%macro tdcall 0
db 0x66, 0x0f, 0x01, 0xcc
%endmacro
;
; SecCore Entry Point
;
; Processor is in flat protected mode
;
; @param[in] RAX Initial value of the EAX register (BIST: Built-in Self Test)
; @param[in] DI 'BP': boot-strap processor, or 'AP': application processor
; @param[in] RBP Pointer to the start of the Boot Firmware Volume
; @param[in] DS Selector allowing flat access to all addresses
; @param[in] ES Selector allowing flat access to all addresses
; @param[in] FS Selector allowing flat access to all addresses
; @param[in] GS Selector allowing flat access to all addresses
; @param[in] SS Selector allowing flat access to all addresses
;
; @return None This routine does not return
;
global ASM_PFX(_ModuleEntryPoint)
ASM_PFX(_ModuleEntryPoint):
;
; Guest type is stored in OVMF_WORK_AREA
;
%define OVMF_WORK_AREA FixedPcdGet32 (PcdOvmfWorkAreaBase)
%define VM_GUEST_TYPE_TDX 2
mov eax, OVMF_WORK_AREA
cmp byte[eax], VM_GUEST_TYPE_TDX
jne InitStack
mov rax, TDCALL_TDINFO
tdcall
;
; R8 [31:0] NUM_VCPUS
; [63:32] MAX_VCPUS
; R9 [31:0] VCPU_INDEX
; Td Guest set the VCPU0 as the BSP, others are the APs
; APs jump to spinloop and get released by DXE's MpInitLib
;
mov rax, r9
and rax, 0xffff
test rax, rax
jne ParkAp
InitStack:
;
; Fill the temporary RAM with the initial stack value.
; The loop below will seed the heap as well, but that's harmless.
;
mov rax, (FixedPcdGet32 (PcdInitValueInTempStack) << 32) | FixedPcdGet32 (PcdInitValueInTempStack)
; qword to store
mov rdi, FixedPcdGet32 (PcdOvmfSecPeiTempRamBase) ; base address,
; relative to
; ES
mov rcx, FixedPcdGet32 (PcdOvmfSecPeiTempRamSize) / 8 ; qword count
cld ; store from base
; up
rep stosq
;
; Load temporary RAM stack based on PCDs
;
%define SEC_TOP_OF_STACK (FixedPcdGet32 (PcdOvmfSecPeiTempRamBase) + \
FixedPcdGet32 (PcdOvmfSecPeiTempRamSize))
mov rsp, SEC_TOP_OF_STACK
nop
;
; Setup parameters and call SecCoreStartupWithStack
; rcx: BootFirmwareVolumePtr
; rdx: TopOfCurrentStack
;
mov rcx, rbp
mov rdx, rsp
sub rsp, 0x20
call ASM_PFX(SecCoreStartupWithStack)
;
; Note: BSP never gets here. APs will be unblocked by DXE
;
; R8 [31:0] NUM_VCPUS
; [63:32] MAX_VCPUS
; R9 [31:0] VCPU_INDEX
;
ParkAp:
mov rbp, r9
.do_wait_loop:
mov rsp, FixedPcdGet32 (PcdOvmfSecGhcbBackupBase)
;
; register itself in [rsp + CpuArrivalOffset]
;
mov rax, 1
lock xadd dword [rsp + CpuArrivalOffset], eax
inc eax
.check_arrival_cnt:
cmp eax, r8d
je .check_command
mov eax, dword[rsp + CpuArrivalOffset]
jmp .check_arrival_cnt
.check_command:
mov eax, dword[rsp + CommandOffset]
cmp eax, MpProtectedModeWakeupCommandNoop
je .check_command
cmp eax, MpProtectedModeWakeupCommandWakeup
je .do_wakeup
; Don't support this command, so ignore
jmp .check_command
.do_wakeup:
;
; BSP sets these variables before unblocking APs
; RAX: WakeupVectorOffset
; RBX: Relocated mailbox address
; RBP: vCpuId
;
mov rax, 0
mov eax, dword[rsp + WakeupVectorOffset]
mov rbx, [rsp + WakeupArgsRelocatedMailBox]
nop
jmp rax
jmp $
|
