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authorCarl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>2012-08-27 00:44:42 +0000
committerStefan Tauner <stefan.tauner@alumni.tuwien.ac.at>2012-08-27 00:44:42 +0000
commit1c6d2ff03d16acf87c96d019153dcd10c779a5f6 (patch)
treeb211be01cc5f25fa78321dd434e42aafa9ea3f0e
parent6745d6f39d2642908035c7e4a6481f5349c767a7 (diff)
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Some ISO C fixes
This patch just fixes a limited number of bits not conforming to c99 by using - __asm__ instead of just asm - {0} instead of {} for struct initialization - h_addr_list[0] instead of h_addr to access the host address in struct hostent - #include <strings.h> where needed (for ffs and strcasecmp) Based on a previous patch by Carl-Daniel. Corresponding to flashrom svn r1585. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
-rw-r--r--atahpt.c2
-rw-r--r--board_enable.c3
-rw-r--r--buspirate_spi.c1
-rw-r--r--cbtable.c1
-rw-r--r--chipset_enable.c2
-rw-r--r--dmi.c1
-rw-r--r--drkaiser.c5
-rw-r--r--flashchips.c2
-rw-r--r--flashrom.c2
-rw-r--r--ft2232_spi.c4
-rw-r--r--gfxnvidia.c2
-rw-r--r--hwaccess.c2
-rw-r--r--hwaccess.h13
-rw-r--r--internal.c1
-rw-r--r--it87spi.c2
-rw-r--r--nic3com.c2
-rw-r--r--nicintel.c2
-rw-r--r--nicintel_spi.c2
-rw-r--r--nicnatsemi.c3
-rw-r--r--nicrealtek.c3
-rw-r--r--ogp_spi.c4
-rw-r--r--pony_spi.c1
-rw-r--r--print.c4
-rw-r--r--rayer_spi.c1
-rw-r--r--satamv.c2
-rw-r--r--satasii.c2
-rw-r--r--serprog.c3
-rw-r--r--udelay.c2
28 files changed, 44 insertions, 30 deletions
diff --git a/atahpt.c b/atahpt.c
index f410fe40c..8ec0f3fd1 100644
--- a/atahpt.c
+++ b/atahpt.c
@@ -38,7 +38,7 @@ const struct pcidev_status ata_hpt[] = {
{0x1103, 0x0005, NT, "Highpoint", "HPT372A/372N"},
{0x1103, 0x0006, NT, "Highpoint", "HPT302/302N"},
- {},
+ {0},
};
static void atahpt_chip_writeb(const struct flashctx *flash, uint8_t val,
diff --git a/board_enable.c b/board_enable.c
index df772b8d2..cee9ec503 100644
--- a/board_enable.c
+++ b/board_enable.c
@@ -24,6 +24,7 @@
* Contains the board specific flash enables.
*/
+#include <strings.h>
#include <string.h>
#include <stdlib.h>
#include "flash.h"
@@ -292,7 +293,7 @@ static uint8_t w836xx_deviceid_hwmon(uint16_t sio_port)
void probe_superio_winbond(void)
{
- struct superio s = {};
+ struct superio s = {0};
uint16_t winbond_ports[] = {WINBOND_SUPERIO_PORT1, WINBOND_SUPERIO_PORT2, 0};
uint16_t *i = winbond_ports;
uint8_t model;
diff --git a/buspirate_spi.c b/buspirate_spi.c
index d00277e70..054b4ffd0 100644
--- a/buspirate_spi.c
+++ b/buspirate_spi.c
@@ -18,6 +18,7 @@
*/
#include <stdio.h>
+#include <strings.h>
#include <string.h>
#include <stdlib.h>
#include <ctype.h>
diff --git a/cbtable.c b/cbtable.c
index bd83ea5c9..b859e68fc 100644
--- a/cbtable.c
+++ b/cbtable.c
@@ -25,6 +25,7 @@
#include <unistd.h>
#include <stdio.h>
#include <ctype.h>
+#include <strings.h>
#include <string.h>
#include "flash.h"
#include "programmer.h"
diff --git a/chipset_enable.c b/chipset_enable.c
index 995d2c519..03cb67e0d 100644
--- a/chipset_enable.c
+++ b/chipset_enable.c
@@ -1466,7 +1466,7 @@ const struct penable chipset_enables[] = {
{0x8086, 0x8c5e, NT, "Intel", "Lynx Point", enable_flash_pch8},
{0x8086, 0x8c5f, NT, "Intel", "Lynx Point", enable_flash_pch8},
#endif
- {},
+ {0},
};
int chipset_flash_enable(void)
diff --git a/dmi.c b/dmi.c
index 2c2551d2c..dfc78e9c0 100644
--- a/dmi.c
+++ b/dmi.c
@@ -18,6 +18,7 @@
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
+#include <strings.h>
#include <string.h>
#include <stdio.h>
#include <stdlib.h>
diff --git a/drkaiser.c b/drkaiser.c
index 259530a5d..8c9f560a8 100644
--- a/drkaiser.c
+++ b/drkaiser.c
@@ -35,7 +35,8 @@
const struct pcidev_status drkaiser_pcidev[] = {
{0x1803, 0x5057, OK, "Dr. Kaiser", "PC-Waechter (Actel FPGA)"},
- {},
+
+ {0},
};
static uint8_t *drkaiser_bar;
@@ -61,7 +62,7 @@ static int drkaiser_shutdown(void *data)
/* Flash write is disabled automatically by PCI restore. */
pci_cleanup(pacc);
return 0;
-};
+}
int drkaiser_init(void)
{
diff --git a/flashchips.c b/flashchips.c
index f658b4c5d..8fe50bd18 100644
--- a/flashchips.c
+++ b/flashchips.c
@@ -9496,7 +9496,7 @@ const struct flashchip flashchips[] = {
.unlock = spi_disable_blockprotect, /* is this safe? */
.read = spi_chip_read,
/* FIXME: some vendor extensions define this */
- .voltage = {},
+ .voltage = {0},
/* Everything below will be set by the probing function. */
.write = NULL,
.total_size = 0,
diff --git a/flashrom.c b/flashrom.c
index 44a3eba26..f6185d0ce 100644
--- a/flashrom.c
+++ b/flashrom.c
@@ -263,7 +263,7 @@ const struct programmer_entry programmer_table[] = {
},
#endif
- {}, /* This entry corresponds to PROGRAMMER_INVALID. */
+ {0}, /* This entry corresponds to PROGRAMMER_INVALID. */
};
#define SHUTDOWN_MAXFN 32
diff --git a/ft2232_spi.c b/ft2232_spi.c
index d599a8ae6..edea1e662 100644
--- a/ft2232_spi.c
+++ b/ft2232_spi.c
@@ -21,6 +21,7 @@
#if CONFIG_FT2232_SPI == 1
#include <stdio.h>
+#include <strings.h>
#include <string.h>
#include <stdlib.h>
#include <ctype.h>
@@ -61,7 +62,8 @@ const struct usbdev_status devs_ft2232spi[] = {
{OLIMEX_VID, OLIMEX_ARM_TINY_PID, OK, "Olimex", "ARM-USB-TINY"},
{OLIMEX_VID, OLIMEX_ARM_OCD_H_PID, NT, "Olimex", "ARM-USB-OCD-H"},
{OLIMEX_VID, OLIMEX_ARM_TINY_H_PID, NT, "Olimex", "ARM-USB-TINY-H"},
- {},
+
+ {0},
};
diff --git a/gfxnvidia.c b/gfxnvidia.c
index 782d69238..7bdbda869 100644
--- a/gfxnvidia.c
+++ b/gfxnvidia.c
@@ -59,7 +59,7 @@ const struct pcidev_status gfx_nvidia[] = {
{0x10de, 0x0202, NT, "NVIDIA", "GeForce 3 nFX Ultra" },
{0x10de, 0x0203, NT, "NVIDIA", "Quadro 3 DDC" },
- {},
+ {0},
};
static void gfxnvidia_chip_writeb(const struct flashctx *flash, uint8_t val,
diff --git a/hwaccess.c b/hwaccess.c
index c18a1104b..e1195def2 100644
--- a/hwaccess.c
+++ b/hwaccess.c
@@ -97,7 +97,7 @@ static inline void sync_primitive(void)
* Such reordering and/or merging would break device accesses which
* depend on the exact access order.
*/
- asm("eieio" : : : "memory");
+ ___asm___ volatile ("eieio" : : : "memory");
}
/* PCI port I/O is not yet implemented on PowerPC. */
diff --git a/hwaccess.h b/hwaccess.h
index 12496bb0b..dc521185b 100644
--- a/hwaccess.h
+++ b/hwaccess.h
@@ -174,7 +174,6 @@ cpu_to_be(64)
/* for iopl and outb under Solaris */
#if defined (__sun) && (defined(__i386) || defined(__amd64))
-#include <strings.h>
#include <sys/sysi86.h>
#include <sys/psw.h>
#include <asm/sunddi.h>
@@ -263,37 +262,37 @@ cpu_to_be(64)
static inline void outb(uint8_t value, uint16_t port)
{
- asm volatile ("outb %b0,%w1": :"a" (value), "Nd" (port));
+ __asm__ volatile ("outb %b0,%w1": :"a" (value), "Nd" (port));
}
static inline uint8_t inb(uint16_t port)
{
uint8_t value;
- asm volatile ("inb %w1,%0":"=a" (value):"Nd" (port));
+ __asm__ volatile ("inb %w1,%0":"=a" (value):"Nd" (port));
return value;
}
static inline void outw(uint16_t value, uint16_t port)
{
- asm volatile ("outw %w0,%w1": :"a" (value), "Nd" (port));
+ __asm__ volatile ("outw %w0,%w1": :"a" (value), "Nd" (port));
}
static inline uint16_t inw(uint16_t port)
{
uint16_t value;
- asm volatile ("inw %w1,%0":"=a" (value):"Nd" (port));
+ __asm__ volatile ("inw %w1,%0":"=a" (value):"Nd" (port));
return value;
}
static inline void outl(uint32_t value, uint16_t port)
{
- asm volatile ("outl %0,%w1": :"a" (value), "Nd" (port));
+ __asm__ volatile ("outl %0,%w1": :"a" (value), "Nd" (port));
}
static inline uint32_t inl(uint16_t port)
{
uint32_t value;
- asm volatile ("inl %1,%0":"=a" (value):"Nd" (port));
+ __asm__ volatile ("inl %1,%0":"=a" (value):"Nd" (port));
return value;
}
#endif
diff --git a/internal.c b/internal.c
index f3ccbde78..7b6cff243 100644
--- a/internal.c
+++ b/internal.c
@@ -18,6 +18,7 @@
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
+#include <strings.h>
#include <string.h>
#include <stdlib.h>
#include "flash.h"
diff --git a/it87spi.c b/it87spi.c
index fb2f794e9..a35ddc068 100644
--- a/it87spi.c
+++ b/it87spi.c
@@ -74,7 +74,7 @@ uint16_t probe_id_ite(uint16_t port)
void probe_superio_ite(void)
{
- struct superio s = {};
+ struct superio s = {0};
uint16_t ite_ports[] = {ITE_SUPERIO_PORT1, ITE_SUPERIO_PORT2, 0};
uint16_t *i = ite_ports;
diff --git a/nic3com.c b/nic3com.c
index f4fb6feb9..c7fc8002b 100644
--- a/nic3com.c
+++ b/nic3com.c
@@ -53,7 +53,7 @@ const struct pcidev_status nics_3com[] = {
/* 3C980C */
{0x10b7, 0x9805, NT, "3COM", "3C980C: EtherLink Server 10/100 PCI (TX)" },
- {},
+ {0},
};
static void nic3com_chip_writeb(const struct flashctx *flash, uint8_t val,
diff --git a/nicintel.c b/nicintel.c
index 1c6d4098d..4399377d9 100644
--- a/nicintel.c
+++ b/nicintel.c
@@ -31,7 +31,7 @@ const struct pcidev_status nics_intel[] = {
{PCI_VENDOR_ID_INTEL, 0x1209, NT, "Intel", "8255xER/82551IT Fast Ethernet Controller"},
{PCI_VENDOR_ID_INTEL, 0x1229, OK, "Intel", "82557/8/9/0/1 Ethernet Pro 100"},
- {},
+ {0},
};
/* Arbitrary limit, taken from the datasheet I just had lying around.
diff --git a/nicintel_spi.c b/nicintel_spi.c
index d422b1805..24d5732e6 100644
--- a/nicintel_spi.c
+++ b/nicintel_spi.c
@@ -73,7 +73,7 @@ const struct pcidev_status nics_intel_spi[] = {
{PCI_VENDOR_ID_INTEL, 0x107c, OK, "Intel", "82541PI Gigabit Ethernet Controller"},
{PCI_VENDOR_ID_INTEL, 0x10b9, OK, "Intel", "82572EI Gigabit Ethernet Controller"},
- {},
+ {0},
};
static void nicintel_request_spibus(void)
diff --git a/nicnatsemi.c b/nicnatsemi.c
index 7cdd2fe95..fcfc613df 100644
--- a/nicnatsemi.c
+++ b/nicnatsemi.c
@@ -33,7 +33,8 @@
const struct pcidev_status nics_natsemi[] = {
{0x100b, 0x0020, NT, "National Semiconductor", "DP83815/DP83816"},
{0x100b, 0x0022, NT, "National Semiconductor", "DP83820"},
- {},
+
+ {0},
};
static void nicnatsemi_chip_writeb(const struct flashctx *flash, uint8_t val,
diff --git a/nicrealtek.c b/nicrealtek.c
index afc3d0f64..08ff219c6 100644
--- a/nicrealtek.c
+++ b/nicrealtek.c
@@ -34,7 +34,8 @@
const struct pcidev_status nics_realtek[] = {
{0x10ec, 0x8139, OK, "Realtek", "RTL8139/8139C/8139C+"},
{0x1113, 0x1211, OK, "SMC2", "1211TX"}, /* RTL8139 clone */
- {},
+
+ {0},
};
static void nicrealtek_chip_writeb(const struct flashctx *flash, uint8_t val,
diff --git a/ogp_spi.c b/ogp_spi.c
index 13091b4aa..7aee72b2f 100644
--- a/ogp_spi.c
+++ b/ogp_spi.c
@@ -18,6 +18,7 @@
*/
#include <stdlib.h>
+#include <strings.h>
#include <string.h>
#include "flash.h"
#include "programmer.h"
@@ -48,7 +49,8 @@ static uint32_t ogp_reg_sck;
const struct pcidev_status ogp_spi[] = {
{PCI_VENDOR_ID_OGP, 0x0000, OK, "Open Graphics Project", "Development Board OGD1"},
- {},
+
+ {0},
};
static void ogp_request_spibus(void)
diff --git a/pony_spi.c b/pony_spi.c
index 6ce467e3a..fb90a3350 100644
--- a/pony_spi.c
+++ b/pony_spi.c
@@ -22,6 +22,7 @@
*/
#include <stdlib.h>
+#include <strings.h>
#include <string.h>
#include "flash.h"
diff --git a/print.c b/print.c
index b4990ec75..f0cd7530d 100644
--- a/print.c
+++ b/print.c
@@ -1033,7 +1033,7 @@ const struct board_info boards_known[] = {
B("ZOTAC", "ZBOX HD-ID11", OK, NULL, NULL),
#endif
- {},
+ {0},
};
/* Please keep this list alphabetically ordered by vendor/board. */
@@ -1059,6 +1059,6 @@ const struct board_info laptops_known[] = {
B("Lenovo", "3000 V100 TF05Cxx", OK, "http://www5.pc.ibm.com/europe/products.nsf/products?openagent&brand=Lenovo3000Notebook&series=Lenovo+3000+V+Series#viewallmodelstop", NULL),
#endif
- {},
+ {0},
};
#endif
diff --git a/rayer_spi.c b/rayer_spi.c
index 8e48e6ef0..b312610e3 100644
--- a/rayer_spi.c
+++ b/rayer_spi.c
@@ -31,6 +31,7 @@
#if defined(__i386__) || defined(__x86_64__)
#include <stdlib.h>
+#include <strings.h>
#include <string.h>
#include "flash.h"
#include "programmer.h"
diff --git a/satamv.c b/satamv.c
index afcabaf5a..27ad6993c 100644
--- a/satamv.c
+++ b/satamv.c
@@ -33,7 +33,7 @@ const struct pcidev_status satas_mv[] = {
/* 88SX6041 and 88SX6042 are the same according to the datasheet. */
{0x11ab, 0x7042, OK, "Marvell", "88SX7042 PCI-e 4-port SATA-II"},
- {},
+ {0},
};
#define NVRAM_PARAM 0x1045c
diff --git a/satasii.c b/satasii.c
index e210e1078..bc956457d 100644
--- a/satasii.c
+++ b/satasii.c
@@ -38,7 +38,7 @@ const struct pcidev_status satas_sii[] = {
{0x1095, 0x3132, OK, "Silicon Image", "SiI 3132 SATA Raid II Ctrl"},
{0x1095, 0x3512, OK, "Silicon Image", "SiI 3512 [SATALink/SATARaid] SATA Ctrl"},
- {},
+ {0},
};
static void satasii_chip_writeb(const struct flashctx *flash, uint8_t val, chipaddr addr);
diff --git a/serprog.c b/serprog.c
index e418c3e20..dd86fd34e 100644
--- a/serprog.c
+++ b/serprog.c
@@ -22,6 +22,7 @@
#include <stdio.h>
#include <stdlib.h>
#include <unistd.h>
+#include <strings.h>
#include <string.h>
#include <ctype.h>
#include <fcntl.h>
@@ -125,7 +126,7 @@ static int sp_opensocket(char *ip, unsigned int port)
}
sp.si.sin_family = AF_INET;
sp.si.sin_port = htons(port);
- (void)memcpy(&sp.si.sin_addr, hostPtr->h_addr, hostPtr->h_length);
+ (void)memcpy(&sp.si.sin_addr, hostPtr->h_addr_list[0], hostPtr->h_length);
if (connect(sock, &sp.s, sizeof(sp.si)) < 0) {
close(sock);
msg_perr("Error: serprog cannot connect: %s\n", strerror(errno));
diff --git a/udelay.c b/udelay.c
index 5faa00450..9f5e56207 100644
--- a/udelay.c
+++ b/udelay.c
@@ -35,7 +35,7 @@ __attribute__ ((noinline)) void myusec_delay(int usecs)
unsigned long i;
for (i = 0; i < usecs * micro; i++) {
/* Make sure the compiler doesn't optimize the loop away. */
- asm volatile ("" : : "rm" (i) );
+ __asm__ volatile ("" : : "rm" (i) );
}
}