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authorEdward O'Callaghan <quasisec@google.com>2020-12-21 12:29:44 +1100
committerEdward O'Callaghan <quasisec@chromium.org>2020-12-23 01:32:49 +0000
commit55583c0d9dac40302dad4097da51ecabd26adf0d (patch)
treecf522ea8f284f185408ebe5c7d692e352f78f2f4
parent6cdde54ea0c84bd4b7fc4f86ccda96175b691c50 (diff)
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sb600spi.c: Detect rev 0x51 as Promontory
As reported on the mailing list. Change-Id: Iff8340633021fde1dc32572ab5f5da85df5d9048 Signed-off-by: Edward O'Callaghan <quasisec@google.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/48779 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
-rw-r--r--sb600spi.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/sb600spi.c b/sb600spi.c
index 2e27cee77..ef9da4b1a 100644
--- a/sb600spi.c
+++ b/sb600spi.c
@@ -129,7 +129,7 @@ static enum amd_chipset determine_generation(struct pci_dev *dev)
* The revisions I have found by searching various lspci
* outputs are as follows: 0x4b, 0x59 & 0x61.
*/
- } else if (rev == 0x4b || rev == 0x59 || rev == 0x61) {
+ } else if (rev == 0x4b || rev == 0x51 || rev == 0x59 || rev == 0x61) {
msg_pdbg("Promontory (rev 0x%02x) detected.\n", rev);
return CHIPSET_PROMONTORY;
} else {