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author | Angel Pons <th3fanbus@gmail.com> | 2018-10-07 13:07:55 +0200 |
---|---|---|
committer | Nico Huber <nico.h@gmx.de> | 2018-10-08 11:59:15 +0000 |
commit | 73ab88d58ee6ca1f0a822faafe0b14996e65ddbf (patch) | |
tree | bd539c80e1d257465ab421de57c8f0118be8f273 | |
parent | f112e242ab84534eee1b8e90e9cd6302a0db742f (diff) | |
download | flashrom-73ab88d58ee6ca1f0a822faafe0b14996e65ddbf.tar.gz flashrom-73ab88d58ee6ca1f0a822faafe0b14996e65ddbf.tar.bz2 flashrom-73ab88d58ee6ca1f0a822faafe0b14996e65ddbf.zip |
chipset_enable.c: Mark Intel HM65 as DEP
Tested reading, writing and erasing the internal flash chip using a
Toshiba L755 laptop with an Intel HM65. However, since all ME-enabled
chipsets are marked as DEP instead of OK, this one shall follow suit as
well.
Change-Id: I3fd62c3b4ee17a403cc3937422f3d850fd2878a4
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/28955
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
-rw-r--r-- | chipset_enable.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/chipset_enable.c b/chipset_enable.c index b689aec84..22021a7c5 100644 --- a/chipset_enable.c +++ b/chipset_enable.c @@ -1724,7 +1724,7 @@ const struct penable chipset_enables[] = { {0x8086, 0x1c44, DEP, "Intel", "Z68", enable_flash_pch6}, {0x8086, 0x1c46, DEP, "Intel", "P67", enable_flash_pch6}, {0x8086, 0x1c47, NT, "Intel", "UM67", enable_flash_pch6}, - {0x8086, 0x1c49, NT, "Intel", "HM65", enable_flash_pch6}, + {0x8086, 0x1c49, DEP, "Intel", "HM65", enable_flash_pch6}, {0x8086, 0x1c4a, DEP, "Intel", "H67", enable_flash_pch6}, {0x8086, 0x1c4b, NT, "Intel", "HM67", enable_flash_pch6}, {0x8086, 0x1c4c, NT, "Intel", "Q65", enable_flash_pch6}, |