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authorNico Huber <nico.h@gmx.de>2017-11-19 16:29:45 +0100
committerNico Huber <nico.h@gmx.de>2017-11-21 22:29:27 +0000
commitbbf0dbde3855a58f7324dedb81fdcce0f99c1c87 (patch)
tree081df1b795f34cfe65e4d436dc076f967af10c8e
parent1f33cb58001f95c3de69f037acae6f72baddca2b (diff)
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chipset_enable: Mark SiS 630 as tested OK
Tested on an Elitegroup P6STMT with an SST39SF020A parallel flash [1]. [1] https://mail.coreboot.org/pipermail/flashrom/2017-November/015193.html Change-Id: If8cc2af262e392bfba326a62c1a48c658c7d6ce8 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/22522 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: David Hendricks <david.hendricks@gmail.com>
-rw-r--r--chipset_enable.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/chipset_enable.c b/chipset_enable.c
index 343779288..a499ba010 100644
--- a/chipset_enable.c
+++ b/chipset_enable.c
@@ -1614,7 +1614,7 @@ const struct penable chipset_enables[] = {
{0x1039, 0x0530, OK, "SiS", "530", enable_flash_sis530},
{0x1039, 0x0540, NT, "SiS", "540", enable_flash_sis540},
{0x1039, 0x0620, NT, "SiS", "620", enable_flash_sis530},
- {0x1039, 0x0630, NT, "SiS", "630", enable_flash_sis540},
+ {0x1039, 0x0630, OK, "SiS", "630", enable_flash_sis540},
{0x1039, 0x0635, NT, "SiS", "635", enable_flash_sis540},
{0x1039, 0x0640, NT, "SiS", "640", enable_flash_sis540},
{0x1039, 0x0645, NT, "SiS", "645", enable_flash_sis540},