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authorNico Huber <nico.huber@secunet.com>2019-03-21 15:42:54 +0100
committerDavid Hendricks <david.hendricks@gmail.com>2019-06-04 13:54:54 +0000
commit7eb38aa7dbd45cbc040ac513ed4375995246aa93 (patch)
tree0b96573c7ec755ca09aa8799501e307284f337e6 /chipdrivers.h
parent17890b37f362e551e886506f39e7bf7181419457 (diff)
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dediprog: Implement 4BA EAR mode for protocol v1
With an SF100 and protocol version 1, using the extended address register of the flash chip seems safe. Make use of that and remove the broken 4BA modes flag. Tested with SF100 V:5.1.9 and W25Q256FV. Change-Id: If926cf3cbbebf88231116c4d65bafc19d23646f6 Signed-off-by: Nico Huber <nico.huber@secunet.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/32016 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: David Hendricks <david.hendricks@gmail.com>
Diffstat (limited to 'chipdrivers.h')
-rw-r--r--chipdrivers.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/chipdrivers.h b/chipdrivers.h
index 134ed265c..e380878d0 100644
--- a/chipdrivers.h
+++ b/chipdrivers.h
@@ -58,6 +58,7 @@ int spi_read_chunked(struct flashctx *flash, uint8_t *buf, unsigned int start, u
int spi_write_chunked(struct flashctx *flash, const uint8_t *buf, unsigned int start, unsigned int len, unsigned int chunksize);
int spi_enter_4ba(struct flashctx *flash);
int spi_exit_4ba(struct flashctx *flash);
+int spi_set_extended_address(struct flashctx *, uint8_t addr_high);
/* spi25_statusreg.c */