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| author | Nico Huber <nico.h@gmx.de> | 2020-04-27 22:51:49 +0000 |
|---|---|---|
| committer | Edward O'Callaghan <quasisec@chromium.org> | 2020-05-01 14:06:48 +0000 |
| commit | 9dc3d8d35b375eef3e63f3a24a63daaf57caf63b (patch) | |
| tree | 1b95a2c76d6273763b5f6c0ee1eda30a67fa63b6 /chipdrivers.h | |
| parent | 7f87f9fdc29519be125a229707830dddc4187d1f (diff) | |
| download | flashrom-9dc3d8d35b375eef3e63f3a24a63daaf57caf63b.tar.gz flashrom-9dc3d8d35b375eef3e63f3a24a63daaf57caf63b.tar.bz2 flashrom-9dc3d8d35b375eef3e63f3a24a63daaf57caf63b.zip | |
Revert "flashchips: port S25FS(128S) chip from chromiumos"
This reverts commit a3519561bd0fb44153bb376322b799000657576f.
Breaks support for most SPI flash chips. It's too big and too
invasive to be reviewed as a single commit.
The changes to `spi_poll_wip():spi25.c` were not noticed in the
original review that were from the similarly named function and
file `s25f_poll_status():s25f.c` in the downstream Chromium fork.
V.2: Rebase and rephrase commit msg to reflect how the issue
slipped in.
Change-Id: Id2a4593bdb654f8a26957d69d52189ce61621d93
Signed-off-by: Edward O'Callaghan <quasisec@google.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/40626
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Shiyu Sun <sshiyu@google.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'chipdrivers.h')
| -rw-r--r-- | chipdrivers.h | 8 |
1 files changed, 1 insertions, 7 deletions
diff --git a/chipdrivers.h b/chipdrivers.h index 04963c229..3c7d1466c 100644 --- a/chipdrivers.h +++ b/chipdrivers.h @@ -35,9 +35,6 @@ int probe_spi_res1(struct flashctx *flash); int probe_spi_res2(struct flashctx *flash); int probe_spi_res3(struct flashctx *flash); int probe_spi_at25f(struct flashctx *flash); -int probe_spi_big_spansion(struct flashctx *flash); -int s25fs_software_reset(struct flashctx *flash); -int spi_poll_wip(struct flashctx *const flash, const unsigned int poll_delay); int spi_write_enable(struct flashctx *flash); int spi_write_disable(struct flashctx *flash); int spi_block_erase_20(struct flashctx *flash, unsigned int addr, unsigned int blocklen); @@ -52,7 +49,6 @@ int spi_block_erase_c4(struct flashctx *flash, unsigned int addr, unsigned int b int spi_block_erase_c7(struct flashctx *flash, unsigned int addr, unsigned int blocklen); int spi_block_erase_d7(struct flashctx *flash, unsigned int addr, unsigned int blocklen); int spi_block_erase_d8(struct flashctx *flash, unsigned int addr, unsigned int blocklen); -int s25fs_block_erase_d8(struct flashctx *flash, unsigned int addr, unsigned int blocklen); int spi_block_erase_db(struct flashctx *flash, unsigned int addr, unsigned int blocklen); int spi_block_erase_dc(struct flashctx *flash, unsigned int addr, unsigned int blocklen); erasefunc_t *spi_get_erasefn_from_opcode(uint8_t opcode); @@ -64,12 +60,10 @@ int spi_enter_4ba(struct flashctx *flash); int spi_exit_4ba(struct flashctx *flash); int spi_set_extended_address(struct flashctx *, uint8_t addr_high); + /* spi25_statusreg.c */ uint8_t spi_read_status_register(const struct flashctx *flash); int spi_write_status_register(const struct flashctx *flash, int status); -int s25fs_read_cr(struct flashctx *const flash, uint32_t addr); -int s25fs_write_cr(struct flashctx *const flash, uint32_t addr, uint8_t data); -int s25fs_restore_cr3nv(struct flashctx *const flash, uint8_t cfg); void spi_prettyprint_status_register_bit(uint8_t status, int bit); int spi_prettyprint_status_register_plain(struct flashctx *flash); int spi_prettyprint_status_register_default_welwip(struct flashctx *flash); |