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authorEdward O'Callaghan <quasisec@google.com>2020-04-12 17:27:53 +1000
committerAngel Pons <th3fanbus@gmail.com>2020-04-30 08:00:41 +0000
commite4ddc36371bc07c71889f21f9144160c756e9825 (patch)
tree013c09671b5c91189b9e75f684180252d3ef98e4 /chipdrivers.h
parente0272e2b6f8860152d0edf72263a80426fd7d5e3 (diff)
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const'ify flashctx to align signatures with cros flashrom
The ChromiumOS flashrom fork has since const'ify flashctx in a few places. This aligns the function signatures to match with downstream to ease forward porting patches out of downstream back into mainline flashrom. This patch is minimum viable alignment and so feedback is welcome. Change-Id: Iff6dbda13cb0d941481c0d204b9c30895630fbd1 Signed-off-by: Edward O'Callaghan <quasisec@google.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/40324 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'chipdrivers.h')
-rw-r--r--chipdrivers.h4
1 files changed, 2 insertions, 2 deletions
diff --git a/chipdrivers.h b/chipdrivers.h
index aa240851b..04963c229 100644
--- a/chipdrivers.h
+++ b/chipdrivers.h
@@ -65,8 +65,8 @@ int spi_exit_4ba(struct flashctx *flash);
int spi_set_extended_address(struct flashctx *, uint8_t addr_high);
/* spi25_statusreg.c */
-uint8_t spi_read_status_register(struct flashctx *flash);
-int spi_write_status_register(struct flashctx *flash, int status);
+uint8_t spi_read_status_register(const struct flashctx *flash);
+int spi_write_status_register(const struct flashctx *flash, int status);
int s25fs_read_cr(struct flashctx *const flash, uint32_t addr);
int s25fs_write_cr(struct flashctx *const flash, uint32_t addr, uint8_t data);
int s25fs_restore_cr3nv(struct flashctx *const flash, uint8_t cfg);