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authorEdward O'Callaghan <quasisec@google.com>2022-08-12 15:42:29 +1000
committerAnastasia Klimchuk <aklm@chromium.org>2022-09-07 02:57:20 +0000
commit162b997f2fb36d44640c6ca97baee328550c0869 (patch)
tree40d0503748987055f1d29c68e9c7464ef7570e79 /chipset_enable.c
parenta20ceffa352f790f14361211a1c9931475ec7ac7 (diff)
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tree: plumb programmer_cfg into chipset_flash_enable()
Change-Id: I963c674d212ce791ee155020fa97bcf26cefca0c Signed-off-by: Edward O'Callaghan <quasisec@google.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/66673 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Anastasia Klimchuk <aklm@chromium.org> Reviewed-by: Felix Singer <felixsinger@posteo.net>
Diffstat (limited to 'chipset_enable.c')
-rw-r--r--chipset_enable.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/chipset_enable.c b/chipset_enable.c
index 64af483c0..d8aa53dd7 100644
--- a/chipset_enable.c
+++ b/chipset_enable.c
@@ -2182,7 +2182,7 @@ const struct penable chipset_enables[] = {
{0},
};
-int chipset_flash_enable(void)
+int chipset_flash_enable(const struct programmer_cfg *cfg)
{
struct pci_dev *dev = NULL;
int ret = -2; /* Nothing! */
@@ -2231,7 +2231,7 @@ int chipset_flash_enable(void)
continue;
}
msg_pinfo("Enabling flash write... ");
- ret = chipset_enables[i].doit(NULL, dev, chipset_enables[i].device_name);
+ ret = chipset_enables[i].doit(cfg, dev, chipset_enables[i].device_name);
if (ret == NOT_DONE_YET) {
ret = -2;
msg_pinfo("OK - searching further chips.\n");