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| author | Thomas Heijligen <thomas.heijligen@secunet.com> | 2022-03-16 09:19:19 +0100 |
|---|---|---|
| committer | Nico Huber <nico.h@gmx.de> | 2022-04-13 11:25:35 +0000 |
| commit | 4bd41e6bb5b96d7f71bebc03be93c7f7b433569e (patch) | |
| tree | 1985d3d76aeb336bea700abb267d12910185686b /chipset_enable.c | |
| parent | 82604bd738ce34f37a1e0c679930ae27fa10ffc0 (diff) | |
| download | flashrom-4bd41e6bb5b96d7f71bebc03be93c7f7b433569e.tar.gz flashrom-4bd41e6bb5b96d7f71bebc03be93c7f7b433569e.tar.bz2 flashrom-4bd41e6bb5b96d7f71bebc03be93c7f7b433569e.zip | |
hwaccess_x86_msr: rename msr function to msr_xxx
This eliminates the need to redefine the rdmsr and wrmsr symbols,
resulting in more understandable code. The common prefix clarify the
relation between the functions.
Change-Id: Ie5ad54d198312578e0a1ee719eec67b37d2bf6a4
Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/62851
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'chipset_enable.c')
| -rw-r--r-- | chipset_enable.c | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/chipset_enable.c b/chipset_enable.c index b050f642d..27ab12674 100644 --- a/chipset_enable.c +++ b/chipset_enable.c @@ -1264,21 +1264,21 @@ static int enable_flash_cs5536(struct pci_dev *dev, const char *name) msr_t msr; /* Geode only has a single core */ - if (setup_cpu_msr(0)) + if (msr_setup(0)) return -1; - msr = rdmsr(MSR_RCONF_DEFAULT); + msr = msr_read(MSR_RCONF_DEFAULT); if ((msr.hi >> 24) != 0x22) { msr.hi &= 0xfbffffff; - wrmsr(MSR_RCONF_DEFAULT, msr); + msr_write(MSR_RCONF_DEFAULT, msr); } - msr = rdmsr(MSR_NORF_CTL); + msr = msr_read(MSR_NORF_CTL); /* Raise WE_CS3 bit. */ msr.lo |= 0x08; - wrmsr(MSR_NORF_CTL, msr); + msr_write(MSR_NORF_CTL, msr); - cleanup_cpu_msr(); + msr_cleanup(); #undef MSR_RCONF_DEFAULT #undef MSR_NORF_CTL |