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| author | Edward O'Callaghan <quasisec@google.com> | 2022-02-26 11:36:17 +1100 |
|---|---|---|
| committer | Edward O'Callaghan <quasisec@chromium.org> | 2022-03-04 00:01:15 +0000 |
| commit | 6289508c5bb028fa4f6ed58dfef974302c5616f9 (patch) | |
| tree | 4333c8cd206de1417346191060c129ea747a2d27 /chipset_enable.c | |
| parent | bc2e3b6b79dd1383cdf3d965df2fc5c0d6596b02 (diff) | |
| download | flashrom-6289508c5bb028fa4f6ed58dfef974302c5616f9.tar.gz flashrom-6289508c5bb028fa4f6ed58dfef974302c5616f9.tar.bz2 flashrom-6289508c5bb028fa4f6ed58dfef974302c5616f9.zip | |
pcidev: Move scandev_inclass logic from internal to pcidev
BUG=b:220950271
TEST=```sudo ./flashrom -p internal -r /tmp/bios
<snip>
Found Programmer flash chip "Opaque flash chip" (16384 kB, Programmer-specific) mapped at physical address 0x0000000000000000.
Reading flash... done.
```
Change-Id: I1978e178fb73485f1c5c7e732853522847267cee
Signed-off-by: Edward O'Callaghan <quasisec@google.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/59277
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
Diffstat (limited to 'chipset_enable.c')
| -rw-r--r-- | chipset_enable.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/chipset_enable.c b/chipset_enable.c index d9a1d3a79..d4285a58f 100644 --- a/chipset_enable.c +++ b/chipset_enable.c @@ -120,11 +120,11 @@ static struct pci_dev *find_southbridge(uint16_t vendor, const char *name) { struct pci_dev *sbdev; - sbdev = pci_dev_find_vendorclass(vendor, 0x0601); + sbdev = pcidev_find_vendorclass(vendor, 0x0601); if (!sbdev) - sbdev = pci_dev_find_vendorclass(vendor, 0x0680); + sbdev = pcidev_find_vendorclass(vendor, 0x0680); if (!sbdev) - sbdev = pci_dev_find_vendorclass(vendor, 0x0000); + sbdev = pcidev_find_vendorclass(vendor, 0x0000); if (!sbdev) msg_perr("No southbridge found for %s!\n", name); if (sbdev) |