printf: Use inttype.h macros for format strings

DJGPP for compiling DOS has other sizes for the normal int types and
therefore throwing errors when using %i %d or %x with uint32_t.

Fix these warnings by using the macros created for it and provided in
inttypes.h.

Change-Id: Ia75b6df981ce60c891161fe553c7ceab8570178d
Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/73040
Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

1 files changed, 10 insertions, 10 deletions

diff --git a/chipset_enable.c b/chipset_enable.c
index 596899a5c..9d3df5f8f 100644
--- a/chipset_enable.c
+++ b/chipset_enable.c
@@ -550,7 +550,7 @@ idsel_garbage_out:
 		}
 	}
 	max_rom_decode.fwh = min(max_decode_fwh_idsel, max_decode_fwh_decode);
-	msg_pdbg("Maximum FWH chip size: 0x%x bytes\n", max_rom_decode.fwh);
+	msg_pdbg("Maximum FWH chip size: 0x%"PRIx32" bytes\n", max_rom_decode.fwh);
 
 	return 0;
 }
@@ -625,7 +625,7 @@ static enum chipbustype enable_flash_ich_report_gcs(
 		break;
 	}
 
-	msg_pdbg("%s = 0x%x: ", reg_name, gcs);
+	msg_pdbg("%s = 0x%"PRIx32": ", reg_name, gcs);
 	msg_pdbg("BIOS Interface Lock-Down: %sabled, ", bild ? "en" : "dis");
 
 	struct boot_straps {
@@ -774,7 +774,7 @@ static int enable_flash_ich_spi(const struct programmer_cfg *cfg, struct pci_dev
 {
 	/* Get physical address of Root Complex Register Block */
 	uint32_t rcra = pci_read_long(dev, 0xf0) & 0xffffc000;
-	msg_pdbg("Root Complex Register Block address = 0x%x\n", rcra);
+	msg_pdbg("Root Complex Register Block address = 0x%"PRIx32"\n", rcra);
 
 	/* Map RCBA to virtual memory */
 	void *rcrb = rphysmap("ICH RCRB", rcra, 0x4000);
@@ -958,7 +958,7 @@ static int enable_flash_pch100_or_c620(const struct programmer_cfg *cfg,
 	void *const spibar = rphysmap("SPIBAR", phys_spibar, 0x1000);
 	if (spibar == ERROR_PTR)
 		goto _freepci_ret;
-	msg_pdbg("SPIBAR = 0x%0*" PRIxPTR " (phys = 0x%08x)\n", PRIxPTR_WIDTH, (uintptr_t)spibar, phys_spibar);
+	msg_pdbg("SPIBAR = 0x%0*" PRIxPTR " (phys = 0x%08"PRIx32")\n", PRIxPTR_WIDTH, (uintptr_t)spibar, phys_spibar);
 
 	/* This adds BUS_SPI */
 	const int ret_spi = ich_init_spi(cfg, spibar, pch_generation);
@@ -1050,7 +1050,7 @@ static int enable_flash_silvermont(const struct programmer_cfg *cfg, struct pci_
 
 	/* Get physical address of Root Complex Register Block */
 	uint32_t rcba = pci_read_long(dev, 0xf0) & 0xfffffc00;
-	msg_pdbg("Root Complex Register Block address = 0x%x\n", rcba);
+	msg_pdbg("Root Complex Register Block address = 0x%"PRIx32"\n", rcba);
 
 	/* Handle GCS (in RCRB) */
 	void *rcrb = physmap("BYT RCRB", rcba, 4);
@@ -1068,7 +1068,7 @@ static int enable_flash_silvermont(const struct programmer_cfg *cfg, struct pci_
 
 	/* Get physical address of SPI Base Address and map it */
 	uint32_t sbase = pci_read_long(dev, 0x54) & 0xfffffe00;
-	msg_pdbg("SPI_BASE_ADDRESS = 0x%x\n", sbase);
+	msg_pdbg("SPI_BASE_ADDRESS = 0x%"PRIx32"\n", sbase);
 	void *spibar = rphysmap("BYT SBASE", sbase, 512); /* Last defined address on Bay Trail is 0x100 */
 	if (spibar == ERROR_PTR)
 		return ERROR_FLASHROM_FATAL;
@@ -1387,7 +1387,7 @@ static int enable_flash_sb600(const struct programmer_cfg *cfg, struct pci_dev *
 		/* No protection flags for this region?*/
 		if ((prot & 0x3) == 0)
 			continue;
-		msg_pdbg("Chipset %s%sprotected flash from 0x%08x to 0x%08x, unlocking...",
+		msg_pdbg("Chipset %s%sprotected flash from 0x%08"PRIx32" to 0x%08"PRIx32", unlocking...",
 			  (prot & 0x2) ? "read " : "",
 			  (prot & 0x1) ? "write " : "",
 			  (prot & 0xfffff800),
@@ -1396,7 +1396,7 @@ static int enable_flash_sb600(const struct programmer_cfg *cfg, struct pci_dev *
 		rpci_write_byte(dev, reg, prot);
 		prot = pci_read_long(dev, reg);
 		if ((prot & 0x3) != 0) {
-			msg_perr("Disabling %s%sprotection of flash addresses from 0x%08x to 0x%08x failed.\n",
+			msg_perr("Disabling %s%sprotection of flash addresses from 0x%08"PRIx32" to 0x%08"PRIx32" failed.\n",
 				 (prot & 0x2) ? "read " : "",
 				 (prot & 0x1) ? "write " : "",
 				 (prot & 0xfffff800),
@@ -1494,7 +1494,7 @@ static int enable_flash_ck804(const struct programmer_cfg *cfg, struct pci_dev *
 
 			segctrl = pci_read_byte(dev, reg);
 			if ((segctrl & 0x3) != 0x0) {
-				msg_pinfo("Could not unlock protection in register 0x%02x (new value: 0x%x).\n",
+				msg_pinfo("Could not unlock protection in register 0x%02x (new value: 0x%"PRIx32").\n",
 					  reg, segctrl);
 				err++;
 			} else
@@ -1518,7 +1518,7 @@ static int enable_flash_ck804(const struct programmer_cfg *cfg, struct pci_dev *
 
 		segctrl = pci_read_long(dev, reg);
 		if ((segctrl & 0x33333333) != 0x00000000) {
-			msg_pinfo("Could not unlock protection in register 0x%02x (new value: 0x%08x).\n",
+			msg_pinfo("Could not unlock protection in register 0x%02x (new value: 0x%08"PRIx32").\n",
 				  reg, segctrl);
 			err++;
 		} else