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author | Angel Pons <th3fanbus@gmail.com> | 2020-11-20 10:05:29 +0100 |
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committer | Angel Pons <th3fanbus@gmail.com> | 2020-11-23 12:43:11 +0000 |
commit | d5ba023b3b05a4e23d607c234b05cb42e7b08ccd (patch) | |
tree | 29914f974e13eb432782ed0ed00f97fdf2625a36 /chipset_enable.c | |
parent | 97dcc971c48f9c802a2f8ec8a68a51ccc27e5829 (diff) | |
download | flashrom-d5ba023b3b05a4e23d607c234b05cb42e7b08ccd.tar.gz flashrom-d5ba023b3b05a4e23d607c234b05cb42e7b08ccd.tar.bz2 flashrom-d5ba023b3b05a4e23d607c234b05cb42e7b08ccd.zip |
chipset_enable.c: Mark Intel Q67 as DEP
Tested reading, writing and erasing the internal flash chip using an HP
Elite 8200 mainboard with an Intel Q67 PCH. However, since ME-enabled
chipsets are marked as DEP instead of OK, this one shall also be.
Change-Id: I2bd431c5c72824654b6b5b840f9af55dfe9d3554
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/47797
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Frans Hendriks <fhendriks@eltan.com>
Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
Diffstat (limited to 'chipset_enable.c')
-rw-r--r-- | chipset_enable.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/chipset_enable.c b/chipset_enable.c index 04ff9d81e..5e4a547d8 100644 --- a/chipset_enable.c +++ b/chipset_enable.c @@ -1829,7 +1829,7 @@ const struct penable chipset_enables[] = { {0x8086, 0x1c4b, B_FS, NT, "Intel", "HM67", enable_flash_pch6}, {0x8086, 0x1c4c, B_FS, NT, "Intel", "Q65", enable_flash_pch6}, {0x8086, 0x1c4d, B_FS, NT, "Intel", "QS67", enable_flash_pch6}, - {0x8086, 0x1c4e, B_FS, NT, "Intel", "Q67", enable_flash_pch6}, + {0x8086, 0x1c4e, B_FS, DEP, "Intel", "Q67", enable_flash_pch6}, {0x8086, 0x1c4f, B_FS, DEP, "Intel", "QM67", enable_flash_pch6}, {0x8086, 0x1c50, B_FS, NT, "Intel", "B65", enable_flash_pch6}, {0x8086, 0x1c52, B_FS, NT, "Intel", "C202", enable_flash_pch6}, |